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src/cpu/aarch64/vm/macroAssembler_aarch64.hpp

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rev 10528 : 8151775: aarch64: add support for 8.1 LSE atomic operations
Reviewed-by: aph


 940                                                 int offset);
 941 
 942   // Support for serializing memory accesses between threads
 943   void serialize_memory(Register thread, Register tmp);
 944 
 945   // Arithmetics
 946 
 947   void addptr(const Address &dst, int32_t src);
 948   void cmpptr(Register src1, Address src2);
 949 
 950   // Various forms of CAS
 951 
 952   void cmpxchgptr(Register oldv, Register newv, Register addr, Register tmp,
 953                   Label &suceed, Label *fail);
 954 
 955   void cmpxchgw(Register oldv, Register newv, Register addr, Register tmp,
 956                   Label &suceed, Label *fail);
 957 
 958   void atomic_add(Register prev, RegisterOrConstant incr, Register addr);
 959   void atomic_addw(Register prev, RegisterOrConstant incr, Register addr);


 960 
 961   void atomic_xchg(Register prev, Register newv, Register addr);
 962   void atomic_xchgw(Register prev, Register newv, Register addr);


 963 
 964   void orptr(Address adr, RegisterOrConstant src) {
 965     ldr(rscratch2, adr);
 966     if (src.is_register())
 967       orr(rscratch2, rscratch2, src.as_register());
 968     else
 969       orr(rscratch2, rscratch2, src.as_constant());
 970     str(rscratch2, adr);
 971   }
 972 
 973   // A generic CAS; success or failure is in the EQ flag.
 974   void cmpxchg(Register addr, Register expected, Register new_val,
 975                enum operand_size size,
 976                bool acquire, bool release,
 977                Register tmp = rscratch1);
 978 
 979   // Calls
 980 
 981   address trampoline_call(Address entry, CodeBuffer *cbuf = NULL);
 982 




 940                                                 int offset);
 941 
 942   // Support for serializing memory accesses between threads
 943   void serialize_memory(Register thread, Register tmp);
 944 
 945   // Arithmetics
 946 
 947   void addptr(const Address &dst, int32_t src);
 948   void cmpptr(Register src1, Address src2);
 949 
 950   // Various forms of CAS
 951 
 952   void cmpxchgptr(Register oldv, Register newv, Register addr, Register tmp,
 953                   Label &suceed, Label *fail);
 954 
 955   void cmpxchgw(Register oldv, Register newv, Register addr, Register tmp,
 956                   Label &suceed, Label *fail);
 957 
 958   void atomic_add(Register prev, RegisterOrConstant incr, Register addr);
 959   void atomic_addw(Register prev, RegisterOrConstant incr, Register addr);
 960   void atomic_addal(Register prev, RegisterOrConstant incr, Register addr);
 961   void atomic_addalw(Register prev, RegisterOrConstant incr, Register addr);
 962 
 963   void atomic_xchg(Register prev, Register newv, Register addr);
 964   void atomic_xchgw(Register prev, Register newv, Register addr);
 965   void atomic_xchgal(Register prev, Register newv, Register addr);
 966   void atomic_xchgalw(Register prev, Register newv, Register addr);
 967 
 968   void orptr(Address adr, RegisterOrConstant src) {
 969     ldr(rscratch2, adr);
 970     if (src.is_register())
 971       orr(rscratch2, rscratch2, src.as_register());
 972     else
 973       orr(rscratch2, rscratch2, src.as_constant());
 974     str(rscratch2, adr);
 975   }
 976 
 977   // A generic CAS; success or failure is in the EQ flag.
 978   void cmpxchg(Register addr, Register expected, Register new_val,
 979                enum operand_size size,
 980                bool acquire, bool release,
 981                Register tmp = rscratch1);
 982 
 983   // Calls
 984 
 985   address trampoline_call(Address entry, CodeBuffer *cbuf = NULL);
 986 


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