src/cpu/aarch64/vm/templateInterpreterGenerator_aarch64.cpp

rev 10437 : 8151775: aarch64: add support for 8.1 LSE atomic operations
Reviewed-by: aph

@@ -1979,20 +1979,25 @@
 
 void TemplateInterpreterGenerator::count_bytecode() {
   Register rscratch3 = r0;
   __ push(rscratch1);
   __ push(rscratch2);
+  __ mov(rscratch2, (address) &BytecodeCounter::_counter_value);
+  if (UseLSE) {
+    __ mov(rscratch1, 1);
+    __ ldadd(Assembler::xword, rscratch1, zr, rscratch2);
+  } else {
   __ push(rscratch3);
   Label L;
-  __ mov(rscratch2, (address) &BytecodeCounter::_counter_value);
   __ prfm(Address(rscratch2), PSTL1STRM);
   __ bind(L);
   __ ldxr(rscratch1, rscratch2);
   __ add(rscratch1, rscratch1, 1);
   __ stxr(rscratch3, rscratch1, rscratch2);
   __ cbnzw(rscratch3, L);
   __ pop(rscratch3);
+  }
   __ pop(rscratch2);
   __ pop(rscratch1);
 }
 
 void TemplateInterpreterGenerator::histogram_bytecode(Template* t) { ; }