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src/cpu/aarch64/vm/globals_aarch64.hpp

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rev 9041 : 8159063: aarch64: optimise unaligned array copy long
Reviewed-by: aph
Contributed-by: edward.nevill@gmail.com, adinn@redhat.com


  87          "tell sim to cache memory updates until exclusive op occurs")  \
  88                                                                         \
  89   product(bool, DisableBCCheck, true,                                   \
  90           "tell sim not to invoke bccheck callback")                    \
  91                                                                         \
  92   product(bool, NearCpool, true,                                        \
  93          "constant pool is close to instructions")                      \
  94                                                                         \
  95   product(bool, UseBarriersForVolatile, false,                          \
  96           "Use memory barriers to implement volatile accesses")         \
  97                                                                         \
  98   product(bool, UseCRC32, false,                                        \
  99           "Use CRC32 instructions for CRC32 computation")               \
 100   product(bool, UseLSE, false,                                          \
 101           "Use LSE instructions")                                       \
 102   product(bool, TraceTraps, false, "Trace all traps the signal handler")
 103 
 104 // Don't attempt to use Neon on builtin sim until builtin sim supports it
 105 #define UseNeon false
 106 #define UseSIMDForMemoryOps false

 107 
 108 #else
 109 #define UseBuiltinSim           false
 110 #define NotifySimulator         false
 111 #define UseSimulatorCache       false
 112 #define DisableBCCheck          true
 113 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
 114                                                                         \
 115   product(bool, NearCpool, true,                                        \
 116          "constant pool is close to instructions")                      \
 117                                                                         \
 118   product(bool, UseBarriersForVolatile, false,                          \
 119           "Use memory barriers to implement volatile accesses")         \
 120   product(bool, UseNeon, false,                                         \
 121           "Use Neon for CRC32 computation")                             \
 122   product(bool, UseCRC32, false,                                        \
 123           "Use CRC32 instructions for CRC32 computation")               \
 124   product(bool, UseLSE, false,                                          \
 125           "Use LSE instructions")                                       \
 126   product(bool, UseSIMDForMemoryOps, false,                            \
 127           "Use SIMD instructions in generated memory move code")        \


 128   product(bool, UseBlockZeroing, true,                                  \
 129           "Use DC ZVA for block zeroing")                               \
 130   product(intx, BlockZeroingLowLimit, 256,                              \
 131           "Minimum size in bytes when block zeroing will be used")      \
 132   product(bool, TraceTraps, false, "Trace all traps the signal handler")
 133 
 134 #endif
 135 
 136 #endif // CPU_AARCH64_VM_GLOBALS_AARCH64_HPP


  87          "tell sim to cache memory updates until exclusive op occurs")  \
  88                                                                         \
  89   product(bool, DisableBCCheck, true,                                   \
  90           "tell sim not to invoke bccheck callback")                    \
  91                                                                         \
  92   product(bool, NearCpool, true,                                        \
  93          "constant pool is close to instructions")                      \
  94                                                                         \
  95   product(bool, UseBarriersForVolatile, false,                          \
  96           "Use memory barriers to implement volatile accesses")         \
  97                                                                         \
  98   product(bool, UseCRC32, false,                                        \
  99           "Use CRC32 instructions for CRC32 computation")               \
 100   product(bool, UseLSE, false,                                          \
 101           "Use LSE instructions")                                       \
 102   product(bool, TraceTraps, false, "Trace all traps the signal handler")
 103 
 104 // Don't attempt to use Neon on builtin sim until builtin sim supports it
 105 #define UseNeon false
 106 #define UseSIMDForMemoryOps false
 107 #define AvoidUnalignedAcesses false
 108 
 109 #else
 110 #define UseBuiltinSim           false
 111 #define NotifySimulator         false
 112 #define UseSimulatorCache       false
 113 #define DisableBCCheck          true
 114 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct) \
 115                                                                         \
 116   product(bool, NearCpool, true,                                        \
 117          "constant pool is close to instructions")                      \
 118                                                                         \
 119   product(bool, UseBarriersForVolatile, false,                          \
 120           "Use memory barriers to implement volatile accesses")         \
 121   product(bool, UseNeon, false,                                         \
 122           "Use Neon for CRC32 computation")                             \
 123   product(bool, UseCRC32, false,                                        \
 124           "Use CRC32 instructions for CRC32 computation")               \
 125   product(bool, UseLSE, false,                                          \
 126           "Use LSE instructions")                                       \
 127   product(bool, UseSIMDForMemoryOps, false,                            \
 128           "Use SIMD instructions in generated memory move code")        \
 129   product(bool, AvoidUnalignedAccesses, false,                          \
 130           "Avoid generating unaligned memory accesses")                 \
 131   product(bool, UseBlockZeroing, true,                                  \
 132           "Use DC ZVA for block zeroing")                               \
 133   product(intx, BlockZeroingLowLimit, 256,                              \
 134           "Minimum size in bytes when block zeroing will be used")      \
 135   product(bool, TraceTraps, false, "Trace all traps the signal handler")
 136 
 137 #endif
 138 
 139 #endif // CPU_AARCH64_VM_GLOBALS_AARCH64_HPP
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