--- old/src/os_cpu/linux_arm/vm/atomic_linux_arm.hpp	2017-07-17 10:42:56.218129051 +0200
+++ new/src/os_cpu/linux_arm/vm/atomic_linux_arm.hpp	2017-07-17 10:42:56.058129056 +0200
@@ -147,7 +147,7 @@
 template <>
 inline int64_t Atomic::specialized_cmpxchg<int64_t>(int64_t exchange_value, volatile int64_t* dest, int64_t compare_value, cmpxchg_memory_order order) {
 #ifdef AARCH64
-  jlong rv;
+  int64_t rv;
   int tmp;
   __asm__ volatile(
     "1:\n\t"
@@ -173,7 +173,7 @@
 #ifdef AARCH64
 template <>
 inline int64_t Atomic::specialized_add<int64_t>(int64_t add_value, volatile int64_t* dest) {
-  intptr_t val;
+  int64_t val;
   int tmp;
   __asm__ volatile(
     "1:\n\t"
@@ -189,7 +189,7 @@
 
 template <>
 inline int64_t Atomic::specialized_xchg<int64_t>(int64_t exchange_value, volatile int64_t* dest) {
-  intptr_t old_val;
+  int64_t old_val;
   int tmp;
   __asm__ volatile(
     "1:\n\t"