61 //
62
63 #define inlasm_sync() __asm__ __volatile__ ("sync" : : : "memory");
64 #define inlasm_lwsync() __asm__ __volatile__ ("lwsync" : : : "memory");
65 #define inlasm_eieio() __asm__ __volatile__ ("eieio" : : : "memory");
66 #define inlasm_isync() __asm__ __volatile__ ("isync" : : : "memory");
67 // Use twi-isync for load_acquire (faster than lwsync).
68 // ATTENTION: seems like xlC 10.1 has problems with this inline assembler macro (VerifyMethodHandles found "bad vminfo in AMH.conv"):
69 // #define inlasm_acquire_reg(X) __asm__ __volatile__ ("twi 0,%0,0\n isync\n" : : "r" (X) : "memory");
70 #define inlasm_acquire_reg(X) inlasm_lwsync();
71
72 inline void OrderAccess::loadload() { inlasm_lwsync(); }
73 inline void OrderAccess::storestore() { inlasm_lwsync(); }
74 inline void OrderAccess::loadstore() { inlasm_lwsync(); }
75 inline void OrderAccess::storeload() { inlasm_sync(); }
76
77 inline void OrderAccess::acquire() { inlasm_lwsync(); }
78 inline void OrderAccess::release() { inlasm_lwsync(); }
79 inline void OrderAccess::fence() { inlasm_sync(); }
80
81 template<> inline jbyte OrderAccess::specialized_load_acquire<jbyte> (const volatile jbyte* p) { register jbyte t = load(p); inlasm_acquire_reg(t); return t; }
82 template<> inline jshort OrderAccess::specialized_load_acquire<jshort>(const volatile jshort* p) { register jshort t = load(p); inlasm_acquire_reg(t); return t; }
83 template<> inline jint OrderAccess::specialized_load_acquire<jint> (const volatile jint* p) { register jint t = load(p); inlasm_acquire_reg(t); return t; }
84 template<> inline jlong OrderAccess::specialized_load_acquire<jlong> (const volatile jlong* p) { register jlong t = load(p); inlasm_acquire_reg(t); return t; }
85
86 #undef inlasm_sync
87 #undef inlasm_lwsync
88 #undef inlasm_eieio
89 #undef inlasm_isync
90
91 #define VM_HAS_GENERALIZED_ORDER_ACCESS 1
92
93 #endif // OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP
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61 //
62
63 #define inlasm_sync() __asm__ __volatile__ ("sync" : : : "memory");
64 #define inlasm_lwsync() __asm__ __volatile__ ("lwsync" : : : "memory");
65 #define inlasm_eieio() __asm__ __volatile__ ("eieio" : : : "memory");
66 #define inlasm_isync() __asm__ __volatile__ ("isync" : : : "memory");
67 // Use twi-isync for load_acquire (faster than lwsync).
68 // ATTENTION: seems like xlC 10.1 has problems with this inline assembler macro (VerifyMethodHandles found "bad vminfo in AMH.conv"):
69 // #define inlasm_acquire_reg(X) __asm__ __volatile__ ("twi 0,%0,0\n isync\n" : : "r" (X) : "memory");
70 #define inlasm_acquire_reg(X) inlasm_lwsync();
71
72 inline void OrderAccess::loadload() { inlasm_lwsync(); }
73 inline void OrderAccess::storestore() { inlasm_lwsync(); }
74 inline void OrderAccess::loadstore() { inlasm_lwsync(); }
75 inline void OrderAccess::storeload() { inlasm_sync(); }
76
77 inline void OrderAccess::acquire() { inlasm_lwsync(); }
78 inline void OrderAccess::release() { inlasm_lwsync(); }
79 inline void OrderAccess::fence() { inlasm_sync(); }
80
81 template<size_t byte_size>
82 struct OrderAccess::PlatformOrderedLoad<byte_size, X_ACQUIRE>
83 VALUE_OBJ_CLASS_SPEC
84 {
85 template <typename T>
86 T operator()(const volatile T* p) const { register T t = Atomic::load(p); inlasm_acquire_reg(t); return t; }
87 };
88
89 #undef inlasm_sync
90 #undef inlasm_lwsync
91 #undef inlasm_eieio
92 #undef inlasm_isync
93
94 #endif // OS_CPU_AIX_OJDKPPC_VM_ORDERACCESS_AIX_PPC_INLINE_HPP
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