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src/hotspot/os_cpu/bsd_zero/orderAccess_bsd_zero.inline.hpp

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rev 47383 : [mq]: OrderAccess_refactoring
   1 /*
   2  * Copyright (c) 2003, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright 2007, 2008, 2009 Red Hat, Inc.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.


  56 
  57 #else // PPC
  58 
  59 #define LIGHT_MEM_BARRIER __asm __volatile ("":::"memory")
  60 
  61 #endif // PPC
  62 
  63 #endif // ARM
  64 
  65 // Note: What is meant by LIGHT_MEM_BARRIER is a barrier which is sufficient
  66 // to provide TSO semantics, i.e. StoreStore | LoadLoad | LoadStore.
  67 
  68 inline void OrderAccess::loadload()   { LIGHT_MEM_BARRIER; }
  69 inline void OrderAccess::storestore() { LIGHT_MEM_BARRIER; }
  70 inline void OrderAccess::loadstore()  { LIGHT_MEM_BARRIER; }
  71 inline void OrderAccess::storeload()  { FULL_MEM_BARRIER;  }
  72 
  73 inline void OrderAccess::acquire()    { LIGHT_MEM_BARRIER; }
  74 inline void OrderAccess::release()    { LIGHT_MEM_BARRIER; }
  75 inline void OrderAccess::fence()      { FULL_MEM_BARRIER;  }
  76 
  77 #define VM_HAS_GENERALIZED_ORDER_ACCESS 1
  78 
  79 #endif // OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
   1 /*
   2  * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright 2007, 2008, 2009 Red Hat, Inc.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.


  56 
  57 #else // PPC
  58 
  59 #define LIGHT_MEM_BARRIER __asm __volatile ("":::"memory")
  60 
  61 #endif // PPC
  62 
  63 #endif // ARM
  64 
  65 // Note: What is meant by LIGHT_MEM_BARRIER is a barrier which is sufficient
  66 // to provide TSO semantics, i.e. StoreStore | LoadLoad | LoadStore.
  67 
  68 inline void OrderAccess::loadload()   { LIGHT_MEM_BARRIER; }
  69 inline void OrderAccess::storestore() { LIGHT_MEM_BARRIER; }
  70 inline void OrderAccess::loadstore()  { LIGHT_MEM_BARRIER; }
  71 inline void OrderAccess::storeload()  { FULL_MEM_BARRIER;  }
  72 
  73 inline void OrderAccess::acquire()    { LIGHT_MEM_BARRIER; }
  74 inline void OrderAccess::release()    { LIGHT_MEM_BARRIER; }
  75 inline void OrderAccess::fence()      { FULL_MEM_BARRIER;  }


  76 
  77 #endif // OS_CPU_BSD_ZERO_VM_ORDERACCESS_BSD_ZERO_INLINE_HPP
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