57 #define inlasm_compiler_barrier() __asm__ volatile ("" : : : "memory");
  58 // "bcr 15, 0" is used as two way memory barrier.
  59 #define inlasm_zarch_sync() __asm__ __volatile__ ("bcr 15, 0" : : : "memory");
  60 
  61 // Release and acquire are empty on z/Architecture, but potential
  62 // optimizations of gcc must be forbidden by OrderAccess::release and
  63 // OrderAccess::acquire.
  64 #define inlasm_zarch_release() inlasm_compiler_barrier()
  65 #define inlasm_zarch_acquire() inlasm_compiler_barrier()
  66 #define inlasm_zarch_fence()   inlasm_zarch_sync()
  67 
  68 inline void OrderAccess::loadload()   { inlasm_compiler_barrier(); }
  69 inline void OrderAccess::storestore() { inlasm_compiler_barrier(); }
  70 inline void OrderAccess::loadstore()  { inlasm_compiler_barrier(); }
  71 inline void OrderAccess::storeload()  { inlasm_zarch_sync(); }
  72 
  73 inline void OrderAccess::acquire()    { inlasm_zarch_acquire(); }
  74 inline void OrderAccess::release()    { inlasm_zarch_release(); }
  75 inline void OrderAccess::fence()      { inlasm_zarch_sync(); }
  76 
  77 template<> inline jbyte  OrderAccess::specialized_load_acquire<jbyte> (const volatile jbyte*  p) { register jbyte  t = *p; inlasm_zarch_acquire(); return t; }
  78 template<> inline jshort OrderAccess::specialized_load_acquire<jshort>(const volatile jshort* p) { register jshort t = *p; inlasm_zarch_acquire(); return t; }
  79 template<> inline jint   OrderAccess::specialized_load_acquire<jint>  (const volatile jint*   p) { register jint   t = *p; inlasm_zarch_acquire(); return t; }
  80 template<> inline jlong  OrderAccess::specialized_load_acquire<jlong> (const volatile jlong*  p) { register jlong  t = *p; inlasm_zarch_acquire(); return t; }



  81 
  82 #undef inlasm_compiler_barrier
  83 #undef inlasm_zarch_sync
  84 #undef inlasm_zarch_release
  85 #undef inlasm_zarch_acquire
  86 #undef inlasm_zarch_fence
  87 
  88 #define VM_HAS_GENERALIZED_ORDER_ACCESS 1
  89 
  90 #endif // OS_CPU_LINUX_S390_VM_ORDERACCESS_LINUX_S390_INLINE_HPP
  91 
  92 

  57 #define inlasm_compiler_barrier() __asm__ volatile ("" : : : "memory");
  58 // "bcr 15, 0" is used as two way memory barrier.
  59 #define inlasm_zarch_sync() __asm__ __volatile__ ("bcr 15, 0" : : : "memory");
  60 
  61 // Release and acquire are empty on z/Architecture, but potential
  62 // optimizations of gcc must be forbidden by OrderAccess::release and
  63 // OrderAccess::acquire.
  64 #define inlasm_zarch_release() inlasm_compiler_barrier()
  65 #define inlasm_zarch_acquire() inlasm_compiler_barrier()
  66 #define inlasm_zarch_fence()   inlasm_zarch_sync()
  67 
  68 inline void OrderAccess::loadload()   { inlasm_compiler_barrier(); }
  69 inline void OrderAccess::storestore() { inlasm_compiler_barrier(); }
  70 inline void OrderAccess::loadstore()  { inlasm_compiler_barrier(); }
  71 inline void OrderAccess::storeload()  { inlasm_zarch_sync(); }
  72 
  73 inline void OrderAccess::acquire()    { inlasm_zarch_acquire(); }
  74 inline void OrderAccess::release()    { inlasm_zarch_release(); }
  75 inline void OrderAccess::fence()      { inlasm_zarch_sync(); }
  76 
  77 template<size_t byte_size>
  78 struct OrderAccess::PlatformOrderedLoad<byte_size, X_ACQUIRE>
  79   VALUE_OBJ_CLASS_SPEC
  80 {
  81   template <typename T>
  82   T operator()(const volatile T* p) const { register T t = *p; inlasm_zarch_acquire(); return t; }
  83 };
  84 
  85 #undef inlasm_compiler_barrier
  86 #undef inlasm_zarch_sync
  87 #undef inlasm_zarch_release
  88 #undef inlasm_zarch_acquire
  89 #undef inlasm_zarch_fence
  90 


  91 #endif // OS_CPU_LINUX_S390_VM_ORDERACCESS_LINUX_S390_INLINE_HPP