1 /*
2 * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
43 inline void OrderAccess::storestore() { compiler_barrier(); }
44 inline void OrderAccess::loadstore() { compiler_barrier(); }
45 inline void OrderAccess::storeload() { fence(); }
46
47 inline void OrderAccess::acquire() { compiler_barrier(); }
48 inline void OrderAccess::release() { compiler_barrier(); }
49
50 inline void OrderAccess::fence() {
51 if (os::is_MP()) {
52 // always use locked addl since mfence is sometimes expensive
53 #ifdef AMD64
54 __asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
55 #else
56 __asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
57 #endif
58 }
59 compiler_barrier();
60 }
61
62 template<>
63 inline void OrderAccess::specialized_release_store_fence<jbyte> (volatile jbyte* p, jbyte v) {
64 __asm__ volatile ( "xchgb (%2),%0"
65 : "=q" (v)
66 : "0" (v), "r" (p)
67 : "memory");
68 }
69 template<>
70 inline void OrderAccess::specialized_release_store_fence<jshort>(volatile jshort* p, jshort v) {
71 __asm__ volatile ( "xchgw (%2),%0"
72 : "=r" (v)
73 : "0" (v), "r" (p)
74 : "memory");
75 }
76 template<>
77 inline void OrderAccess::specialized_release_store_fence<jint> (volatile jint* p, jint v) {
78 __asm__ volatile ( "xchgl (%2),%0"
79 : "=r" (v)
80 : "0" (v), "r" (p)
81 : "memory");
82 }
83
84 #ifdef AMD64
85 template<>
86 inline void OrderAccess::specialized_release_store_fence<jlong> (volatile jlong* p, jlong v) {
87 __asm__ volatile ( "xchgq (%2), %0"
88 : "=r" (v)
89 : "0" (v), "r" (p)
90 : "memory");
91 }
92 #endif // AMD64
93
94 template<>
95 inline void OrderAccess::specialized_release_store_fence<jfloat> (volatile jfloat* p, jfloat v) {
96 release_store_fence((volatile jint*)p, jint_cast(v));
97 }
98 template<>
99 inline void OrderAccess::specialized_release_store_fence<jdouble>(volatile jdouble* p, jdouble v) {
100 release_store_fence((volatile jlong*)p, jlong_cast(v));
101 }
102
103 #define VM_HAS_GENERALIZED_ORDER_ACCESS 1
104
105 #endif // OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_INLINE_HPP
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1 /*
2 * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
43 inline void OrderAccess::storestore() { compiler_barrier(); }
44 inline void OrderAccess::loadstore() { compiler_barrier(); }
45 inline void OrderAccess::storeload() { fence(); }
46
47 inline void OrderAccess::acquire() { compiler_barrier(); }
48 inline void OrderAccess::release() { compiler_barrier(); }
49
50 inline void OrderAccess::fence() {
51 if (os::is_MP()) {
52 // always use locked addl since mfence is sometimes expensive
53 #ifdef AMD64
54 __asm__ volatile ("lock; addl $0,0(%%rsp)" : : : "cc", "memory");
55 #else
56 __asm__ volatile ("lock; addl $0,0(%%esp)" : : : "cc", "memory");
57 #endif
58 }
59 compiler_barrier();
60 }
61
62 template<>
63 struct OrderAccess::PlatformOrderedStore<1, RELEASE_X_FENCE>
64 VALUE_OBJ_CLASS_SPEC
65 {
66 template <typename T>
67 void operator()(T v, volatile T* p) const {
68 __asm__ volatile ( "xchgb (%2),%0"
69 : "=q" (v)
70 : "0" (v), "r" (p)
71 : "memory");
72 }
73 };
74
75 template<>
76 struct OrderAccess::PlatformOrderedStore<2, RELEASE_X_FENCE>
77 VALUE_OBJ_CLASS_SPEC
78 {
79 template <typename T>
80 void operator()(T v, volatile T* p) const {
81 __asm__ volatile ( "xchgw (%2),%0"
82 : "=r" (v)
83 : "0" (v), "r" (p)
84 : "memory");
85 }
86 };
87
88 template<>
89 struct OrderAccess::PlatformOrderedStore<4, RELEASE_X_FENCE>
90 VALUE_OBJ_CLASS_SPEC
91 {
92 template <typename T>
93 void operator()(T v, volatile T* p) const {
94 __asm__ volatile ( "xchgl (%2),%0"
95 : "=r" (v)
96 : "0" (v), "r" (p)
97 : "memory");
98 }
99 };
100
101 #ifdef AMD64
102 template<>
103 struct OrderAccess::PlatformOrderedStore<8, RELEASE_X_FENCE>
104 VALUE_OBJ_CLASS_SPEC
105 {
106 template <typename T>
107 void operator()(T v, volatile T* p) const {
108 __asm__ volatile ( "xchgq (%2), %0"
109 : "=r" (v)
110 : "0" (v), "r" (p)
111 : "memory");
112 }
113 };
114 #endif // AMD64
115
116 #endif // OS_CPU_LINUX_X86_VM_ORDERACCESS_LINUX_X86_INLINE_HPP
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