< prev index next >

src/hotspot/cpu/arm/stubGenerator_arm.cpp

G1BarrierSet_merge

*** 2868,2878 **** // callee_saved_regs must include addr and count // Blows all volatile registers (R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR) except for callee_saved_regs. void gen_write_ref_array_pre_barrier(Register addr, Register count, int callee_saved_regs) { BarrierSet* bs = Universe::heap()->barrier_set(); switch (bs->kind()) { ! case BarrierSet::G1SATBCTLogging: { assert( addr->encoding() < callee_saved_regs, "addr must be saved"); assert(count->encoding() < callee_saved_regs, "count must be saved"); BLOCK_COMMENT("PreBarrier"); --- 2868,2878 ---- // callee_saved_regs must include addr and count // Blows all volatile registers (R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR) except for callee_saved_regs. void gen_write_ref_array_pre_barrier(Register addr, Register count, int callee_saved_regs) { BarrierSet* bs = Universe::heap()->barrier_set(); switch (bs->kind()) { ! case BarrierSet::G1BarrierSet: { assert( addr->encoding() < callee_saved_regs, "addr must be saved"); assert(count->encoding() < callee_saved_regs, "count must be saved"); BLOCK_COMMENT("PreBarrier"); ***************
*** 2930,2940 **** void gen_write_ref_array_post_barrier(Register addr, Register count, Register tmp) { assert_different_registers(addr, count, tmp); BarrierSet* bs = Universe::heap()->barrier_set(); switch (bs->kind()) { ! case BarrierSet::G1SATBCTLogging: { BLOCK_COMMENT("G1PostBarrier"); if (addr != R0) { assert_different_registers(count, R0); __ mov(R0, addr); --- 2930,2940 ---- void gen_write_ref_array_post_barrier(Register addr, Register count, Register tmp) { assert_different_registers(addr, count, tmp); BarrierSet* bs = Universe::heap()->barrier_set(); switch (bs->kind()) { ! case BarrierSet::G1BarrierSet: { BLOCK_COMMENT("G1PostBarrier"); if (addr != R0) { assert_different_registers(count, R0); __ mov(R0, addr);
< prev index next >