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src/hotspot/cpu/arm/stubGenerator_arm.cpp

G1BarrierSet_merge

2852     }                                                                                                                                
2853 
2854     return start;                                                                                                                    
2855   }                                                                                                                                  
2856 
2857 #if INCLUDE_ALL_GCS                                                                                                                  
2858   //                                                                                                                                 
2859   //  Generate pre-write barrier for array.                                                                                          
2860   //                                                                                                                                 
2861   //  Input:                                                                                                                         
2862   //     addr     - register containing starting address                                                                             
2863   //     count    - register containing element count, 32-bit int                                                                    
2864   //     callee_saved_regs -                                                                                                         
2865   //                the call must preserve this number of registers: R0, R1, ..., R[callee_saved_regs-1]                             
2866   //                                                                                                                                 
2867   //  callee_saved_regs must include addr and count                                                                                  
2868   //  Blows all volatile registers (R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR) except for callee_saved_regs.                 
2869   void gen_write_ref_array_pre_barrier(Register addr, Register count, int callee_saved_regs) {                                       
2870     BarrierSet* bs = Universe::heap()->barrier_set();                                                                                
2871     switch (bs->kind()) {                                                                                                            
2872     case BarrierSet::G1SATBCTLogging:                                                                                                
2873       {                                                                                                                              
2874         assert( addr->encoding() < callee_saved_regs, "addr must be saved");                                                         
2875         assert(count->encoding() < callee_saved_regs, "count must be saved");                                                        
2876 
2877         BLOCK_COMMENT("PreBarrier");                                                                                                 
2878 
2879 #ifdef AARCH64                                                                                                                       
2880         callee_saved_regs = align_up(callee_saved_regs, 2);                                                                          
2881         for (int i = 0; i < callee_saved_regs; i += 2) {                                                                             
2882           __ raw_push(as_Register(i), as_Register(i+1));                                                                             
2883         }                                                                                                                            
2884 #else                                                                                                                                
2885         RegisterSet saved_regs = RegisterSet(R0, as_Register(callee_saved_regs-1));                                                  
2886         __ push(saved_regs | R9ifScratched);                                                                                         
2887 #endif // AARCH64                                                                                                                    
2888 
2889         if (addr != R0) {                                                                                                            
2890           assert_different_registers(count, R0);                                                                                     
2891           __ mov(R0, addr);                                                                                                          

2852     }
2853 
2854     return start;
2855   }
2856 
2857 #if INCLUDE_ALL_GCS
2858   //
2859   //  Generate pre-write barrier for array.
2860   //
2861   //  Input:
2862   //     addr     - register containing starting address
2863   //     count    - register containing element count, 32-bit int
2864   //     callee_saved_regs -
2865   //                the call must preserve this number of registers: R0, R1, ..., R[callee_saved_regs-1]
2866   //
2867   //  callee_saved_regs must include addr and count
2868   //  Blows all volatile registers (R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR) except for callee_saved_regs.
2869   void gen_write_ref_array_pre_barrier(Register addr, Register count, int callee_saved_regs) {
2870     BarrierSet* bs = Universe::heap()->barrier_set();
2871     switch (bs->kind()) {
2872     case BarrierSet::G1BarrierSet:
2873       {
2874         assert( addr->encoding() < callee_saved_regs, "addr must be saved");
2875         assert(count->encoding() < callee_saved_regs, "count must be saved");
2876 
2877         BLOCK_COMMENT("PreBarrier");
2878 
2879 #ifdef AARCH64
2880         callee_saved_regs = align_up(callee_saved_regs, 2);
2881         for (int i = 0; i < callee_saved_regs; i += 2) {
2882           __ raw_push(as_Register(i), as_Register(i+1));
2883         }
2884 #else
2885         RegisterSet saved_regs = RegisterSet(R0, as_Register(callee_saved_regs-1));
2886         __ push(saved_regs | R9ifScratched);
2887 #endif // AARCH64
2888 
2889         if (addr != R0) {
2890           assert_different_registers(count, R0);
2891           __ mov(R0, addr);

2914       ShouldNotReachHere();                                                                                                          
2915     }                                                                                                                                
2916   }                                                                                                                                  
2917 #endif // INCLUDE_ALL_GCS                                                                                                            
2918 
2919   //                                                                                                                                 
2920   //  Generate post-write barrier for array.                                                                                         
2921   //                                                                                                                                 
2922   //  Input:                                                                                                                         
2923   //     addr     - register containing starting address (can be scratched)                                                          
2924   //     count    - register containing element count, 32-bit int (can be scratched)                                                 
2925   //     tmp      - scratch register                                                                                                 
2926   //                                                                                                                                 
2927   //  Note: LR can be scratched but might be equal to addr, count or tmp                                                             
2928   //  Blows all volatile registers (R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR).                                              
2929   void gen_write_ref_array_post_barrier(Register addr, Register count, Register tmp) {                                               
2930     assert_different_registers(addr, count, tmp);                                                                                    
2931     BarrierSet* bs = Universe::heap()->barrier_set();                                                                                
2932 
2933     switch (bs->kind()) {                                                                                                            
2934     case BarrierSet::G1SATBCTLogging:                                                                                                
2935       {                                                                                                                              
2936         BLOCK_COMMENT("G1PostBarrier");                                                                                              
2937         if (addr != R0) {                                                                                                            
2938           assert_different_registers(count, R0);                                                                                     
2939           __ mov(R0, addr);                                                                                                          
2940         }                                                                                                                            
2941 #ifdef AARCH64                                                                                                                       
2942         __ zero_extend(R1, count, 32); // BarrierSet::static_write_ref_array_post takes size_t                                       
2943 #else                                                                                                                                
2944         if (count != R1) {                                                                                                           
2945           __ mov(R1, count);                                                                                                         
2946         }                                                                                                                            
2947 #if R9_IS_SCRATCHED                                                                                                                  
2948         // Safer to save R9 here since callers may have been written                                                                 
2949         // assuming R9 survives. This is suboptimal but is not in                                                                    
2950         // general worth optimizing for the few platforms where R9                                                                   
2951         // is scratched. Note that the optimization might not be to                                                                  
2952         // difficult for this particular call site.                                                                                  
2953         __ push(R9);                                                                                                                 

2914       ShouldNotReachHere();
2915     }
2916   }
2917 #endif // INCLUDE_ALL_GCS
2918 
2919   //
2920   //  Generate post-write barrier for array.
2921   //
2922   //  Input:
2923   //     addr     - register containing starting address (can be scratched)
2924   //     count    - register containing element count, 32-bit int (can be scratched)
2925   //     tmp      - scratch register
2926   //
2927   //  Note: LR can be scratched but might be equal to addr, count or tmp
2928   //  Blows all volatile registers (R0-R3 on 32-bit ARM, R0-R18 on AArch64, Rtemp, LR).
2929   void gen_write_ref_array_post_barrier(Register addr, Register count, Register tmp) {
2930     assert_different_registers(addr, count, tmp);
2931     BarrierSet* bs = Universe::heap()->barrier_set();
2932 
2933     switch (bs->kind()) {
2934     case BarrierSet::G1BarrierSet:
2935       {
2936         BLOCK_COMMENT("G1PostBarrier");
2937         if (addr != R0) {
2938           assert_different_registers(count, R0);
2939           __ mov(R0, addr);
2940         }
2941 #ifdef AARCH64
2942         __ zero_extend(R1, count, 32); // BarrierSet::static_write_ref_array_post takes size_t
2943 #else
2944         if (count != R1) {
2945           __ mov(R1, count);
2946         }
2947 #if R9_IS_SCRATCHED
2948         // Safer to save R9 here since callers may have been written
2949         // assuming R9 survives. This is suboptimal but is not in
2950         // general worth optimizing for the few platforms where R9
2951         // is scratched. Note that the optimization might not be to
2952         // difficult for this particular call site.
2953         __ push(R9);
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