G1BarrierSet_merge

0 /*
1  * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
2  * Copyright (c) 2016 SAP SE. All rights reserved.
3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4  *
5  * This code is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 only, as
7  * published by the Free Software Foundation.
8  *
9  * This code is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * version 2 for more details (a copy is included in the LICENSE file that
13  * accompanied this code).
14  *
15  * You should have received a copy of the GNU General Public License version
16  * 2 along with this work; if not, write to the Free Software Foundation,
17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18  *
19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20  * or visit www.oracle.com if you need additional information or have any
21  * questions.
22  *
23  */
24 
25 #include "precompiled.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "compiler/disassembler.hpp"
28 #include "gc/shared/collectedHeap.inline.hpp"
29 #include "interpreter/interpreter.hpp"
30 #include "gc/shared/cardTableModRefBS.hpp"
31 #include "memory/resourceArea.hpp"
32 #include "prims/methodHandles.hpp"
33 #include "runtime/biasedLocking.hpp"
34 #include "runtime/interfaceSupport.hpp"
35 #include "runtime/objectMonitor.hpp"
36 #include "runtime/os.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "utilities/macros.hpp"
40 #if INCLUDE_ALL_GCS
41 #include "gc/g1/g1BarrierSet.hpp"
42 #include "gc/g1/g1CollectedHeap.inline.hpp"

43 #include "gc/g1/heapRegion.hpp"
44 #endif
45 
46 // Convention: Use Z_R0 and Z_R1 instead of Z_scratch_* in all
47 // assembler_s390.* files.
48 
49 // Convert the raw encoding form into the form expected by the
50 // constructor for Address. This is called by adlc generated code.
51 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) {
52   assert(scale == 0, "Scale should not be used on z/Architecture. The call to make_raw is "
53          "generated by adlc and this must mirror all features of Operands from machnode.hpp.");
54   assert(disp_reloc == relocInfo::none, "not implemented on z/Architecture.");
55 
56   Address madr(as_Register(base), as_Register(index), in_ByteSize(disp));
57   return madr;
58 }
59 
60 int AbstractAssembler::code_fill_byte() {
61   return 0x00; // Illegal instruction 0x00000000.
62 }
63 
64 // Condition code masks. Details see enum branch_condition.
65 // Although this method is meant for INT CCs, the Overflow/Ordered
66 // bit in the masks has to be considered. The CC might have been set
67 // by a float operation, but is evaluated while calculating an integer
68 // result. See elementary test TestFloat.isNotEqual(FF)Z for example.
69 Assembler::branch_condition Assembler::inverse_condition(Assembler::branch_condition cc) {
70   Assembler::branch_condition unordered_bit = (Assembler::branch_condition)(cc & bcondNotOrdered);
71   Assembler::branch_condition inverse_cc;
72 
73   // Some are commented out to avoid duplicate labels.
74   switch (cc) {
75     case bcondNever       : inverse_cc = bcondAlways;      break;  //  0 -> 15
76     case bcondAlways      : inverse_cc = bcondNever;       break;  // 15 ->  0
77 
78     case bcondOverflow    : inverse_cc = bcondNotOverflow; break;  //  1 -> 14
79     case bcondNotOverflow : inverse_cc = bcondOverflow;    break;  // 14 ->  1
80 
81     default :
82       switch ((Assembler::branch_condition)(cc & bcondOrdered)) {
83         case bcondEqual       : inverse_cc = bcondNotEqual;  break;  //  8 ->  6
84         // case bcondZero        :
85         // case bcondAllZero     :
86 
87         case bcondNotEqual    : inverse_cc = bcondEqual;     break;  //  6 ->  8
88         // case bcondNotZero     :
89         // case bcondMixed       :
90 
91         case bcondLow         : inverse_cc = bcondNotLow;    break;  //  4 -> 10
92         // case bcondNegative    :
93 
94         case bcondNotLow      : inverse_cc = bcondLow;       break;  // 10 ->  4
95         // case bcondNotNegative :
96 
97         case bcondHigh        : inverse_cc = bcondNotHigh;   break;  //  2 -> 12
98         // case bcondPositive    :
99 
100         case bcondNotHigh     : inverse_cc = bcondHigh;      break;  // 12 ->  2
101         // case bcondNotPositive :
102 
103         default :
104           fprintf(stderr, "inverse_condition(%d)\n", (int)cc);
105           fflush(stderr);
106           ShouldNotReachHere();
107           return bcondNever;
108       }
109       // If cc is even, inverse_cc must be odd.
110       if (!unordered_bit) {
111         inverse_cc = (Assembler::branch_condition)(inverse_cc | bcondNotOrdered);
112       }
113       break;
114   }
115   return inverse_cc;
116 }
117 
118 Assembler::branch_condition Assembler::inverse_float_condition(Assembler::branch_condition cc) {
119   Assembler::branch_condition  inverse_cc;
120 
121   switch (cc) {
122     case bcondNever       : inverse_cc = bcondAlways;      break;  //  0
123     case bcondAlways      : inverse_cc = bcondNever;       break;  // 15
124 
125     case bcondNotOrdered  : inverse_cc = bcondOrdered;     break;  // 14
126     case bcondOrdered     : inverse_cc = bcondNotOrdered;  break;  //  1
127 
128     case bcondEqual                      : inverse_cc = (branch_condition)(bcondNotEqual + bcondNotOrdered);  break; //  8
129     case bcondNotEqual + bcondNotOrdered : inverse_cc = bcondEqual;  break;                                          //  7
130 
131     case bcondLow      + bcondNotOrdered : inverse_cc = (branch_condition)(bcondHigh + bcondEqual);      break;      //  5
132     case bcondNotLow                     : inverse_cc = (branch_condition)(bcondLow  + bcondNotOrdered); break;      // 10
133 
134     case bcondHigh                       : inverse_cc = (branch_condition)(bcondLow  + bcondNotOrdered + bcondEqual); break;  //  2
135     case bcondNotHigh  + bcondNotOrdered : inverse_cc = bcondHigh; break;                                                     // 13
136 
137     default :
138       fprintf(stderr, "inverse_float_condition(%d)\n", (int)cc);
139       fflush(stderr);
140       ShouldNotReachHere();
141       return bcondNever;
142   }
143   return inverse_cc;
144 }
145 
146 #ifdef ASSERT
147 void Assembler::print_dbg_msg(outputStream* out, unsigned long inst, const char* msg, int ilen) {
148   out->flush();
149   switch (ilen) {
150     case 2:  out->print_cr("inst = %4.4x, %s",    (unsigned short)inst, msg); break;
151     case 4:  out->print_cr("inst = %8.8x, %s\n",    (unsigned int)inst, msg); break;
152     case 6:  out->print_cr("inst = %12.12lx, %s\n",               inst, msg); break;
153     default: out->print_cr("inst = %16.16lx, %s\n",               inst, msg); break;
154   }
155   out->flush();
156 }
157 
158 void Assembler::dump_code_range(outputStream* out, address pc, const unsigned int range, const char* msg) {
159   out->cr();
160   out->print_cr("-------------------------------");
161   out->print_cr("--  %s", msg);
162   out->print_cr("-------------------------------");
163   out->print_cr("Hex dump    of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range);
164   os::print_hex_dump(out, pc-range, pc+range, 2);
165 
166   out->cr();
167   out->print_cr("Disassembly of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range);
168   Disassembler::decode(pc, pc + range, out);
169 }
170 #endif
--- EOF ---