33 #include "memory/resourceArea.hpp"
34 #include "memory/universe.hpp"
35 #include "oops/klass.inline.hpp"
36 #include "opto/compile.hpp"
37 #include "opto/intrinsicnode.hpp"
38 #include "opto/matcher.hpp"
39 #include "prims/methodHandles.hpp"
40 #include "registerSaver_s390.hpp"
41 #include "runtime/biasedLocking.hpp"
42 #include "runtime/icache.hpp"
43 #include "runtime/interfaceSupport.hpp"
44 #include "runtime/objectMonitor.hpp"
45 #include "runtime/os.hpp"
46 #include "runtime/safepoint.hpp"
47 #include "runtime/safepointMechanism.hpp"
48 #include "runtime/sharedRuntime.hpp"
49 #include "runtime/stubRoutines.hpp"
50 #include "utilities/events.hpp"
51 #include "utilities/macros.hpp"
52 #if INCLUDE_ALL_GCS
53 #include "gc/g1/g1CardTable.hpp"
54 #include "gc/g1/g1CollectedHeap.inline.hpp"
55 #include "gc/g1/g1SATBCardTableModRefBS.hpp"
56 #include "gc/g1/heapRegion.hpp"
57 #endif
58
59 #include <ucontext.h>
60
61 #define BLOCK_COMMENT(str) block_comment(str)
62 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
63
64 // Move 32-bit register if destination and source are different.
65 void MacroAssembler::lr_if_needed(Register rd, Register rs) {
66 if (rs != rd) { z_lr(rd, rs); }
67 }
68
69 // Move register if destination and source are different.
70 void MacroAssembler::lgr_if_needed(Register rd, Register rs) {
71 if (rs != rd) { z_lgr(rd, rs); }
72 }
73
74 // Zero-extend 32-bit register into 64-bit register if destination and source are different.
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33 #include "memory/resourceArea.hpp"
34 #include "memory/universe.hpp"
35 #include "oops/klass.inline.hpp"
36 #include "opto/compile.hpp"
37 #include "opto/intrinsicnode.hpp"
38 #include "opto/matcher.hpp"
39 #include "prims/methodHandles.hpp"
40 #include "registerSaver_s390.hpp"
41 #include "runtime/biasedLocking.hpp"
42 #include "runtime/icache.hpp"
43 #include "runtime/interfaceSupport.hpp"
44 #include "runtime/objectMonitor.hpp"
45 #include "runtime/os.hpp"
46 #include "runtime/safepoint.hpp"
47 #include "runtime/safepointMechanism.hpp"
48 #include "runtime/sharedRuntime.hpp"
49 #include "runtime/stubRoutines.hpp"
50 #include "utilities/events.hpp"
51 #include "utilities/macros.hpp"
52 #if INCLUDE_ALL_GCS
53 #include "gc/g1/g1BarrierSet.hpp"
54 #include "gc/g1/g1CardTable.hpp"
55 #include "gc/g1/g1CollectedHeap.inline.hpp"
56 #include "gc/g1/heapRegion.hpp"
57 #endif
58
59 #include <ucontext.h>
60
61 #define BLOCK_COMMENT(str) block_comment(str)
62 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
63
64 // Move 32-bit register if destination and source are different.
65 void MacroAssembler::lr_if_needed(Register rd, Register rs) {
66 if (rs != rd) { z_lr(rd, rs); }
67 }
68
69 // Move register if destination and source are different.
70 void MacroAssembler::lgr_if_needed(Register rd, Register rs) {
71 if (rs != rd) { z_lgr(rd, rs); }
72 }
73
74 // Zero-extend 32-bit register into 64-bit register if destination and source are different.
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3691 }
3692 if (pre_val_needed && Rpre_val->is_volatile()) {
3693 lgr_if_needed(Rpre_val, Rpre_save);
3694 }
3695
3696 bind(filtered);
3697 BLOCK_COMMENT("} g1_write_barrier_pre");
3698 }
3699
3700 // General G1 post-barrier generator.
3701 // Purpose: Store cross-region card.
3702 void MacroAssembler::g1_write_barrier_post(Register Rstore_addr,
3703 Register Rnew_val,
3704 Register Rtmp1,
3705 Register Rtmp2,
3706 Register Rtmp3) {
3707 Label callRuntime, filtered;
3708
3709 assert_different_registers(Rstore_addr, Rnew_val, Rtmp1, Rtmp2); // Most probably, Rnew_val == Rtmp3.
3710
3711 G1SATBCardTableModRefBS* bs = (G1SATBCardTableModRefBS*) Universe::heap()->barrier_set();
3712 CardTable* ct = bs->card_table();
3713 assert(bs->kind() == BarrierSet::G1SATBCTLogging, "wrong barrier");
3714
3715 BLOCK_COMMENT("g1_write_barrier_post {");
3716
3717 // Does store cross heap regions?
3718 // It does if the two addresses specify different grain addresses.
3719 if (G1RSBarrierRegionFilter) {
3720 if (VM_Version::has_DistinctOpnds()) {
3721 z_xgrk(Rtmp1, Rstore_addr, Rnew_val);
3722 } else {
3723 z_lgr(Rtmp1, Rstore_addr);
3724 z_xgr(Rtmp1, Rnew_val);
3725 }
3726 z_srag(Rtmp1, Rtmp1, HeapRegion::LogOfHRGrainBytes);
3727 z_bre(filtered);
3728 }
3729
3730 // Crosses regions, storing NULL?
3731 #ifdef ASSERT
3732 z_ltgr(Rnew_val, Rnew_val);
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3691 }
3692 if (pre_val_needed && Rpre_val->is_volatile()) {
3693 lgr_if_needed(Rpre_val, Rpre_save);
3694 }
3695
3696 bind(filtered);
3697 BLOCK_COMMENT("} g1_write_barrier_pre");
3698 }
3699
3700 // General G1 post-barrier generator.
3701 // Purpose: Store cross-region card.
3702 void MacroAssembler::g1_write_barrier_post(Register Rstore_addr,
3703 Register Rnew_val,
3704 Register Rtmp1,
3705 Register Rtmp2,
3706 Register Rtmp3) {
3707 Label callRuntime, filtered;
3708
3709 assert_different_registers(Rstore_addr, Rnew_val, Rtmp1, Rtmp2); // Most probably, Rnew_val == Rtmp3.
3710
3711 G1BarrierSet* bs = barrier_set_cast<G1BarrierSet>(Universe::heap()->barrier_set());
3712 CardTable* ct = bs->card_table();
3713 assert(bs->kind() == BarrierSet::G1BarrierSet, "wrong barrier");
3714
3715 BLOCK_COMMENT("g1_write_barrier_post {");
3716
3717 // Does store cross heap regions?
3718 // It does if the two addresses specify different grain addresses.
3719 if (G1RSBarrierRegionFilter) {
3720 if (VM_Version::has_DistinctOpnds()) {
3721 z_xgrk(Rtmp1, Rstore_addr, Rnew_val);
3722 } else {
3723 z_lgr(Rtmp1, Rstore_addr);
3724 z_xgr(Rtmp1, Rnew_val);
3725 }
3726 z_srag(Rtmp1, Rtmp1, HeapRegion::LogOfHRGrainBytes);
3727 z_bre(filtered);
3728 }
3729
3730 // Crosses regions, storing NULL?
3731 #ifdef ASSERT
3732 z_ltgr(Rnew_val, Rnew_val);
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