1 /* 2 * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2016 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "asm/assembler.inline.hpp" 28 #include "compiler/disassembler.hpp" 29 #include "gc/shared/collectedHeap.inline.hpp" 30 #include "interpreter/interpreter.hpp" 31 #include "gc/shared/cardTableModRefBS.hpp" 32 #include "memory/resourceArea.hpp" 33 #include "prims/methodHandles.hpp" 34 #include "runtime/biasedLocking.hpp" 35 #include "runtime/interfaceSupport.hpp" 36 #include "runtime/objectMonitor.hpp" 37 #include "runtime/os.hpp" 38 #include "runtime/sharedRuntime.hpp" 39 #include "runtime/stubRoutines.hpp" 40 #include "utilities/macros.hpp" 41 #if INCLUDE_ALL_GCS 42 #include "gc/g1/g1BarrierSet.hpp" 43 #include "gc/g1/g1CollectedHeap.inline.hpp" 44 #include "gc/g1/heapRegion.hpp" 45 #endif 46 47 // Convention: Use Z_R0 and Z_R1 instead of Z_scratch_* in all 48 // assembler_s390.* files. 49 50 // Convert the raw encoding form into the form expected by the 51 // constructor for Address. This is called by adlc generated code. 52 Address Address::make_raw(int base, int index, int scale, int disp, relocInfo::relocType disp_reloc) { 53 assert(scale == 0, "Scale should not be used on z/Architecture. The call to make_raw is " 54 "generated by adlc and this must mirror all features of Operands from machnode.hpp."); 55 assert(disp_reloc == relocInfo::none, "not implemented on z/Architecture."); 56 57 Address madr(as_Register(base), as_Register(index), in_ByteSize(disp)); 58 return madr; 59 } 60 61 int AbstractAssembler::code_fill_byte() { 62 return 0x00; // Illegal instruction 0x00000000. 63 } 64 65 // Condition code masks. Details see enum branch_condition. 66 // Although this method is meant for INT CCs, the Overflow/Ordered 67 // bit in the masks has to be considered. The CC might have been set 68 // by a float operation, but is evaluated while calculating an integer 69 // result. See elementary test TestFloat.isNotEqual(FF)Z for example. 70 Assembler::branch_condition Assembler::inverse_condition(Assembler::branch_condition cc) { 71 Assembler::branch_condition unordered_bit = (Assembler::branch_condition)(cc & bcondNotOrdered); 72 Assembler::branch_condition inverse_cc; 73 74 // Some are commented out to avoid duplicate labels. 75 switch (cc) { 76 case bcondNever : inverse_cc = bcondAlways; break; // 0 -> 15 77 case bcondAlways : inverse_cc = bcondNever; break; // 15 -> 0 78 79 case bcondOverflow : inverse_cc = bcondNotOverflow; break; // 1 -> 14 80 case bcondNotOverflow : inverse_cc = bcondOverflow; break; // 14 -> 1 81 82 default : 83 switch ((Assembler::branch_condition)(cc & bcondOrdered)) { 84 case bcondEqual : inverse_cc = bcondNotEqual; break; // 8 -> 6 85 // case bcondZero : 86 // case bcondAllZero : 87 88 case bcondNotEqual : inverse_cc = bcondEqual; break; // 6 -> 8 89 // case bcondNotZero : 90 // case bcondMixed : 91 92 case bcondLow : inverse_cc = bcondNotLow; break; // 4 -> 10 93 // case bcondNegative : 94 95 case bcondNotLow : inverse_cc = bcondLow; break; // 10 -> 4 96 // case bcondNotNegative : 97 98 case bcondHigh : inverse_cc = bcondNotHigh; break; // 2 -> 12 99 // case bcondPositive : 100 101 case bcondNotHigh : inverse_cc = bcondHigh; break; // 12 -> 2 102 // case bcondNotPositive : 103 104 default : 105 fprintf(stderr, "inverse_condition(%d)\n", (int)cc); 106 fflush(stderr); 107 ShouldNotReachHere(); 108 return bcondNever; 109 } 110 // If cc is even, inverse_cc must be odd. 111 if (!unordered_bit) { 112 inverse_cc = (Assembler::branch_condition)(inverse_cc | bcondNotOrdered); 113 } 114 break; 115 } 116 return inverse_cc; 117 } 118 119 Assembler::branch_condition Assembler::inverse_float_condition(Assembler::branch_condition cc) { 120 Assembler::branch_condition inverse_cc; 121 122 switch (cc) { 123 case bcondNever : inverse_cc = bcondAlways; break; // 0 124 case bcondAlways : inverse_cc = bcondNever; break; // 15 125 126 case bcondNotOrdered : inverse_cc = bcondOrdered; break; // 14 127 case bcondOrdered : inverse_cc = bcondNotOrdered; break; // 1 128 129 case bcondEqual : inverse_cc = (branch_condition)(bcondNotEqual + bcondNotOrdered); break; // 8 130 case bcondNotEqual + bcondNotOrdered : inverse_cc = bcondEqual; break; // 7 131 132 case bcondLow + bcondNotOrdered : inverse_cc = (branch_condition)(bcondHigh + bcondEqual); break; // 5 133 case bcondNotLow : inverse_cc = (branch_condition)(bcondLow + bcondNotOrdered); break; // 10 134 135 case bcondHigh : inverse_cc = (branch_condition)(bcondLow + bcondNotOrdered + bcondEqual); break; // 2 136 case bcondNotHigh + bcondNotOrdered : inverse_cc = bcondHigh; break; // 13 137 138 default : 139 fprintf(stderr, "inverse_float_condition(%d)\n", (int)cc); 140 fflush(stderr); 141 ShouldNotReachHere(); 142 return bcondNever; 143 } 144 return inverse_cc; 145 } 146 147 #ifdef ASSERT 148 void Assembler::print_dbg_msg(outputStream* out, unsigned long inst, const char* msg, int ilen) { 149 out->flush(); 150 switch (ilen) { 151 case 2: out->print_cr("inst = %4.4x, %s", (unsigned short)inst, msg); break; 152 case 4: out->print_cr("inst = %8.8x, %s\n", (unsigned int)inst, msg); break; 153 case 6: out->print_cr("inst = %12.12lx, %s\n", inst, msg); break; 154 default: out->print_cr("inst = %16.16lx, %s\n", inst, msg); break; 155 } 156 out->flush(); 157 } 158 159 void Assembler::dump_code_range(outputStream* out, address pc, const unsigned int range, const char* msg) { 160 out->cr(); 161 out->print_cr("-------------------------------"); 162 out->print_cr("-- %s", msg); 163 out->print_cr("-------------------------------"); 164 out->print_cr("Hex dump of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range); 165 os::print_hex_dump(out, pc-range, pc+range, 2); 166 167 out->cr(); 168 out->print_cr("Disassembly of +/-%d bytes around %p, interval [%p,%p)", range, pc, pc-range, pc+range); 169 Disassembler::decode(pc, pc + range, out); 170 } 171 #endif