10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * version 2 for more details (a copy is included in the LICENSE file that
12 * accompanied this code).
13 *
14 * You should have received a copy of the GNU General Public License version
15 * 2 along with this work; if not, write to the Free Software Foundation,
16 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
19 * or visit www.oracle.com if you need additional information or have any
20 * questions.
21 *
22 */
23
24 #ifndef CPU_ARM_GC_G1_G1BARRIERSETASSEMBLER_ARM_HPP
25 #define CPU_ARM_GC_G1_G1BARRIERSETASSEMBLER_ARM_HPP
26
27 #include "asm/macroAssembler.hpp"
28 #include "gc/shared/modRefBarrierSetAssembler.hpp"
29
30 class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
31 protected:
32 void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
33 Register addr, Register count, int callee_saved_regs);
34 void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
35 Register addr, Register count, Register tmp);
36 };
37
38 #endif // CPU_ARM_GC_G1_G1BARRIERSETASSEMBLER_ARM_HPP
|
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * version 2 for more details (a copy is included in the LICENSE file that
12 * accompanied this code).
13 *
14 * You should have received a copy of the GNU General Public License version
15 * 2 along with this work; if not, write to the Free Software Foundation,
16 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
19 * or visit www.oracle.com if you need additional information or have any
20 * questions.
21 *
22 */
23
24 #ifndef CPU_ARM_GC_G1_G1BARRIERSETASSEMBLER_ARM_HPP
25 #define CPU_ARM_GC_G1_G1BARRIERSETASSEMBLER_ARM_HPP
26
27 #include "asm/macroAssembler.hpp"
28 #include "gc/shared/modRefBarrierSetAssembler.hpp"
29
30 class LIR_Assembler;
31 class StubAssembler;
32 class G1PreBarrierStub;
33 class G1PostBarrierStub;
34
35 class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
36 protected:
37 void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
38 Register addr, Register count, int callee_saved_regs);
39 void gen_write_ref_array_post_barrier(MacroAssembler* masm, DecoratorSet decorators,
40 Register addr, Register count, Register tmp);
41
42 void gen_g1_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
43 void gen_g1_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
44
45 void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
46 void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
47 };
48
49 #endif // CPU_ARM_GC_G1_G1BARRIERSETASSEMBLER_ARM_HPP
|