1 /* 2 * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2016, 2017, SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "c1/c1_Compilation.hpp" 28 #include "c1/c1_FrameMap.hpp" 29 #include "c1/c1_Instruction.hpp" 30 #include "c1/c1_LIRAssembler.hpp" 31 #include "c1/c1_LIRGenerator.hpp" 32 #include "c1/c1_Runtime1.hpp" 33 #include "c1/c1_ValueStack.hpp" 34 #include "ci/ciArray.hpp" 35 #include "ci/ciObjArrayKlass.hpp" 36 #include "ci/ciTypeArrayKlass.hpp" 37 #include "runtime/sharedRuntime.hpp" 38 #include "runtime/stubRoutines.hpp" 39 #include "vmreg_s390.inline.hpp" 40 41 #ifdef ASSERT 42 #define __ gen()->lir(__FILE__, __LINE__)-> 43 #else 44 #define __ gen()->lir()-> 45 #endif 46 47 void LIRItem::load_byte_item() { 48 // Byte loads use same registers as other loads. 49 load_item(); 50 } 51 52 void LIRItem::load_nonconstant(int bits) { 53 LIR_Opr r = value()->operand(); 54 if (_gen->can_inline_as_constant(value(), bits)) { 55 if (!r->is_constant()) { 56 r = LIR_OprFact::value_type(value()->type()); 57 } 58 _result = r; 59 } else { 60 load_item(); 61 } 62 } 63 64 //-------------------------------------------------------------- 65 // LIRGenerator 66 //-------------------------------------------------------------- 67 68 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::as_oop_opr(Z_EXC_OOP); } 69 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::as_opr(Z_EXC_PC); } 70 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::Z_R11_opr; } 71 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::Z_R11_opr; } 72 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::Z_R10_opr; } 73 LIR_Opr LIRGenerator::ldivInOpr() { return FrameMap::Z_R11_long_opr; } 74 LIR_Opr LIRGenerator::ldivOutOpr() { return FrameMap::Z_R11_long_opr; } 75 LIR_Opr LIRGenerator::lremOutOpr() { return FrameMap::Z_R10_long_opr; } 76 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); } 77 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::Z_R13_opr; } 78 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } 79 80 LIR_Opr LIRGenerator::result_register_for (ValueType* type, bool callee) { 81 LIR_Opr opr; 82 switch (type->tag()) { 83 case intTag: opr = FrameMap::Z_R2_opr; break; 84 case objectTag: opr = FrameMap::Z_R2_oop_opr; break; 85 case longTag: opr = FrameMap::Z_R2_long_opr; break; 86 case floatTag: opr = FrameMap::Z_F0_opr; break; 87 case doubleTag: opr = FrameMap::Z_F0_double_opr; break; 88 89 case addressTag: 90 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 91 } 92 93 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 94 return opr; 95 } 96 97 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { 98 return new_register(T_INT); 99 } 100 101 //--------- Loading items into registers. -------------------------------- 102 103 // z/Architecture cannot inline all constants. 104 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 105 if (v->type()->as_IntConstant() != NULL) { 106 return Immediate::is_simm16(v->type()->as_IntConstant()->value()); 107 } else if (v->type()->as_LongConstant() != NULL) { 108 return Immediate::is_simm16(v->type()->as_LongConstant()->value()); 109 } else if (v->type()->as_ObjectConstant() != NULL) { 110 return v->type()->as_ObjectConstant()->value()->is_null_object(); 111 } else { 112 return false; 113 } 114 } 115 116 bool LIRGenerator::can_inline_as_constant(Value i, int bits) const { 117 if (i->type()->as_IntConstant() != NULL) { 118 return Assembler::is_simm(i->type()->as_IntConstant()->value(), bits); 119 } else if (i->type()->as_LongConstant() != NULL) { 120 return Assembler::is_simm(i->type()->as_LongConstant()->value(), bits); 121 } else { 122 return can_store_as_constant(i, as_BasicType(i->type())); 123 } 124 } 125 126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { 127 if (c->type() == T_INT) { 128 return Immediate::is_simm20(c->as_jint()); 129 } else if (c->type() == T_LONG) { 130 return Immediate::is_simm20(c->as_jlong()); 131 } 132 return false; 133 } 134 135 LIR_Opr LIRGenerator::safepoint_poll_register() { 136 return new_register(longType); 137 } 138 139 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 140 int shift, int disp, BasicType type) { 141 assert(base->is_register(), "must be"); 142 if (index->is_constant()) { 143 intx large_disp = disp; 144 LIR_Const *constant = index->as_constant_ptr(); 145 if (constant->type() == T_LONG) { 146 large_disp += constant->as_jlong() << shift; 147 } else { 148 large_disp += (intx)(constant->as_jint()) << shift; 149 } 150 if (Displacement::is_validDisp(large_disp)) { 151 return new LIR_Address(base, large_disp, type); 152 } 153 // Index is illegal so replace it with the displacement loaded into a register. 154 index = new_pointer_register(); 155 __ move(LIR_OprFact::intptrConst(large_disp), index); 156 return new LIR_Address(base, index, type); 157 } else { 158 if (shift > 0) { 159 LIR_Opr tmp = new_pointer_register(); 160 __ shift_left(index, shift, tmp); 161 index = tmp; 162 } 163 return new LIR_Address(base, index, disp, type); 164 } 165 } 166 167 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 168 BasicType type) { 169 int elem_size = type2aelembytes(type); 170 int shift = exact_log2(elem_size); 171 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 172 173 LIR_Address* addr; 174 if (index_opr->is_constant()) { 175 addr = new LIR_Address(array_opr, 176 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type); 177 } else { 178 if (index_opr->type() == T_INT) { 179 LIR_Opr tmp = new_register(T_LONG); 180 __ convert(Bytecodes::_i2l, index_opr, tmp); 181 index_opr = tmp; 182 } 183 if (shift > 0) { 184 __ shift_left(index_opr, shift, index_opr); 185 } 186 addr = new LIR_Address(array_opr, 187 index_opr, 188 offset_in_bytes, type); 189 } 190 return addr; 191 } 192 193 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { 194 LIR_Opr r = LIR_OprFact::illegalOpr; 195 if (type == T_LONG) { 196 r = LIR_OprFact::longConst(x); 197 } else if (type == T_INT) { 198 r = LIR_OprFact::intConst(x); 199 } else { 200 ShouldNotReachHere(); 201 } 202 return r; 203 } 204 205 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 206 LIR_Opr pointer = new_pointer_register(); 207 __ move(LIR_OprFact::intptrConst(counter), pointer); 208 LIR_Address* addr = new LIR_Address(pointer, type); 209 increment_counter(addr, step); 210 } 211 212 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 213 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); 214 } 215 216 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 217 LIR_Opr scratch = FrameMap::Z_R1_opr; 218 __ load(new LIR_Address(base, disp, T_INT), scratch, info); 219 __ cmp(condition, scratch, c); 220 } 221 222 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 223 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 224 } 225 226 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { 227 if (tmp->is_valid()) { 228 if (is_power_of_2(c + 1)) { 229 __ move(left, tmp); 230 __ shift_left(left, log2_intptr(c + 1), left); 231 __ sub(left, tmp, result); 232 return true; 233 } else if (is_power_of_2(c - 1)) { 234 __ move(left, tmp); 235 __ shift_left(left, log2_intptr(c - 1), left); 236 __ add(left, tmp, result); 237 return true; 238 } 239 } 240 return false; 241 } 242 243 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 244 BasicType type = item->type(); 245 __ store(item, new LIR_Address(FrameMap::Z_SP_opr, in_bytes(offset_from_sp), type)); 246 } 247 248 //---------------------------------------------------------------------- 249 // visitor functions 250 //---------------------------------------------------------------------- 251 252 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) { 253 LIR_Opr tmp1 = new_register(objectType); 254 LIR_Opr tmp2 = new_register(objectType); 255 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 256 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci); 257 } 258 259 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 260 assert(x->is_pinned(),""); 261 LIRItem obj(x->obj(), this); 262 obj.load_item(); 263 264 set_no_result(x); 265 266 // "lock" stores the address of the monitor stack slot, so this is not an oop. 267 LIR_Opr lock = new_register(T_INT); 268 269 CodeEmitInfo* info_for_exception = NULL; 270 if (x->needs_null_check()) { 271 info_for_exception = state_for (x); 272 } 273 // This CodeEmitInfo must not have the xhandlers because here the 274 // object is already locked (xhandlers expect object to be unlocked). 275 CodeEmitInfo* info = state_for (x, x->state(), true); 276 monitor_enter(obj.result(), lock, syncTempOpr(), LIR_OprFact::illegalOpr, 277 x->monitor_no(), info_for_exception, info); 278 } 279 280 void LIRGenerator::do_MonitorExit(MonitorExit* x) { 281 assert(x->is_pinned(),""); 282 283 LIRItem obj(x->obj(), this); 284 obj.dont_load_item(); 285 286 LIR_Opr lock = new_register(T_INT); 287 LIR_Opr obj_temp = new_register(T_INT); 288 set_no_result(x); 289 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); 290 } 291 292 // _ineg, _lneg, _fneg, _dneg 293 void LIRGenerator::do_NegateOp(NegateOp* x) { 294 LIRItem value(x->x(), this); 295 value.load_item(); 296 LIR_Opr reg = rlock_result(x); 297 __ negate(value.result(), reg); 298 } 299 300 // for _fadd, _fmul, _fsub, _fdiv, _frem 301 // _dadd, _dmul, _dsub, _ddiv, _drem 302 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 303 LIRItem left(x->x(), this); 304 LIRItem right(x->y(), this); 305 LIRItem* left_arg = &left; 306 LIRItem* right_arg = &right; 307 assert(!left.is_stack(), "can't both be memory operands"); 308 left.load_item(); 309 310 if (right.is_register() || right.is_constant()) { 311 right.load_item(); 312 } else { 313 right.dont_load_item(); 314 } 315 316 if ((x->op() == Bytecodes::_frem) || (x->op() == Bytecodes::_drem)) { 317 address entry; 318 switch (x->op()) { 319 case Bytecodes::_frem: 320 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem); 321 break; 322 case Bytecodes::_drem: 323 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem); 324 break; 325 default: 326 ShouldNotReachHere(); 327 } 328 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL); 329 set_result(x, result); 330 } else { 331 LIR_Opr reg = rlock(x); 332 LIR_Opr tmp = LIR_OprFact::illegalOpr; 333 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); 334 set_result(x, reg); 335 } 336 } 337 338 // for _ladd, _lmul, _lsub, _ldiv, _lrem 339 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 340 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) { 341 // Use shifts if divisior is a power of 2 otherwise use DSGR instruction. 342 // Instruction: DSGR R1, R2 343 // input : R1+1: dividend (R1, R1+1 designate a register pair, R1 must be even) 344 // R2: divisor 345 // 346 // output: R1+1: quotient 347 // R1: remainder 348 // 349 // Register selection: R1: Z_R10 350 // R1+1: Z_R11 351 // R2: to be chosen by register allocator (linear scan) 352 353 // R1, and R1+1 will be destroyed. 354 355 LIRItem right(x->y(), this); 356 LIRItem left(x->x() , this); // Visit left second, so that the is_register test is valid. 357 358 // Call state_for before load_item_force because state_for may 359 // force the evaluation of other instructions that are needed for 360 // correct debug info. Otherwise the live range of the fix 361 // register might be too long. 362 CodeEmitInfo* info = state_for (x); 363 364 LIR_Opr result = rlock_result(x); 365 LIR_Opr result_reg = result; 366 LIR_Opr tmp = LIR_OprFact::illegalOpr; 367 LIR_Opr divisor_opr = right.result(); 368 if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jlong())) { 369 left.load_item(); 370 right.dont_load_item(); 371 } else { 372 left.load_item_force(ldivInOpr()); 373 right.load_item(); 374 375 // DSGR instruction needs register pair. 376 if (x->op() == Bytecodes::_ldiv) { 377 result_reg = ldivOutOpr(); 378 tmp = lremOutOpr(); 379 } else { 380 result_reg = lremOutOpr(); 381 tmp = ldivOutOpr(); 382 } 383 } 384 385 if (!ImplicitDiv0Checks) { 386 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); 387 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); 388 // Idiv/irem cannot trap (passing info would generate an assertion). 389 info = NULL; 390 } 391 392 if (x->op() == Bytecodes::_lrem) { 393 __ irem(left.result(), right.result(), result_reg, tmp, info); 394 } else if (x->op() == Bytecodes::_ldiv) { 395 __ idiv(left.result(), right.result(), result_reg, tmp, info); 396 } else { 397 ShouldNotReachHere(); 398 } 399 400 if (result_reg != result) { 401 __ move(result_reg, result); 402 } 403 } else { 404 LIRItem left(x->x(), this); 405 LIRItem right(x->y(), this); 406 407 left.load_item(); 408 right.load_nonconstant(32); 409 rlock_result(x); 410 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); 411 } 412 } 413 414 // for: _iadd, _imul, _isub, _idiv, _irem 415 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 416 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { 417 // Use shifts if divisior is a power of 2 otherwise use DSGFR instruction. 418 // Instruction: DSGFR R1, R2 419 // input : R1+1: dividend (R1, R1+1 designate a register pair, R1 must be even) 420 // R2: divisor 421 // 422 // output: R1+1: quotient 423 // R1: remainder 424 // 425 // Register selection: R1: Z_R10 426 // R1+1: Z_R11 427 // R2: To be chosen by register allocator (linear scan). 428 429 // R1, and R1+1 will be destroyed. 430 431 LIRItem right(x->y(), this); 432 LIRItem left(x->x() , this); // Visit left second, so that the is_register test is valid. 433 434 // Call state_for before load_item_force because state_for may 435 // force the evaluation of other instructions that are needed for 436 // correct debug info. Otherwise the live range of the fix 437 // register might be too long. 438 CodeEmitInfo* info = state_for (x); 439 440 LIR_Opr result = rlock_result(x); 441 LIR_Opr result_reg = result; 442 LIR_Opr tmp = LIR_OprFact::illegalOpr; 443 LIR_Opr divisor_opr = right.result(); 444 if (divisor_opr->is_constant() && is_power_of_2(divisor_opr->as_jint())) { 445 left.load_item(); 446 right.dont_load_item(); 447 } else { 448 left.load_item_force(divInOpr()); 449 right.load_item(); 450 451 // DSGFR instruction needs register pair. 452 if (x->op() == Bytecodes::_idiv) { 453 result_reg = divOutOpr(); 454 tmp = remOutOpr(); 455 } else { 456 result_reg = remOutOpr(); 457 tmp = divOutOpr(); 458 } 459 } 460 461 if (!ImplicitDiv0Checks) { 462 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); 463 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); 464 // Idiv/irem cannot trap (passing info would generate an assertion). 465 info = NULL; 466 } 467 468 if (x->op() == Bytecodes::_irem) { 469 __ irem(left.result(), right.result(), result_reg, tmp, info); 470 } else if (x->op() == Bytecodes::_idiv) { 471 __ idiv(left.result(), right.result(), result_reg, tmp, info); 472 } else { 473 ShouldNotReachHere(); 474 } 475 476 if (result_reg != result) { 477 __ move(result_reg, result); 478 } 479 } else { 480 LIRItem left(x->x(), this); 481 LIRItem right(x->y(), this); 482 LIRItem* left_arg = &left; 483 LIRItem* right_arg = &right; 484 if (x->is_commutative() && left.is_stack() && right.is_register()) { 485 // swap them if left is real stack (or cached) and right is real register(not cached) 486 left_arg = &right; 487 right_arg = &left; 488 } 489 490 left_arg->load_item(); 491 492 // Do not need to load right, as we can handle stack and constants. 493 if (x->op() == Bytecodes::_imul) { 494 bool use_tmp = false; 495 if (right_arg->is_constant()) { 496 int iconst = right_arg->get_jint_constant(); 497 if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { 498 use_tmp = true; 499 } 500 } 501 right_arg->dont_load_item(); 502 LIR_Opr tmp = LIR_OprFact::illegalOpr; 503 if (use_tmp) { 504 tmp = new_register(T_INT); 505 } 506 rlock_result(x); 507 508 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 509 } else { 510 right_arg->dont_load_item(); 511 rlock_result(x); 512 LIR_Opr tmp = LIR_OprFact::illegalOpr; 513 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 514 } 515 } 516 } 517 518 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 519 // If an operand with use count 1 is the left operand, then it is 520 // likely that no move for 2-operand-LIR-form is necessary. 521 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 522 x->swap_operands(); 523 } 524 525 ValueTag tag = x->type()->tag(); 526 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 527 switch (tag) { 528 case floatTag: 529 case doubleTag: do_ArithmeticOp_FPU(x); return; 530 case longTag: do_ArithmeticOp_Long(x); return; 531 case intTag: do_ArithmeticOp_Int(x); return; 532 } 533 ShouldNotReachHere(); 534 } 535 536 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 537 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 538 // count must always be in rcx 539 LIRItem value(x->x(), this); 540 LIRItem count(x->y(), this); 541 542 ValueTag elemType = x->type()->tag(); 543 bool must_load_count = !count.is_constant(); 544 if (must_load_count) { 545 count.load_item(); 546 } else { 547 count.dont_load_item(); 548 } 549 value.load_item(); 550 LIR_Opr reg = rlock_result(x); 551 552 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 553 } 554 555 // _iand, _land, _ior, _lor, _ixor, _lxor 556 void LIRGenerator::do_LogicOp(LogicOp* x) { 557 // IF an operand with use count 1 is the left operand, then it is 558 // likely that no move for 2-operand-LIR-form is necessary. 559 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 560 x->swap_operands(); 561 } 562 563 LIRItem left(x->x(), this); 564 LIRItem right(x->y(), this); 565 566 left.load_item(); 567 right.load_nonconstant(32); 568 LIR_Opr reg = rlock_result(x); 569 570 logic_op(x->op(), reg, left.result(), right.result()); 571 } 572 573 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 574 void LIRGenerator::do_CompareOp(CompareOp* x) { 575 LIRItem left(x->x(), this); 576 LIRItem right(x->y(), this); 577 left.load_item(); 578 right.load_item(); 579 LIR_Opr reg = rlock_result(x); 580 if (x->x()->type()->is_float_kind()) { 581 Bytecodes::Code code = x->op(); 582 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 583 } else if (x->x()->type()->tag() == longTag) { 584 __ lcmp2int(left.result(), right.result(), reg); 585 } else { 586 ShouldNotReachHere(); 587 } 588 } 589 590 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) { 591 LIR_Opr t1 = LIR_OprFact::illegalOpr; 592 LIR_Opr t2 = LIR_OprFact::illegalOpr; 593 cmp_value.load_item(); 594 new_value.load_item(); 595 if (type == T_OBJECT) { 596 if (UseCompressedOops) { 597 t1 = new_register(T_OBJECT); 598 t2 = new_register(T_OBJECT); 599 } 600 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2); 601 } else if (type == T_INT) { 602 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2); 603 } else if (type == T_LONG) { 604 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2); 605 } else { 606 ShouldNotReachHere(); 607 } 608 // Generate conditional move of boolean result. 609 LIR_Opr result = new_register(T_INT); 610 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), 611 result, type); 612 return result; 613 } 614 615 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) { 616 Unimplemented(); // Currently not supported on this platform. 617 return LIR_OprFact::illegalOpr; 618 } 619 620 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) { 621 LIR_Opr result = new_register(type); 622 value.load_item(); 623 __ xadd(addr, value.result(), result, LIR_OprFact::illegalOpr); 624 return result; 625 } 626 627 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 628 switch (x->id()) { 629 case vmIntrinsics::_dabs: 630 case vmIntrinsics::_dsqrt: { 631 assert(x->number_of_arguments() == 1, "wrong type"); 632 LIRItem value(x->argument_at(0), this); 633 value.load_item(); 634 LIR_Opr dst = rlock_result(x); 635 636 switch (x->id()) { 637 case vmIntrinsics::_dsqrt: { 638 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr); 639 break; 640 } 641 case vmIntrinsics::_dabs: { 642 __ abs(value.result(), dst, LIR_OprFact::illegalOpr); 643 break; 644 } 645 } 646 break; 647 } 648 case vmIntrinsics::_dlog10: // fall through 649 case vmIntrinsics::_dlog: // fall through 650 case vmIntrinsics::_dsin: // fall through 651 case vmIntrinsics::_dtan: // fall through 652 case vmIntrinsics::_dcos: // fall through 653 case vmIntrinsics::_dexp: { 654 assert(x->number_of_arguments() == 1, "wrong type"); 655 656 address runtime_entry = NULL; 657 switch (x->id()) { 658 case vmIntrinsics::_dsin: 659 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin); 660 break; 661 case vmIntrinsics::_dcos: 662 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos); 663 break; 664 case vmIntrinsics::_dtan: 665 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan); 666 break; 667 case vmIntrinsics::_dlog: 668 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog); 669 break; 670 case vmIntrinsics::_dlog10: 671 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10); 672 break; 673 case vmIntrinsics::_dexp: 674 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp); 675 break; 676 default: 677 ShouldNotReachHere(); 678 } 679 680 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL); 681 set_result(x, result); 682 break; 683 } 684 case vmIntrinsics::_dpow: { 685 assert(x->number_of_arguments() == 2, "wrong type"); 686 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow); 687 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL); 688 set_result(x, result); 689 break; 690 } 691 } 692 } 693 694 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 695 assert(x->number_of_arguments() == 5, "wrong type"); 696 697 // Copy stubs possibly call C code, e.g. G1 barriers, so we need to reserve room 698 // for the C ABI (see frame::z_abi_160). 699 BasicTypeArray sig; // Empty signature is precise enough. 700 frame_map()->c_calling_convention(&sig); 701 702 // Make all state_for calls early since they can emit code. 703 CodeEmitInfo* info = state_for (x, x->state()); 704 705 LIRItem src(x->argument_at(0), this); 706 LIRItem src_pos(x->argument_at(1), this); 707 LIRItem dst(x->argument_at(2), this); 708 LIRItem dst_pos(x->argument_at(3), this); 709 LIRItem length(x->argument_at(4), this); 710 711 // Operands for arraycopy must use fixed registers, otherwise 712 // LinearScan will fail allocation (because arraycopy always needs a 713 // call). 714 715 src.load_item_force (FrameMap::as_oop_opr(Z_ARG1)); 716 src_pos.load_item_force (FrameMap::as_opr(Z_ARG2)); 717 dst.load_item_force (FrameMap::as_oop_opr(Z_ARG3)); 718 dst_pos.load_item_force (FrameMap::as_opr(Z_ARG4)); 719 length.load_item_force (FrameMap::as_opr(Z_ARG5)); 720 721 LIR_Opr tmp = FrameMap::as_opr(Z_R7); 722 723 set_no_result(x); 724 725 int flags; 726 ciArrayKlass* expected_type; 727 arraycopy_helper(x, &flags, &expected_type); 728 729 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), 730 length.result(), tmp, expected_type, flags, info); // does add_safepoint 731 } 732 733 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f 734 // _i2b, _i2c, _i2s 735 void LIRGenerator::do_Convert(Convert* x) { 736 LIRItem value(x->value(), this); 737 738 value.load_item(); 739 LIR_Opr reg = rlock_result(x); 740 __ convert(x->op(), value.result(), reg); 741 } 742 743 void LIRGenerator::do_NewInstance(NewInstance* x) { 744 print_if_not_loaded(x); 745 746 // This instruction can be deoptimized in the slow path : use 747 // Z_R2 as result register. 748 const LIR_Opr reg = result_register_for (x->type()); 749 750 CodeEmitInfo* info = state_for (x, x->state()); 751 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr; 752 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr; 753 LIR_Opr tmp3 = reg; 754 LIR_Opr tmp4 = LIR_OprFact::illegalOpr; 755 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr; 756 new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info); 757 LIR_Opr result = rlock_result(x); 758 __ move(reg, result); 759 } 760 761 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 762 CodeEmitInfo* info = state_for (x, x->state()); 763 764 LIRItem length(x->length(), this); 765 length.load_item(); 766 767 LIR_Opr reg = result_register_for (x->type()); 768 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr; 769 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr; 770 LIR_Opr tmp3 = reg; 771 LIR_Opr tmp4 = LIR_OprFact::illegalOpr; 772 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr; 773 LIR_Opr len = length.result(); 774 BasicType elem_type = x->elt_type(); 775 776 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); 777 778 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 779 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); 780 781 LIR_Opr result = rlock_result(x); 782 __ move(reg, result); 783 } 784 785 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 786 // Evaluate state_for early since it may emit code. 787 CodeEmitInfo* info = state_for (x, x->state()); 788 // In case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 789 // and therefore provide the state before the parameters have been consumed. 790 CodeEmitInfo* patching_info = NULL; 791 if (!x->klass()->is_loaded() || PatchALot) { 792 patching_info = state_for (x, x->state_before()); 793 } 794 795 LIRItem length(x->length(), this); 796 length.load_item(); 797 798 const LIR_Opr reg = result_register_for (x->type()); 799 LIR_Opr tmp1 = FrameMap::Z_R12_oop_opr; 800 LIR_Opr tmp2 = FrameMap::Z_R13_oop_opr; 801 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 802 LIR_Opr tmp4 = LIR_OprFact::illegalOpr; 803 LIR_Opr klass_reg = FrameMap::Z_R11_metadata_opr; 804 LIR_Opr len = length.result(); 805 806 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); 807 ciKlass* obj = ciObjArrayKlass::make(x->klass()); 808 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 809 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 810 } 811 klass2reg_with_patching(klass_reg, obj, patching_info); 812 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 813 814 LIR_Opr result = rlock_result(x); 815 __ move(reg, result); 816 } 817 818 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 819 Values* dims = x->dims(); 820 int i = dims->length(); 821 LIRItemList* items = new LIRItemList(i, i, NULL); 822 while (i-- > 0) { 823 LIRItem* size = new LIRItem(dims->at(i), this); 824 items->at_put(i, size); 825 } 826 827 // Evaluate state_for early since it may emit code. 828 CodeEmitInfo* patching_info = NULL; 829 if (!x->klass()->is_loaded() || PatchALot) { 830 patching_info = state_for (x, x->state_before()); 831 832 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so 833 // clone all handlers (NOTE: Usually this is handled transparently 834 // by the CodeEmitInfo cloning logic in CodeStub constructors but 835 // is done explicitly here because a stub isn't being used). 836 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 837 } 838 CodeEmitInfo* info = state_for (x, x->state()); 839 840 i = dims->length(); 841 while (--i >= 0) { 842 LIRItem* size = items->at(i); 843 size->load_nonconstant(32); 844 // FrameMap::_reserved_argument_area_size includes the dimensions varargs, because 845 // it's initialized to hir()->max_stack() when the FrameMap is created. 846 store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame)); 847 } 848 849 LIR_Opr klass_reg = FrameMap::Z_R3_metadata_opr; 850 klass2reg_with_patching(klass_reg, x->klass(), patching_info); 851 852 LIR_Opr rank = FrameMap::Z_R4_opr; 853 __ move(LIR_OprFact::intConst(x->rank()), rank); 854 LIR_Opr varargs = FrameMap::Z_R5_opr; 855 __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::Z_SP_opr, FrameMap::first_available_sp_in_frame, T_INT)), 856 varargs); 857 LIR_OprList* args = new LIR_OprList(3); 858 args->append(klass_reg); 859 args->append(rank); 860 args->append(varargs); 861 LIR_Opr reg = result_register_for (x->type()); 862 __ call_runtime(Runtime1::entry_for (Runtime1::new_multi_array_id), 863 LIR_OprFact::illegalOpr, 864 reg, args, info); 865 866 LIR_Opr result = rlock_result(x); 867 __ move(reg, result); 868 } 869 870 void LIRGenerator::do_BlockBegin(BlockBegin* x) { 871 // Nothing to do. 872 } 873 874 void LIRGenerator::do_CheckCast(CheckCast* x) { 875 LIRItem obj(x->obj(), this); 876 877 CodeEmitInfo* patching_info = NULL; 878 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { 879 // Must do this before locking the destination register as an oop register, 880 // and before the obj is loaded (the latter is for deoptimization). 881 patching_info = state_for (x, x->state_before()); 882 } 883 obj.load_item(); 884 885 // info for exceptions 886 CodeEmitInfo* info_for_exception = 887 (x->needs_exception_state() ? state_for(x) : 888 state_for(x, x->state_before(), true /*ignore_xhandler*/)); 889 890 CodeStub* stub; 891 if (x->is_incompatible_class_change_check()) { 892 assert(patching_info == NULL, "can't patch this"); 893 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 894 } else if (x->is_invokespecial_receiver_check()) { 895 assert(patching_info == NULL, "can't patch this"); 896 stub = new DeoptimizeStub(info_for_exception, 897 Deoptimization::Reason_class_check, 898 Deoptimization::Action_none); 899 } else { 900 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); 901 } 902 LIR_Opr reg = rlock_result(x); 903 LIR_Opr tmp1 = new_register(objectType); 904 LIR_Opr tmp2 = new_register(objectType); 905 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 906 __ checkcast(reg, obj.result(), x->klass(), 907 tmp1, tmp2, tmp3, 908 x->direct_compare(), info_for_exception, patching_info, stub, 909 x->profiled_method(), x->profiled_bci()); 910 } 911 912 913 void LIRGenerator::do_InstanceOf(InstanceOf* x) { 914 LIRItem obj(x->obj(), this); 915 CodeEmitInfo* patching_info = NULL; 916 if (!x->klass()->is_loaded() || PatchALot) { 917 patching_info = state_for (x, x->state_before()); 918 } 919 // Ensure the result register is not the input register because the 920 // result is initialized before the patching safepoint. 921 obj.load_item(); 922 LIR_Opr out_reg = rlock_result(x); 923 LIR_Opr tmp1 = new_register(objectType); 924 LIR_Opr tmp2 = new_register(objectType); 925 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 926 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3, 927 x->direct_compare(), patching_info, 928 x->profiled_method(), x->profiled_bci()); 929 } 930 931 932 void LIRGenerator::do_If (If* x) { 933 assert(x->number_of_sux() == 2, "inconsistency"); 934 ValueTag tag = x->x()->type()->tag(); 935 bool is_safepoint = x->is_safepoint(); 936 937 If::Condition cond = x->cond(); 938 939 LIRItem xitem(x->x(), this); 940 LIRItem yitem(x->y(), this); 941 LIRItem* xin = &xitem; 942 LIRItem* yin = &yitem; 943 944 if (tag == longTag) { 945 // For longs, only conditions "eql", "neq", "lss", "geq" are valid; 946 // mirror for other conditions. 947 if (cond == If::gtr || cond == If::leq) { 948 cond = Instruction::mirror(cond); 949 xin = &yitem; 950 yin = &xitem; 951 } 952 xin->set_destroys_register(); 953 } 954 xin->load_item(); 955 // TODO: don't load long constants != 0L 956 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { 957 // inline long zero 958 yin->dont_load_item(); 959 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { 960 // Longs cannot handle constants at right side. 961 yin->load_item(); 962 } else { 963 yin->dont_load_item(); 964 } 965 966 // Add safepoint before generating condition code so it can be recomputed. 967 if (x->is_safepoint()) { 968 // Increment backedge counter if needed. 969 increment_backedge_counter(state_for (x, x->state_before()), x->profiled_bci()); 970 // Use safepoint_poll_register() instead of LIR_OprFact::illegalOpr. 971 __ safepoint(safepoint_poll_register(), state_for (x, x->state_before())); 972 } 973 set_no_result(x); 974 975 LIR_Opr left = xin->result(); 976 LIR_Opr right = yin->result(); 977 __ cmp(lir_cond(cond), left, right); 978 // Generate branch profiling. Profiling code doesn't kill flags. 979 profile_branch(x, cond); 980 move_to_phi(x->state()); 981 if (x->x()->type()->is_float_kind()) { 982 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); 983 } else { 984 __ branch(lir_cond(cond), right->type(), x->tsux()); 985 } 986 assert(x->default_sux() == x->fsux(), "wrong destination above"); 987 __ jump(x->default_sux()); 988 } 989 990 LIR_Opr LIRGenerator::getThreadPointer() { 991 return FrameMap::as_pointer_opr(Z_thread); 992 } 993 994 void LIRGenerator::trace_block_entry(BlockBegin* block) { 995 __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::Z_R2_opr); 996 LIR_OprList* args = new LIR_OprList(1); 997 args->append(FrameMap::Z_R2_opr); 998 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 999 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); 1000 } 1001 1002 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1003 CodeEmitInfo* info) { 1004 __ store(value, address, info); 1005 } 1006 1007 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1008 CodeEmitInfo* info) { 1009 __ load(address, result, info); 1010 } 1011 1012 void LIRGenerator::do_update_CRC32(Intrinsic* x) { 1013 assert(UseCRC32Intrinsics, "or should not be here"); 1014 LIR_Opr result = rlock_result(x); 1015 1016 switch (x->id()) { 1017 case vmIntrinsics::_updateCRC32: { 1018 LIRItem crc(x->argument_at(0), this); 1019 LIRItem val(x->argument_at(1), this); 1020 // Registers destroyed by update_crc32. 1021 crc.set_destroys_register(); 1022 val.set_destroys_register(); 1023 crc.load_item(); 1024 val.load_item(); 1025 __ update_crc32(crc.result(), val.result(), result); 1026 break; 1027 } 1028 case vmIntrinsics::_updateBytesCRC32: 1029 case vmIntrinsics::_updateByteBufferCRC32: { 1030 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); 1031 1032 LIRItem crc(x->argument_at(0), this); 1033 LIRItem buf(x->argument_at(1), this); 1034 LIRItem off(x->argument_at(2), this); 1035 LIRItem len(x->argument_at(3), this); 1036 buf.load_item(); 1037 off.load_nonconstant(); 1038 1039 LIR_Opr index = off.result(); 1040 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 1041 if (off.result()->is_constant()) { 1042 index = LIR_OprFact::illegalOpr; 1043 offset += off.result()->as_jint(); 1044 } 1045 LIR_Opr base_op = buf.result(); 1046 1047 if (index->is_valid()) { 1048 LIR_Opr tmp = new_register(T_LONG); 1049 __ convert(Bytecodes::_i2l, index, tmp); 1050 index = tmp; 1051 } 1052 1053 LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE); 1054 1055 BasicTypeList signature(3); 1056 signature.append(T_INT); 1057 signature.append(T_ADDRESS); 1058 signature.append(T_INT); 1059 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1060 const LIR_Opr result_reg = result_register_for (x->type()); 1061 1062 LIR_Opr arg1 = cc->at(0); 1063 LIR_Opr arg2 = cc->at(1); 1064 LIR_Opr arg3 = cc->at(2); 1065 1066 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits. 1067 __ leal(LIR_OprFact::address(a), arg2); 1068 len.load_item_force(arg3); // We skip int->long conversion here, because CRC32 stub expects int. 1069 1070 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args()); 1071 __ move(result_reg, result); 1072 break; 1073 } 1074 default: { 1075 ShouldNotReachHere(); 1076 } 1077 } 1078 } 1079 1080 void LIRGenerator::do_update_CRC32C(Intrinsic* x) { 1081 assert(UseCRC32CIntrinsics, "or should not be here"); 1082 LIR_Opr result = rlock_result(x); 1083 1084 switch (x->id()) { 1085 case vmIntrinsics::_updateBytesCRC32C: 1086 case vmIntrinsics::_updateDirectByteBufferCRC32C: { 1087 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C); 1088 1089 LIRItem crc(x->argument_at(0), this); 1090 LIRItem buf(x->argument_at(1), this); 1091 LIRItem off(x->argument_at(2), this); 1092 LIRItem end(x->argument_at(3), this); 1093 buf.load_item(); 1094 off.load_nonconstant(); 1095 end.load_nonconstant(); 1096 1097 // len = end - off 1098 LIR_Opr len = end.result(); 1099 LIR_Opr tmpA = new_register(T_INT); 1100 LIR_Opr tmpB = new_register(T_INT); 1101 __ move(end.result(), tmpA); 1102 __ move(off.result(), tmpB); 1103 __ sub(tmpA, tmpB, tmpA); 1104 len = tmpA; 1105 1106 LIR_Opr index = off.result(); 1107 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 1108 if (off.result()->is_constant()) { 1109 index = LIR_OprFact::illegalOpr; 1110 offset += off.result()->as_jint(); 1111 } 1112 LIR_Opr base_op = buf.result(); 1113 1114 if (index->is_valid()) { 1115 LIR_Opr tmp = new_register(T_LONG); 1116 __ convert(Bytecodes::_i2l, index, tmp); 1117 index = tmp; 1118 } 1119 1120 LIR_Address* a = new LIR_Address(base_op, index, offset, T_BYTE); 1121 1122 BasicTypeList signature(3); 1123 signature.append(T_INT); 1124 signature.append(T_ADDRESS); 1125 signature.append(T_INT); 1126 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1127 const LIR_Opr result_reg = result_register_for (x->type()); 1128 1129 LIR_Opr arg1 = cc->at(0); 1130 LIR_Opr arg2 = cc->at(1); 1131 LIR_Opr arg3 = cc->at(2); 1132 1133 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits. 1134 __ leal(LIR_OprFact::address(a), arg2); 1135 __ move(len, cc->at(2)); // We skip int->long conversion here, because CRC32C stub expects int. 1136 1137 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args()); 1138 __ move(result_reg, result); 1139 break; 1140 } 1141 default: { 1142 ShouldNotReachHere(); 1143 } 1144 } 1145 } 1146 1147 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) { 1148 assert(x->number_of_arguments() == 3, "wrong type"); 1149 assert(UseFMA, "Needs FMA instructions support."); 1150 LIRItem value(x->argument_at(0), this); 1151 LIRItem value1(x->argument_at(1), this); 1152 LIRItem value2(x->argument_at(2), this); 1153 1154 value2.set_destroys_register(); 1155 1156 value.load_item(); 1157 value1.load_item(); 1158 value2.load_item(); 1159 1160 LIR_Opr calc_input = value.result(); 1161 LIR_Opr calc_input1 = value1.result(); 1162 LIR_Opr calc_input2 = value2.result(); 1163 LIR_Opr calc_result = rlock_result(x); 1164 1165 switch (x->id()) { 1166 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break; 1167 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break; 1168 default: ShouldNotReachHere(); 1169 } 1170 } 1171 1172 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) { 1173 fatal("vectorizedMismatch intrinsic is not implemented on this platform"); 1174 }