1 /*
2 * Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.hpp"
27 #include "c1/c1_Defs.hpp"
28 #include "c1/c1_MacroAssembler.hpp"
29 #include "c1/c1_Runtime1.hpp"
30 #include "ci/ciUtilities.hpp"
31 #include "gc/shared/cardTable.hpp"
32 #include "gc/shared/cardTableBarrierSet.hpp"
33 #include "interpreter/interpreter.hpp"
34 #include "nativeInst_x86.hpp"
35 #include "oops/compiledICHolder.hpp"
36 #include "oops/oop.inline.hpp"
37 #include "prims/jvmtiExport.hpp"
38 #include "register_x86.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/signature.hpp"
41 #include "runtime/vframeArray.hpp"
42 #include "utilities/macros.hpp"
43 #include "vmreg_x86.inline.hpp"
44
45 // Implementation of StubAssembler
46
47 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, int args_size) {
48 // setup registers
49 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread); // is callee-saved register (Visual C++ calling conventions)
50 assert(!(oop_result1->is_valid() || metadata_result->is_valid()) || oop_result1 != metadata_result, "registers must be different");
51 assert(oop_result1 != thread && metadata_result != thread, "registers must be different");
52 assert(args_size >= 0, "illegal args_size");
53 bool align_stack = false;
54 #ifdef _LP64
55 // At a method handle call, the stack may not be properly aligned
56 // when returning with an exception.
57 align_stack = (stub_id() == Runtime1::handle_exception_from_callee_id);
58 #endif
59
60 #ifdef _LP64
61 mov(c_rarg0, thread);
62 set_num_rt_args(0); // Nothing on stack
63 #else
64 set_num_rt_args(1 + args_size);
65
66 // push java thread (becomes first argument of C function)
67 get_thread(thread);
68 push(thread);
69 #endif // _LP64
70
71 int call_offset;
72 if (!align_stack) {
73 set_last_Java_frame(thread, noreg, rbp, NULL);
74 } else {
75 address the_pc = pc();
76 call_offset = offset();
77 set_last_Java_frame(thread, noreg, rbp, the_pc);
78 andptr(rsp, -(StackAlignmentInBytes)); // Align stack
79 }
80
81 // do the call
82 call(RuntimeAddress(entry));
83 if (!align_stack) {
84 call_offset = offset();
85 }
86 // verify callee-saved register
87 #ifdef ASSERT
88 guarantee(thread != rax, "change this code");
89 push(rax);
90 { Label L;
91 get_thread(rax);
92 cmpptr(thread, rax);
93 jcc(Assembler::equal, L);
94 int3();
95 stop("StubAssembler::call_RT: rdi not callee saved?");
96 bind(L);
97 }
98 pop(rax);
99 #endif
100 reset_last_Java_frame(thread, true);
101
102 // discard thread and arguments
103 NOT_LP64(addptr(rsp, num_rt_args()*BytesPerWord));
104
105 // check for pending exceptions
106 { Label L;
107 cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
108 jcc(Assembler::equal, L);
109 // exception pending => remove activation and forward to exception handler
110 movptr(rax, Address(thread, Thread::pending_exception_offset()));
111 // make sure that the vm_results are cleared
112 if (oop_result1->is_valid()) {
113 movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
114 }
115 if (metadata_result->is_valid()) {
116 movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
117 }
118 if (frame_size() == no_frame_size) {
119 leave();
120 jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
121 } else if (_stub_id == Runtime1::forward_exception_id) {
122 should_not_reach_here();
123 } else {
124 jump(RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
125 }
126 bind(L);
127 }
128 // get oop results if there are any and reset the values in the thread
129 if (oop_result1->is_valid()) {
130 get_vm_result(oop_result1, thread);
131 }
132 if (metadata_result->is_valid()) {
133 get_vm_result_2(metadata_result, thread);
134 }
135 return call_offset;
136 }
137
138
139 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
140 #ifdef _LP64
141 mov(c_rarg1, arg1);
142 #else
143 push(arg1);
144 #endif // _LP64
145 return call_RT(oop_result1, metadata_result, entry, 1);
146 }
147
148
149 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
150 #ifdef _LP64
151 if (c_rarg1 == arg2) {
152 if (c_rarg2 == arg1) {
153 xchgq(arg1, arg2);
154 } else {
155 mov(c_rarg2, arg2);
156 mov(c_rarg1, arg1);
157 }
158 } else {
159 mov(c_rarg1, arg1);
160 mov(c_rarg2, arg2);
161 }
162 #else
163 push(arg2);
164 push(arg1);
165 #endif // _LP64
166 return call_RT(oop_result1, metadata_result, entry, 2);
167 }
168
169
170 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
171 #ifdef _LP64
172 // if there is any conflict use the stack
173 if (arg1 == c_rarg2 || arg1 == c_rarg3 ||
174 arg2 == c_rarg1 || arg1 == c_rarg3 ||
175 arg3 == c_rarg1 || arg1 == c_rarg2) {
176 push(arg3);
177 push(arg2);
178 push(arg1);
179 pop(c_rarg1);
180 pop(c_rarg2);
181 pop(c_rarg3);
182 } else {
183 mov(c_rarg1, arg1);
184 mov(c_rarg2, arg2);
185 mov(c_rarg3, arg3);
186 }
187 #else
188 push(arg3);
189 push(arg2);
190 push(arg1);
191 #endif // _LP64
192 return call_RT(oop_result1, metadata_result, entry, 3);
193 }
194
195
196 // Implementation of StubFrame
197
198 class StubFrame: public StackObj {
199 private:
200 StubAssembler* _sasm;
201
202 public:
203 StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments);
204 void load_argument(int offset_in_words, Register reg);
205
206 ~StubFrame();
207 };
208
209 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
210 set_info(name, must_gc_arguments);
211 enter();
212 }
213
214 void StubAssembler::epilogue() {
215 leave();
216 ret(0);
217 }
218
219 #define __ _sasm->
220
221 StubFrame::StubFrame(StubAssembler* sasm, const char* name, bool must_gc_arguments) {
222 _sasm = sasm;
223 __ prologue(name, must_gc_arguments);
224 }
225
226 // load parameters that were stored with LIR_Assembler::store_parameter
227 // Note: offsets for store_parameter and load_argument must match
228 void StubFrame::load_argument(int offset_in_words, Register reg) {
229 __ load_parameter(offset_in_words, reg);
230 }
231
232
233 StubFrame::~StubFrame() {
234 __ epilogue();
235 }
236
237 #undef __
238
239
240 // Implementation of Runtime1
241
242 const int float_regs_as_doubles_size_in_slots = pd_nof_fpu_regs_frame_map * 2;
243 const int xmm_regs_as_doubles_size_in_slots = FrameMap::nof_xmm_regs * 2;
244
245 // Stack layout for saving/restoring all the registers needed during a runtime
246 // call (this includes deoptimization)
247 // Note: note that users of this frame may well have arguments to some runtime
248 // while these values are on the stack. These positions neglect those arguments
249 // but the code in save_live_registers will take the argument count into
250 // account.
251 //
252 #ifdef _LP64
253 #define SLOT2(x) x,
254 #define SLOT_PER_WORD 2
255 #else
256 #define SLOT2(x)
257 #define SLOT_PER_WORD 1
258 #endif // _LP64
259
260 enum reg_save_layout {
261 // 64bit needs to keep stack 16 byte aligned. So we add some alignment dummies to make that
262 // happen and will assert if the stack size we create is misaligned
263 #ifdef _LP64
264 align_dummy_0, align_dummy_1,
265 #endif // _LP64
266 #ifdef _WIN64
267 // Windows always allocates space for it's argument registers (see
268 // frame::arg_reg_save_area_bytes).
269 arg_reg_save_1, arg_reg_save_1H, // 0, 4
270 arg_reg_save_2, arg_reg_save_2H, // 8, 12
271 arg_reg_save_3, arg_reg_save_3H, // 16, 20
272 arg_reg_save_4, arg_reg_save_4H, // 24, 28
273 #endif // _WIN64
274 xmm_regs_as_doubles_off, // 32
275 float_regs_as_doubles_off = xmm_regs_as_doubles_off + xmm_regs_as_doubles_size_in_slots, // 160
276 fpu_state_off = float_regs_as_doubles_off + float_regs_as_doubles_size_in_slots, // 224
277 // fpu_state_end_off is exclusive
278 fpu_state_end_off = fpu_state_off + (FPUStateSizeInWords / SLOT_PER_WORD), // 352
279 marker = fpu_state_end_off, SLOT2(markerH) // 352, 356
280 extra_space_offset, // 360
281 #ifdef _LP64
282 r15_off = extra_space_offset, r15H_off, // 360, 364
283 r14_off, r14H_off, // 368, 372
284 r13_off, r13H_off, // 376, 380
285 r12_off, r12H_off, // 384, 388
286 r11_off, r11H_off, // 392, 396
287 r10_off, r10H_off, // 400, 404
288 r9_off, r9H_off, // 408, 412
289 r8_off, r8H_off, // 416, 420
290 rdi_off, rdiH_off, // 424, 428
291 #else
292 rdi_off = extra_space_offset,
293 #endif // _LP64
294 rsi_off, SLOT2(rsiH_off) // 432, 436
295 rbp_off, SLOT2(rbpH_off) // 440, 444
296 rsp_off, SLOT2(rspH_off) // 448, 452
297 rbx_off, SLOT2(rbxH_off) // 456, 460
298 rdx_off, SLOT2(rdxH_off) // 464, 468
299 rcx_off, SLOT2(rcxH_off) // 472, 476
300 rax_off, SLOT2(raxH_off) // 480, 484
301 saved_rbp_off, SLOT2(saved_rbpH_off) // 488, 492
302 return_off, SLOT2(returnH_off) // 496, 500
303 reg_save_frame_size // As noted: neglects any parameters to runtime // 504
304 };
305
306 // Save off registers which might be killed by calls into the runtime.
307 // Tries to smart of about FP registers. In particular we separate
308 // saving and describing the FPU registers for deoptimization since we
309 // have to save the FPU registers twice if we describe them and on P4
310 // saving FPU registers which don't contain anything appears
311 // expensive. The deopt blob is the only thing which needs to
312 // describe FPU registers. In all other cases it should be sufficient
313 // to simply save their current value.
314
315 static OopMap* generate_oop_map(StubAssembler* sasm, int num_rt_args,
316 bool save_fpu_registers = true) {
317
318 // In 64bit all the args are in regs so there are no additional stack slots
319 LP64_ONLY(num_rt_args = 0);
320 LP64_ONLY(assert((reg_save_frame_size * VMRegImpl::stack_slot_size) % 16 == 0, "must be 16 byte aligned");)
321 int frame_size_in_slots = reg_save_frame_size + num_rt_args; // args + thread
322 sasm->set_frame_size(frame_size_in_slots / VMRegImpl::slots_per_word);
323
324 // record saved value locations in an OopMap
325 // locations are offsets from sp after runtime call; num_rt_args is number of arguments in call, including thread
326 OopMap* map = new OopMap(frame_size_in_slots, 0);
327 map->set_callee_saved(VMRegImpl::stack2reg(rax_off + num_rt_args), rax->as_VMReg());
328 map->set_callee_saved(VMRegImpl::stack2reg(rcx_off + num_rt_args), rcx->as_VMReg());
329 map->set_callee_saved(VMRegImpl::stack2reg(rdx_off + num_rt_args), rdx->as_VMReg());
330 map->set_callee_saved(VMRegImpl::stack2reg(rbx_off + num_rt_args), rbx->as_VMReg());
331 map->set_callee_saved(VMRegImpl::stack2reg(rsi_off + num_rt_args), rsi->as_VMReg());
332 map->set_callee_saved(VMRegImpl::stack2reg(rdi_off + num_rt_args), rdi->as_VMReg());
333 #ifdef _LP64
334 map->set_callee_saved(VMRegImpl::stack2reg(r8_off + num_rt_args), r8->as_VMReg());
335 map->set_callee_saved(VMRegImpl::stack2reg(r9_off + num_rt_args), r9->as_VMReg());
336 map->set_callee_saved(VMRegImpl::stack2reg(r10_off + num_rt_args), r10->as_VMReg());
337 map->set_callee_saved(VMRegImpl::stack2reg(r11_off + num_rt_args), r11->as_VMReg());
338 map->set_callee_saved(VMRegImpl::stack2reg(r12_off + num_rt_args), r12->as_VMReg());
339 map->set_callee_saved(VMRegImpl::stack2reg(r13_off + num_rt_args), r13->as_VMReg());
340 map->set_callee_saved(VMRegImpl::stack2reg(r14_off + num_rt_args), r14->as_VMReg());
341 map->set_callee_saved(VMRegImpl::stack2reg(r15_off + num_rt_args), r15->as_VMReg());
342
343 // This is stupid but needed.
344 map->set_callee_saved(VMRegImpl::stack2reg(raxH_off + num_rt_args), rax->as_VMReg()->next());
345 map->set_callee_saved(VMRegImpl::stack2reg(rcxH_off + num_rt_args), rcx->as_VMReg()->next());
346 map->set_callee_saved(VMRegImpl::stack2reg(rdxH_off + num_rt_args), rdx->as_VMReg()->next());
347 map->set_callee_saved(VMRegImpl::stack2reg(rbxH_off + num_rt_args), rbx->as_VMReg()->next());
348 map->set_callee_saved(VMRegImpl::stack2reg(rsiH_off + num_rt_args), rsi->as_VMReg()->next());
349 map->set_callee_saved(VMRegImpl::stack2reg(rdiH_off + num_rt_args), rdi->as_VMReg()->next());
350
351 map->set_callee_saved(VMRegImpl::stack2reg(r8H_off + num_rt_args), r8->as_VMReg()->next());
352 map->set_callee_saved(VMRegImpl::stack2reg(r9H_off + num_rt_args), r9->as_VMReg()->next());
353 map->set_callee_saved(VMRegImpl::stack2reg(r10H_off + num_rt_args), r10->as_VMReg()->next());
354 map->set_callee_saved(VMRegImpl::stack2reg(r11H_off + num_rt_args), r11->as_VMReg()->next());
355 map->set_callee_saved(VMRegImpl::stack2reg(r12H_off + num_rt_args), r12->as_VMReg()->next());
356 map->set_callee_saved(VMRegImpl::stack2reg(r13H_off + num_rt_args), r13->as_VMReg()->next());
357 map->set_callee_saved(VMRegImpl::stack2reg(r14H_off + num_rt_args), r14->as_VMReg()->next());
358 map->set_callee_saved(VMRegImpl::stack2reg(r15H_off + num_rt_args), r15->as_VMReg()->next());
359 #endif // _LP64
360
361 int xmm_bypass_limit = FrameMap::nof_xmm_regs;
362 #ifdef _LP64
363 if (UseAVX < 3) {
364 xmm_bypass_limit = xmm_bypass_limit / 2;
365 }
366 #endif
367
368 if (save_fpu_registers) {
369 if (UseSSE < 2) {
370 int fpu_off = float_regs_as_doubles_off;
371 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
372 VMReg fpu_name_0 = FrameMap::fpu_regname(n);
373 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + num_rt_args), fpu_name_0);
374 // %%% This is really a waste but we'll keep things as they were for now
375 if (true) {
376 map->set_callee_saved(VMRegImpl::stack2reg(fpu_off + 1 + num_rt_args), fpu_name_0->next());
377 }
378 fpu_off += 2;
379 }
380 assert(fpu_off == fpu_state_off, "incorrect number of fpu stack slots");
381 }
382
383 if (UseSSE >= 2) {
384 int xmm_off = xmm_regs_as_doubles_off;
385 for (int n = 0; n < FrameMap::nof_xmm_regs; n++) {
386 if (n < xmm_bypass_limit) {
387 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
388 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
389 // %%% This is really a waste but we'll keep things as they were for now
390 if (true) {
391 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + 1 + num_rt_args), xmm_name_0->next());
392 }
393 }
394 xmm_off += 2;
395 }
396 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
397
398 } else if (UseSSE == 1) {
399 int xmm_off = xmm_regs_as_doubles_off;
400 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
401 VMReg xmm_name_0 = as_XMMRegister(n)->as_VMReg();
402 map->set_callee_saved(VMRegImpl::stack2reg(xmm_off + num_rt_args), xmm_name_0);
403 xmm_off += 2;
404 }
405 assert(xmm_off == float_regs_as_doubles_off, "incorrect number of xmm registers");
406 }
407 }
408
409 return map;
410 }
411
412 #define __ this->
413
414 void C1_MacroAssembler::save_live_registers_no_oop_map(int num_rt_args, bool save_fpu_registers) {
415 __ block_comment("save_live_registers");
416
417 __ pusha(); // integer registers
418
419 // assert(float_regs_as_doubles_off % 2 == 0, "misaligned offset");
420 // assert(xmm_regs_as_doubles_off % 2 == 0, "misaligned offset");
421
422 __ subptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
423
424 #ifdef ASSERT
425 __ movptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
426 #endif
427
428 if (save_fpu_registers) {
429 if (UseSSE < 2) {
430 // save FPU stack
431 __ fnsave(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
432 __ fwait();
433
434 #ifdef ASSERT
435 Label ok;
436 __ cmpw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
437 __ jccb(Assembler::equal, ok);
438 __ stop("corrupted control word detected");
439 __ bind(ok);
440 #endif
441
442 // Reset the control word to guard against exceptions being unmasked
443 // since fstp_d can cause FPU stack underflow exceptions. Write it
444 // into the on stack copy and then reload that to make sure that the
445 // current and future values are correct.
446 __ movw(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size), StubRoutines::fpu_cntrl_wrd_std());
447 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
448
449 // Save the FPU registers in de-opt-able form
450 int offset = 0;
451 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
452 __ fstp_d(Address(rsp, float_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
453 offset += 8;
454 }
455 }
456
457 if (UseSSE >= 2) {
458 // save XMM registers
459 // XMM registers can contain float or double values, but this is not known here,
460 // so always save them as doubles.
461 // note that float values are _not_ converted automatically, so for float values
462 // the second word contains only garbage data.
463 int xmm_bypass_limit = FrameMap::nof_xmm_regs;
464 int offset = 0;
465 #ifdef _LP64
466 if (UseAVX < 3) {
467 xmm_bypass_limit = xmm_bypass_limit / 2;
468 }
469 #endif
470 for (int n = 0; n < xmm_bypass_limit; n++) {
471 XMMRegister xmm_name = as_XMMRegister(n);
472 __ movdbl(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
473 offset += 8;
474 }
475 } else if (UseSSE == 1) {
476 // save XMM registers as float because double not supported without SSE2(num MMX == num fpu)
477 int offset = 0;
478 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
479 XMMRegister xmm_name = as_XMMRegister(n);
480 __ movflt(Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset), xmm_name);
481 offset += 8;
482 }
483 }
484 }
485
486 // FPU stack must be empty now
487 __ verify_FPU(0, "save_live_registers");
488 }
489
490 #undef __
491 #define __ sasm->
492
493 static void restore_fpu(C1_MacroAssembler* sasm, bool restore_fpu_registers) {
494 if (restore_fpu_registers) {
495 if (UseSSE >= 2) {
496 // restore XMM registers
497 int xmm_bypass_limit = FrameMap::nof_xmm_regs;
498 #ifdef _LP64
499 if (UseAVX < 3) {
500 xmm_bypass_limit = xmm_bypass_limit / 2;
501 }
502 #endif
503 int offset = 0;
504 for (int n = 0; n < xmm_bypass_limit; n++) {
505 XMMRegister xmm_name = as_XMMRegister(n);
506 __ movdbl(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
507 offset += 8;
508 }
509 } else if (UseSSE == 1) {
510 // restore XMM registers(num MMX == num fpu)
511 int offset = 0;
512 for (int n = 0; n < FrameMap::nof_fpu_regs; n++) {
513 XMMRegister xmm_name = as_XMMRegister(n);
514 __ movflt(xmm_name, Address(rsp, xmm_regs_as_doubles_off * VMRegImpl::stack_slot_size + offset));
515 offset += 8;
516 }
517 }
518
519 if (UseSSE < 2) {
520 __ frstor(Address(rsp, fpu_state_off * VMRegImpl::stack_slot_size));
521 } else {
522 // check that FPU stack is really empty
523 __ verify_FPU(0, "restore_live_registers");
524 }
525
526 } else {
527 // check that FPU stack is really empty
528 __ verify_FPU(0, "restore_live_registers");
529 }
530
531 #ifdef ASSERT
532 {
533 Label ok;
534 __ cmpptr(Address(rsp, marker * VMRegImpl::stack_slot_size), (int32_t)0xfeedbeef);
535 __ jcc(Assembler::equal, ok);
536 __ stop("bad offsets in frame");
537 __ bind(ok);
538 }
539 #endif // ASSERT
540
541 __ addptr(rsp, extra_space_offset * VMRegImpl::stack_slot_size);
542 }
543
544 #undef __
545 #define __ this->
546
547 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
548 __ block_comment("restore_live_registers");
549
550 restore_fpu(this, restore_fpu_registers);
551 __ popa();
552 }
553
554 #undef __
555 #define __ sasm->
556
557 static OopMap* save_live_registers(StubAssembler* sasm, int num_rt_args,
558 bool save_fpu_registers = true) {
559 sasm->save_live_registers_no_oop_map(num_rt_args, save_fpu_registers);
560 return generate_oop_map(sasm, num_rt_args, save_fpu_registers);
561 }
562
563 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
564 sasm->restore_live_registers(restore_fpu_registers);
565 }
566
567 static void restore_live_registers_except_rax(StubAssembler* sasm, bool restore_fpu_registers = true) {
568 __ block_comment("restore_live_registers_except_rax");
569
570 restore_fpu(sasm, restore_fpu_registers);
571
572 #ifdef _LP64
573 __ movptr(r15, Address(rsp, 0));
574 __ movptr(r14, Address(rsp, wordSize));
575 __ movptr(r13, Address(rsp, 2 * wordSize));
576 __ movptr(r12, Address(rsp, 3 * wordSize));
577 __ movptr(r11, Address(rsp, 4 * wordSize));
578 __ movptr(r10, Address(rsp, 5 * wordSize));
579 __ movptr(r9, Address(rsp, 6 * wordSize));
580 __ movptr(r8, Address(rsp, 7 * wordSize));
581 __ movptr(rdi, Address(rsp, 8 * wordSize));
582 __ movptr(rsi, Address(rsp, 9 * wordSize));
583 __ movptr(rbp, Address(rsp, 10 * wordSize));
584 // skip rsp
585 __ movptr(rbx, Address(rsp, 12 * wordSize));
586 __ movptr(rdx, Address(rsp, 13 * wordSize));
587 __ movptr(rcx, Address(rsp, 14 * wordSize));
588
589 __ addptr(rsp, 16 * wordSize);
590 #else
591
592 __ pop(rdi);
593 __ pop(rsi);
594 __ pop(rbp);
595 __ pop(rbx); // skip this value
596 __ pop(rbx);
597 __ pop(rdx);
598 __ pop(rcx);
599 __ addptr(rsp, BytesPerWord);
600 #endif // _LP64
601 }
602
603
604 void Runtime1::initialize_pd() {
605 // nothing to do
606 }
607
608
609 // target: the entry point of the method that creates and posts the exception oop
610 // has_argument: true if the exception needs an argument (passed on stack because registers must be preserved)
611
612 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
613 // preserve all registers
614 int num_rt_args = has_argument ? 2 : 1;
615 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
616
617 // now all registers are saved and can be used freely
618 // verify that no old value is used accidentally
619 __ invalidate_registers(true, true, true, true, true, true);
620
621 // registers used by this stub
622 const Register temp_reg = rbx;
623
624 // load argument for exception that is passed as an argument into the stub
625 if (has_argument) {
626 #ifdef _LP64
627 __ movptr(c_rarg1, Address(rbp, 2*BytesPerWord));
628 #else
629 __ movptr(temp_reg, Address(rbp, 2*BytesPerWord));
630 __ push(temp_reg);
631 #endif // _LP64
632 }
633 int call_offset = __ call_RT(noreg, noreg, target, num_rt_args - 1);
634
635 OopMapSet* oop_maps = new OopMapSet();
636 oop_maps->add_gc_map(call_offset, oop_map);
637
638 __ stop("should not reach here");
639
640 return oop_maps;
641 }
642
643
644 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler *sasm) {
645 __ block_comment("generate_handle_exception");
646
647 // incoming parameters
648 const Register exception_oop = rax;
649 const Register exception_pc = rdx;
650 // other registers used in this stub
651 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
652
653 // Save registers, if required.
654 OopMapSet* oop_maps = new OopMapSet();
655 OopMap* oop_map = NULL;
656 switch (id) {
657 case forward_exception_id:
658 // We're handling an exception in the context of a compiled frame.
659 // The registers have been saved in the standard places. Perform
660 // an exception lookup in the caller and dispatch to the handler
661 // if found. Otherwise unwind and dispatch to the callers
662 // exception handler.
663 oop_map = generate_oop_map(sasm, 1 /*thread*/);
664
665 // load and clear pending exception oop into RAX
666 __ movptr(exception_oop, Address(thread, Thread::pending_exception_offset()));
667 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
668
669 // load issuing PC (the return address for this stub) into rdx
670 __ movptr(exception_pc, Address(rbp, 1*BytesPerWord));
671
672 // make sure that the vm_results are cleared (may be unnecessary)
673 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
674 __ movptr(Address(thread, JavaThread::vm_result_2_offset()), NULL_WORD);
675 break;
676 case handle_exception_nofpu_id:
677 case handle_exception_id:
678 // At this point all registers MAY be live.
679 oop_map = save_live_registers(sasm, 1 /*thread*/, id != handle_exception_nofpu_id);
680 break;
681 case handle_exception_from_callee_id: {
682 // At this point all registers except exception oop (RAX) and
683 // exception pc (RDX) are dead.
684 const int frame_size = 2 /*BP, return address*/ NOT_LP64(+ 1 /*thread*/) WIN64_ONLY(+ frame::arg_reg_save_area_bytes / BytesPerWord);
685 oop_map = new OopMap(frame_size * VMRegImpl::slots_per_word, 0);
686 sasm->set_frame_size(frame_size);
687 WIN64_ONLY(__ subq(rsp, frame::arg_reg_save_area_bytes));
688 break;
689 }
690 default: ShouldNotReachHere();
691 }
692
693 #ifdef TIERED
694 // C2 can leave the fpu stack dirty
695 if (UseSSE < 2) {
696 __ empty_FPU_stack();
697 }
698 #endif // TIERED
699
700 // verify that only rax, and rdx is valid at this time
701 __ invalidate_registers(false, true, true, false, true, true);
702 // verify that rax, contains a valid exception
703 __ verify_not_null_oop(exception_oop);
704
705 // load address of JavaThread object for thread-local data
706 NOT_LP64(__ get_thread(thread);)
707
708 #ifdef ASSERT
709 // check that fields in JavaThread for exception oop and issuing pc are
710 // empty before writing to them
711 Label oop_empty;
712 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t) NULL_WORD);
713 __ jcc(Assembler::equal, oop_empty);
714 __ stop("exception oop already set");
715 __ bind(oop_empty);
716
717 Label pc_empty;
718 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
719 __ jcc(Assembler::equal, pc_empty);
720 __ stop("exception pc already set");
721 __ bind(pc_empty);
722 #endif
723
724 // save exception oop and issuing pc into JavaThread
725 // (exception handler will load it from here)
726 __ movptr(Address(thread, JavaThread::exception_oop_offset()), exception_oop);
727 __ movptr(Address(thread, JavaThread::exception_pc_offset()), exception_pc);
728
729 // patch throwing pc into return address (has bci & oop map)
730 __ movptr(Address(rbp, 1*BytesPerWord), exception_pc);
731
732 // compute the exception handler.
733 // the exception oop and the throwing pc are read from the fields in JavaThread
734 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
735 oop_maps->add_gc_map(call_offset, oop_map);
736
737 // rax: handler address
738 // will be the deopt blob if nmethod was deoptimized while we looked up
739 // handler regardless of whether handler existed in the nmethod.
740
741 // only rax, is valid at this time, all other registers have been destroyed by the runtime call
742 __ invalidate_registers(false, true, true, true, true, true);
743
744 // patch the return address, this stub will directly return to the exception handler
745 __ movptr(Address(rbp, 1*BytesPerWord), rax);
746
747 switch (id) {
748 case forward_exception_id:
749 case handle_exception_nofpu_id:
750 case handle_exception_id:
751 // Restore the registers that were saved at the beginning.
752 restore_live_registers(sasm, id != handle_exception_nofpu_id);
753 break;
754 case handle_exception_from_callee_id:
755 // WIN64_ONLY: No need to add frame::arg_reg_save_area_bytes to SP
756 // since we do a leave anyway.
757
758 // Pop the return address.
759 __ leave();
760 __ pop(rcx);
761 __ jmp(rcx); // jump to exception handler
762 break;
763 default: ShouldNotReachHere();
764 }
765
766 return oop_maps;
767 }
768
769
770 void Runtime1::generate_unwind_exception(StubAssembler *sasm) {
771 // incoming parameters
772 const Register exception_oop = rax;
773 // callee-saved copy of exception_oop during runtime call
774 const Register exception_oop_callee_saved = NOT_LP64(rsi) LP64_ONLY(r14);
775 // other registers used in this stub
776 const Register exception_pc = rdx;
777 const Register handler_addr = rbx;
778 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
779
780 // verify that only rax, is valid at this time
781 __ invalidate_registers(false, true, true, true, true, true);
782
783 #ifdef ASSERT
784 // check that fields in JavaThread for exception oop and issuing pc are empty
785 NOT_LP64(__ get_thread(thread);)
786 Label oop_empty;
787 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), 0);
788 __ jcc(Assembler::equal, oop_empty);
789 __ stop("exception oop must be empty");
790 __ bind(oop_empty);
791
792 Label pc_empty;
793 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), 0);
794 __ jcc(Assembler::equal, pc_empty);
795 __ stop("exception pc must be empty");
796 __ bind(pc_empty);
797 #endif
798
799 // clear the FPU stack in case any FPU results are left behind
800 __ empty_FPU_stack();
801
802 // save exception_oop in callee-saved register to preserve it during runtime calls
803 __ verify_not_null_oop(exception_oop);
804 __ movptr(exception_oop_callee_saved, exception_oop);
805
806 NOT_LP64(__ get_thread(thread);)
807 // Get return address (is on top of stack after leave).
808 __ movptr(exception_pc, Address(rsp, 0));
809
810 // search the exception handler address of the caller (using the return address)
811 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address), thread, exception_pc);
812 // rax: exception handler address of the caller
813
814 // Only RAX and RSI are valid at this time, all other registers have been destroyed by the call.
815 __ invalidate_registers(false, true, true, true, false, true);
816
817 // move result of call into correct register
818 __ movptr(handler_addr, rax);
819
820 // Restore exception oop to RAX (required convention of exception handler).
821 __ movptr(exception_oop, exception_oop_callee_saved);
822
823 // verify that there is really a valid exception in rax
824 __ verify_not_null_oop(exception_oop);
825
826 // get throwing pc (= return address).
827 // rdx has been destroyed by the call, so it must be set again
828 // the pop is also necessary to simulate the effect of a ret(0)
829 __ pop(exception_pc);
830
831 // continue at exception handler (return address removed)
832 // note: do *not* remove arguments when unwinding the
833 // activation since the caller assumes having
834 // all arguments on the stack when entering the
835 // runtime to determine the exception handler
836 // (GC happens at call site with arguments!)
837 // rax: exception oop
838 // rdx: throwing pc
839 // rbx: exception handler
840 __ jmp(handler_addr);
841 }
842
843
844 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
845 // use the maximum number of runtime-arguments here because it is difficult to
846 // distinguish each RT-Call.
847 // Note: This number affects also the RT-Call in generate_handle_exception because
848 // the oop-map is shared for all calls.
849 const int num_rt_args = 2; // thread + dummy
850
851 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
852 assert(deopt_blob != NULL, "deoptimization blob must have been created");
853
854 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
855
856 #ifdef _LP64
857 const Register thread = r15_thread;
858 // No need to worry about dummy
859 __ mov(c_rarg0, thread);
860 #else
861 __ push(rax); // push dummy
862
863 const Register thread = rdi; // is callee-saved register (Visual C++ calling conventions)
864 // push java thread (becomes first argument of C function)
865 __ get_thread(thread);
866 __ push(thread);
867 #endif // _LP64
868 __ set_last_Java_frame(thread, noreg, rbp, NULL);
869 // do the call
870 __ call(RuntimeAddress(target));
871 OopMapSet* oop_maps = new OopMapSet();
872 oop_maps->add_gc_map(__ offset(), oop_map);
873 // verify callee-saved register
874 #ifdef ASSERT
875 guarantee(thread != rax, "change this code");
876 __ push(rax);
877 { Label L;
878 __ get_thread(rax);
879 __ cmpptr(thread, rax);
880 __ jcc(Assembler::equal, L);
881 __ stop("StubAssembler::call_RT: rdi/r15 not callee saved?");
882 __ bind(L);
883 }
884 __ pop(rax);
885 #endif
886 __ reset_last_Java_frame(thread, true);
887 #ifndef _LP64
888 __ pop(rcx); // discard thread arg
889 __ pop(rcx); // discard dummy
890 #endif // _LP64
891
892 // check for pending exceptions
893 { Label L;
894 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
895 __ jcc(Assembler::equal, L);
896 // exception pending => remove activation and forward to exception handler
897
898 __ testptr(rax, rax); // have we deoptimized?
899 __ jump_cc(Assembler::equal,
900 RuntimeAddress(Runtime1::entry_for(Runtime1::forward_exception_id)));
901
902 // the deopt blob expects exceptions in the special fields of
903 // JavaThread, so copy and clear pending exception.
904
905 // load and clear pending exception
906 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
907 __ movptr(Address(thread, Thread::pending_exception_offset()), NULL_WORD);
908
909 // check that there is really a valid exception
910 __ verify_not_null_oop(rax);
911
912 // load throwing pc: this is the return address of the stub
913 __ movptr(rdx, Address(rsp, return_off * VMRegImpl::stack_slot_size));
914
915 #ifdef ASSERT
916 // check that fields in JavaThread for exception oop and issuing pc are empty
917 Label oop_empty;
918 __ cmpptr(Address(thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
919 __ jcc(Assembler::equal, oop_empty);
920 __ stop("exception oop must be empty");
921 __ bind(oop_empty);
922
923 Label pc_empty;
924 __ cmpptr(Address(thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
925 __ jcc(Assembler::equal, pc_empty);
926 __ stop("exception pc must be empty");
927 __ bind(pc_empty);
928 #endif
929
930 // store exception oop and throwing pc to JavaThread
931 __ movptr(Address(thread, JavaThread::exception_oop_offset()), rax);
932 __ movptr(Address(thread, JavaThread::exception_pc_offset()), rdx);
933
934 restore_live_registers(sasm);
935
936 __ leave();
937 __ addptr(rsp, BytesPerWord); // remove return address from stack
938
939 // Forward the exception directly to deopt blob. We can blow no
940 // registers and must leave throwing pc on the stack. A patch may
941 // have values live in registers so the entry point with the
942 // exception in tls.
943 __ jump(RuntimeAddress(deopt_blob->unpack_with_exception_in_tls()));
944
945 __ bind(L);
946 }
947
948
949 // Runtime will return true if the nmethod has been deoptimized during
950 // the patching process. In that case we must do a deopt reexecute instead.
951
952 Label reexecuteEntry, cont;
953
954 __ testptr(rax, rax); // have we deoptimized?
955 __ jcc(Assembler::equal, cont); // no
956
957 // Will reexecute. Proper return address is already on the stack we just restore
958 // registers, pop all of our frame but the return address and jump to the deopt blob
959 restore_live_registers(sasm);
960 __ leave();
961 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
962
963 __ bind(cont);
964 restore_live_registers(sasm);
965 __ leave();
966 __ ret(0);
967
968 return oop_maps;
969 }
970
971
972 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
973
974 // for better readability
975 const bool must_gc_arguments = true;
976 const bool dont_gc_arguments = false;
977
978 // default value; overwritten for some optimized stubs that are called from methods that do not use the fpu
979 bool save_fpu_registers = true;
980
981 // stub code & info for the different stubs
982 OopMapSet* oop_maps = NULL;
983 switch (id) {
984 case forward_exception_id:
985 {
986 oop_maps = generate_handle_exception(id, sasm);
987 __ leave();
988 __ ret(0);
989 }
990 break;
991
992 case new_instance_id:
993 case fast_new_instance_id:
994 case fast_new_instance_init_check_id:
995 {
996 Register klass = rdx; // Incoming
997 Register obj = rax; // Result
998
999 if (id == new_instance_id) {
1000 __ set_info("new_instance", dont_gc_arguments);
1001 } else if (id == fast_new_instance_id) {
1002 __ set_info("fast new_instance", dont_gc_arguments);
1003 } else {
1004 assert(id == fast_new_instance_init_check_id, "bad StubID");
1005 __ set_info("fast new_instance init check", dont_gc_arguments);
1006 }
1007
1008 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) && UseTLAB
1009 && Universe::heap()->supports_inline_contig_alloc()) {
1010 Label slow_path;
1011 Register obj_size = rcx;
1012 Register t1 = rbx;
1013 Register t2 = rsi;
1014 assert_different_registers(klass, obj, obj_size, t1, t2);
1015
1016 __ push(rdi);
1017 __ push(rbx);
1018
1019 if (id == fast_new_instance_init_check_id) {
1020 // make sure the klass is initialized
1021 __ cmpb(Address(klass, InstanceKlass::init_state_offset()), InstanceKlass::fully_initialized);
1022 __ jcc(Assembler::notEqual, slow_path);
1023 }
1024
1025 #ifdef ASSERT
1026 // assert object can be fast path allocated
1027 {
1028 Label ok, not_ok;
1029 __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1030 __ cmpl(obj_size, 0); // make sure it's an instance (LH > 0)
1031 __ jcc(Assembler::lessEqual, not_ok);
1032 __ testl(obj_size, Klass::_lh_instance_slow_path_bit);
1033 __ jcc(Assembler::zero, ok);
1034 __ bind(not_ok);
1035 __ stop("assert(can be fast path allocated)");
1036 __ should_not_reach_here();
1037 __ bind(ok);
1038 }
1039 #endif // ASSERT
1040
1041 // if we got here then the TLAB allocation failed, so try
1042 // refilling the TLAB or allocating directly from eden.
1043 Label retry_tlab, try_eden;
1044 const Register thread = NOT_LP64(rdi) LP64_ONLY(r15_thread);
1045 NOT_LP64(__ get_thread(thread));
1046
1047 __ bind(try_eden);
1048 // get the instance size (size is postive so movl is fine for 64bit)
1049 __ movl(obj_size, Address(klass, Klass::layout_helper_offset()));
1050
1051 __ eden_allocate(obj, obj_size, 0, t1, slow_path);
1052 __ incr_allocated_bytes(thread, obj_size, 0);
1053
1054 __ initialize_object(obj, klass, obj_size, 0, t1, t2, /* is_tlab_allocated */ false);
1055 __ verify_oop(obj);
1056 __ pop(rbx);
1057 __ pop(rdi);
1058 __ ret(0);
1059
1060 __ bind(slow_path);
1061 __ pop(rbx);
1062 __ pop(rdi);
1063 }
1064
1065 __ enter();
1066 OopMap* map = save_live_registers(sasm, 2);
1067 int call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_instance), klass);
1068 oop_maps = new OopMapSet();
1069 oop_maps->add_gc_map(call_offset, map);
1070 restore_live_registers_except_rax(sasm);
1071 __ verify_oop(obj);
1072 __ leave();
1073 __ ret(0);
1074
1075 // rax,: new instance
1076 }
1077
1078 break;
1079
1080 case counter_overflow_id:
1081 {
1082 Register bci = rax, method = rbx;
1083 __ enter();
1084 OopMap* map = save_live_registers(sasm, 3);
1085 // Retrieve bci
1086 __ movl(bci, Address(rbp, 2*BytesPerWord));
1087 // And a pointer to the Method*
1088 __ movptr(method, Address(rbp, 3*BytesPerWord));
1089 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, counter_overflow), bci, method);
1090 oop_maps = new OopMapSet();
1091 oop_maps->add_gc_map(call_offset, map);
1092 restore_live_registers(sasm);
1093 __ leave();
1094 __ ret(0);
1095 }
1096 break;
1097
1098 case new_type_array_id:
1099 case new_object_array_id:
1100 {
1101 Register length = rbx; // Incoming
1102 Register klass = rdx; // Incoming
1103 Register obj = rax; // Result
1104
1105 if (id == new_type_array_id) {
1106 __ set_info("new_type_array", dont_gc_arguments);
1107 } else {
1108 __ set_info("new_object_array", dont_gc_arguments);
1109 }
1110
1111 #ifdef ASSERT
1112 // assert object type is really an array of the proper kind
1113 {
1114 Label ok;
1115 Register t0 = obj;
1116 __ movl(t0, Address(klass, Klass::layout_helper_offset()));
1117 __ sarl(t0, Klass::_lh_array_tag_shift);
1118 int tag = ((id == new_type_array_id)
1119 ? Klass::_lh_array_tag_type_value
1120 : Klass::_lh_array_tag_obj_value);
1121 __ cmpl(t0, tag);
1122 __ jcc(Assembler::equal, ok);
1123 __ stop("assert(is an array klass)");
1124 __ should_not_reach_here();
1125 __ bind(ok);
1126 }
1127 #endif // ASSERT
1128
1129 // If we got here, the TLAB allocation failed, so try allocating from
1130 // eden if inline contiguous allocations are supported.
1131 if (UseTLAB && Universe::heap()->supports_inline_contig_alloc()) {
1132 Register arr_size = rsi;
1133 Register t1 = rcx; // must be rcx for use as shift count
1134 Register t2 = rdi;
1135 Label slow_path;
1136
1137 // get the allocation size: round_up(hdr + length << (layout_helper & 0x1F))
1138 // since size is positive movl does right thing on 64bit
1139 __ movl(t1, Address(klass, Klass::layout_helper_offset()));
1140 // since size is postive movl does right thing on 64bit
1141 __ movl(arr_size, length);
1142 assert(t1 == rcx, "fixed register usage");
1143 __ shlptr(arr_size /* by t1=rcx, mod 32 */);
1144 __ shrptr(t1, Klass::_lh_header_size_shift);
1145 __ andptr(t1, Klass::_lh_header_size_mask);
1146 __ addptr(arr_size, t1);
1147 __ addptr(arr_size, MinObjAlignmentInBytesMask); // align up
1148 __ andptr(arr_size, ~MinObjAlignmentInBytesMask);
1149
1150 __ eden_allocate(obj, arr_size, 0, t1, slow_path); // preserves arr_size
1151
1152 // Using t2 for non 64-bit.
1153 const Register thread = NOT_LP64(t2) LP64_ONLY(r15_thread);
1154 NOT_LP64(__ get_thread(thread));
1155 __ incr_allocated_bytes(thread, arr_size, 0);
1156
1157 __ initialize_header(obj, klass, length, t1, t2);
1158 __ movb(t1, Address(klass, in_bytes(Klass::layout_helper_offset()) + (Klass::_lh_header_size_shift / BitsPerByte)));
1159 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
1160 assert(Klass::_lh_header_size_mask <= 0xFF, "bytewise");
1161 __ andptr(t1, Klass::_lh_header_size_mask);
1162 __ subptr(arr_size, t1); // body length
1163 __ addptr(t1, obj); // body start
1164 __ initialize_body(t1, arr_size, 0, t2);
1165 __ verify_oop(obj);
1166 __ ret(0);
1167
1168 __ bind(slow_path);
1169 }
1170
1171 __ enter();
1172 OopMap* map = save_live_registers(sasm, 3);
1173 int call_offset;
1174 if (id == new_type_array_id) {
1175 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_type_array), klass, length);
1176 } else {
1177 call_offset = __ call_RT(obj, noreg, CAST_FROM_FN_PTR(address, new_object_array), klass, length);
1178 }
1179
1180 oop_maps = new OopMapSet();
1181 oop_maps->add_gc_map(call_offset, map);
1182 restore_live_registers_except_rax(sasm);
1183
1184 __ verify_oop(obj);
1185 __ leave();
1186 __ ret(0);
1187
1188 // rax,: new array
1189 }
1190 break;
1191
1192 case new_multi_array_id:
1193 { StubFrame f(sasm, "new_multi_array", dont_gc_arguments);
1194 // rax,: klass
1195 // rbx,: rank
1196 // rcx: address of 1st dimension
1197 OopMap* map = save_live_registers(sasm, 4);
1198 int call_offset = __ call_RT(rax, noreg, CAST_FROM_FN_PTR(address, new_multi_array), rax, rbx, rcx);
1199
1200 oop_maps = new OopMapSet();
1201 oop_maps->add_gc_map(call_offset, map);
1202 restore_live_registers_except_rax(sasm);
1203
1204 // rax,: new multi array
1205 __ verify_oop(rax);
1206 }
1207 break;
1208
1209 case register_finalizer_id:
1210 {
1211 __ set_info("register_finalizer", dont_gc_arguments);
1212
1213 // This is called via call_runtime so the arguments
1214 // will be place in C abi locations
1215
1216 #ifdef _LP64
1217 __ verify_oop(c_rarg0);
1218 __ mov(rax, c_rarg0);
1219 #else
1220 // The object is passed on the stack and we haven't pushed a
1221 // frame yet so it's one work away from top of stack.
1222 __ movptr(rax, Address(rsp, 1 * BytesPerWord));
1223 __ verify_oop(rax);
1224 #endif // _LP64
1225
1226 // load the klass and check the has finalizer flag
1227 Label register_finalizer;
1228 Register t = rsi;
1229 __ load_klass(t, rax);
1230 __ movl(t, Address(t, Klass::access_flags_offset()));
1231 __ testl(t, JVM_ACC_HAS_FINALIZER);
1232 __ jcc(Assembler::notZero, register_finalizer);
1233 __ ret(0);
1234
1235 __ bind(register_finalizer);
1236 __ enter();
1237 OopMap* oop_map = save_live_registers(sasm, 2 /*num_rt_args */);
1238 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), rax);
1239 oop_maps = new OopMapSet();
1240 oop_maps->add_gc_map(call_offset, oop_map);
1241
1242 // Now restore all the live registers
1243 restore_live_registers(sasm);
1244
1245 __ leave();
1246 __ ret(0);
1247 }
1248 break;
1249
1250 case throw_range_check_failed_id:
1251 { StubFrame f(sasm, "range_check_failed", dont_gc_arguments);
1252 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
1253 }
1254 break;
1255
1256 case throw_index_exception_id:
1257 { StubFrame f(sasm, "index_range_check_failed", dont_gc_arguments);
1258 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
1259 }
1260 break;
1261
1262 case throw_div0_exception_id:
1263 { StubFrame f(sasm, "throw_div0_exception", dont_gc_arguments);
1264 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
1265 }
1266 break;
1267
1268 case throw_null_pointer_exception_id:
1269 { StubFrame f(sasm, "throw_null_pointer_exception", dont_gc_arguments);
1270 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
1271 }
1272 break;
1273
1274 case handle_exception_nofpu_id:
1275 case handle_exception_id:
1276 { StubFrame f(sasm, "handle_exception", dont_gc_arguments);
1277 oop_maps = generate_handle_exception(id, sasm);
1278 }
1279 break;
1280
1281 case handle_exception_from_callee_id:
1282 { StubFrame f(sasm, "handle_exception_from_callee", dont_gc_arguments);
1283 oop_maps = generate_handle_exception(id, sasm);
1284 }
1285 break;
1286
1287 case unwind_exception_id:
1288 { __ set_info("unwind_exception", dont_gc_arguments);
1289 // note: no stubframe since we are about to leave the current
1290 // activation and we are calling a leaf VM function only.
1291 generate_unwind_exception(sasm);
1292 }
1293 break;
1294
1295 case throw_array_store_exception_id:
1296 { StubFrame f(sasm, "throw_array_store_exception", dont_gc_arguments);
1297 // tos + 0: link
1298 // + 1: return address
1299 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
1300 }
1301 break;
1302
1303 case throw_class_cast_exception_id:
1304 { StubFrame f(sasm, "throw_class_cast_exception", dont_gc_arguments);
1305 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
1306 }
1307 break;
1308
1309 case throw_incompatible_class_change_error_id:
1310 { StubFrame f(sasm, "throw_incompatible_class_cast_exception", dont_gc_arguments);
1311 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
1312 }
1313 break;
1314
1315 case slow_subtype_check_id:
1316 {
1317 // Typical calling sequence:
1318 // __ push(klass_RInfo); // object klass or other subclass
1319 // __ push(sup_k_RInfo); // array element klass or other superclass
1320 // __ call(slow_subtype_check);
1321 // Note that the subclass is pushed first, and is therefore deepest.
1322 // Previous versions of this code reversed the names 'sub' and 'super'.
1323 // This was operationally harmless but made the code unreadable.
1324 enum layout {
1325 rax_off, SLOT2(raxH_off)
1326 rcx_off, SLOT2(rcxH_off)
1327 rsi_off, SLOT2(rsiH_off)
1328 rdi_off, SLOT2(rdiH_off)
1329 // saved_rbp_off, SLOT2(saved_rbpH_off)
1330 return_off, SLOT2(returnH_off)
1331 sup_k_off, SLOT2(sup_kH_off)
1332 klass_off, SLOT2(superH_off)
1333 framesize,
1334 result_off = klass_off // deepest argument is also the return value
1335 };
1336
1337 __ set_info("slow_subtype_check", dont_gc_arguments);
1338 __ push(rdi);
1339 __ push(rsi);
1340 __ push(rcx);
1341 __ push(rax);
1342
1343 // This is called by pushing args and not with C abi
1344 __ movptr(rsi, Address(rsp, (klass_off) * VMRegImpl::stack_slot_size)); // subclass
1345 __ movptr(rax, Address(rsp, (sup_k_off) * VMRegImpl::stack_slot_size)); // superclass
1346
1347 Label miss;
1348 __ check_klass_subtype_slow_path(rsi, rax, rcx, rdi, NULL, &miss);
1349
1350 // fallthrough on success:
1351 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), 1); // result
1352 __ pop(rax);
1353 __ pop(rcx);
1354 __ pop(rsi);
1355 __ pop(rdi);
1356 __ ret(0);
1357
1358 __ bind(miss);
1359 __ movptr(Address(rsp, (result_off) * VMRegImpl::stack_slot_size), NULL_WORD); // result
1360 __ pop(rax);
1361 __ pop(rcx);
1362 __ pop(rsi);
1363 __ pop(rdi);
1364 __ ret(0);
1365 }
1366 break;
1367
1368 case monitorenter_nofpu_id:
1369 save_fpu_registers = false;
1370 // fall through
1371 case monitorenter_id:
1372 {
1373 StubFrame f(sasm, "monitorenter", dont_gc_arguments);
1374 OopMap* map = save_live_registers(sasm, 3, save_fpu_registers);
1375
1376 // Called with store_parameter and not C abi
1377
1378 f.load_argument(1, rax); // rax,: object
1379 f.load_argument(0, rbx); // rbx,: lock address
1380
1381 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), rax, rbx);
1382
1383 oop_maps = new OopMapSet();
1384 oop_maps->add_gc_map(call_offset, map);
1385 restore_live_registers(sasm, save_fpu_registers);
1386 }
1387 break;
1388
1389 case monitorexit_nofpu_id:
1390 save_fpu_registers = false;
1391 // fall through
1392 case monitorexit_id:
1393 {
1394 StubFrame f(sasm, "monitorexit", dont_gc_arguments);
1395 OopMap* map = save_live_registers(sasm, 2, save_fpu_registers);
1396
1397 // Called with store_parameter and not C abi
1398
1399 f.load_argument(0, rax); // rax,: lock address
1400
1401 // note: really a leaf routine but must setup last java sp
1402 // => use call_RT for now (speed can be improved by
1403 // doing last java sp setup manually)
1404 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), rax);
1405
1406 oop_maps = new OopMapSet();
1407 oop_maps->add_gc_map(call_offset, map);
1408 restore_live_registers(sasm, save_fpu_registers);
1409 }
1410 break;
1411
1412 case deoptimize_id:
1413 {
1414 StubFrame f(sasm, "deoptimize", dont_gc_arguments);
1415 const int num_rt_args = 2; // thread, trap_request
1416 OopMap* oop_map = save_live_registers(sasm, num_rt_args);
1417 f.load_argument(0, rax);
1418 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), rax);
1419 oop_maps = new OopMapSet();
1420 oop_maps->add_gc_map(call_offset, oop_map);
1421 restore_live_registers(sasm);
1422 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1423 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1424 __ leave();
1425 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1426 }
1427 break;
1428
1429 case access_field_patching_id:
1430 { StubFrame f(sasm, "access_field_patching", dont_gc_arguments);
1431 // we should set up register map
1432 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
1433 }
1434 break;
1435
1436 case load_klass_patching_id:
1437 { StubFrame f(sasm, "load_klass_patching", dont_gc_arguments);
1438 // we should set up register map
1439 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
1440 }
1441 break;
1442
1443 case load_mirror_patching_id:
1444 { StubFrame f(sasm, "load_mirror_patching", dont_gc_arguments);
1445 // we should set up register map
1446 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
1447 }
1448 break;
1449
1450 case load_appendix_patching_id:
1451 { StubFrame f(sasm, "load_appendix_patching", dont_gc_arguments);
1452 // we should set up register map
1453 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
1454 }
1455 break;
1456
1457 case dtrace_object_alloc_id:
1458 { // rax,: object
1459 StubFrame f(sasm, "dtrace_object_alloc", dont_gc_arguments);
1460 // we can't gc here so skip the oopmap but make sure that all
1461 // the live registers get saved.
1462 save_live_registers(sasm, 1);
1463
1464 __ NOT_LP64(push(rax)) LP64_ONLY(mov(c_rarg0, rax));
1465 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc)));
1466 NOT_LP64(__ pop(rax));
1467
1468 restore_live_registers(sasm);
1469 }
1470 break;
1471
1472 case fpu2long_stub_id:
1473 {
1474 // rax, and rdx are destroyed, but should be free since the result is returned there
1475 // preserve rsi,ecx
1476 __ push(rsi);
1477 __ push(rcx);
1478 LP64_ONLY(__ push(rdx);)
1479
1480 // check for NaN
1481 Label return0, do_return, return_min_jlong, do_convert;
1482
1483 Address value_high_word(rsp, wordSize + 4);
1484 Address value_low_word(rsp, wordSize);
1485 Address result_high_word(rsp, 3*wordSize + 4);
1486 Address result_low_word(rsp, 3*wordSize);
1487
1488 __ subptr(rsp, 32); // more than enough on 32bit
1489 __ fst_d(value_low_word);
1490 __ movl(rax, value_high_word);
1491 __ andl(rax, 0x7ff00000);
1492 __ cmpl(rax, 0x7ff00000);
1493 __ jcc(Assembler::notEqual, do_convert);
1494 __ movl(rax, value_high_word);
1495 __ andl(rax, 0xfffff);
1496 __ orl(rax, value_low_word);
1497 __ jcc(Assembler::notZero, return0);
1498
1499 __ bind(do_convert);
1500 __ fnstcw(Address(rsp, 0));
1501 __ movzwl(rax, Address(rsp, 0));
1502 __ orl(rax, 0xc00);
1503 __ movw(Address(rsp, 2), rax);
1504 __ fldcw(Address(rsp, 2));
1505 __ fwait();
1506 __ fistp_d(result_low_word);
1507 __ fldcw(Address(rsp, 0));
1508 __ fwait();
1509 // This gets the entire long in rax on 64bit
1510 __ movptr(rax, result_low_word);
1511 // testing of high bits
1512 __ movl(rdx, result_high_word);
1513 __ mov(rcx, rax);
1514 // What the heck is the point of the next instruction???
1515 __ xorl(rcx, 0x0);
1516 __ movl(rsi, 0x80000000);
1517 __ xorl(rsi, rdx);
1518 __ orl(rcx, rsi);
1519 __ jcc(Assembler::notEqual, do_return);
1520 __ fldz();
1521 __ fcomp_d(value_low_word);
1522 __ fnstsw_ax();
1523 #ifdef _LP64
1524 __ testl(rax, 0x4100); // ZF & CF == 0
1525 __ jcc(Assembler::equal, return_min_jlong);
1526 #else
1527 __ sahf();
1528 __ jcc(Assembler::above, return_min_jlong);
1529 #endif // _LP64
1530 // return max_jlong
1531 #ifndef _LP64
1532 __ movl(rdx, 0x7fffffff);
1533 __ movl(rax, 0xffffffff);
1534 #else
1535 __ mov64(rax, CONST64(0x7fffffffffffffff));
1536 #endif // _LP64
1537 __ jmp(do_return);
1538
1539 __ bind(return_min_jlong);
1540 #ifndef _LP64
1541 __ movl(rdx, 0x80000000);
1542 __ xorl(rax, rax);
1543 #else
1544 __ mov64(rax, UCONST64(0x8000000000000000));
1545 #endif // _LP64
1546 __ jmp(do_return);
1547
1548 __ bind(return0);
1549 __ fpop();
1550 #ifndef _LP64
1551 __ xorptr(rdx,rdx);
1552 __ xorptr(rax,rax);
1553 #else
1554 __ xorptr(rax, rax);
1555 #endif // _LP64
1556
1557 __ bind(do_return);
1558 __ addptr(rsp, 32);
1559 LP64_ONLY(__ pop(rdx);)
1560 __ pop(rcx);
1561 __ pop(rsi);
1562 __ ret(0);
1563 }
1564 break;
1565
1566 case predicate_failed_trap_id:
1567 {
1568 StubFrame f(sasm, "predicate_failed_trap", dont_gc_arguments);
1569
1570 OopMap* map = save_live_registers(sasm, 1);
1571
1572 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
1573 oop_maps = new OopMapSet();
1574 oop_maps->add_gc_map(call_offset, map);
1575 restore_live_registers(sasm);
1576 __ leave();
1577 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
1578 assert(deopt_blob != NULL, "deoptimization blob must have been created");
1579
1580 __ jump(RuntimeAddress(deopt_blob->unpack_with_reexecution()));
1581 }
1582 break;
1583
1584 default:
1585 { StubFrame f(sasm, "unimplemented entry", dont_gc_arguments);
1586 __ movptr(rax, (int)id);
1587 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), rax);
1588 __ should_not_reach_here();
1589 }
1590 break;
1591 }
1592 return oop_maps;
1593 }
1594
1595 #undef __
1596
1597 const char *Runtime1::pd_name_for_address(address entry) {
1598 return "<unknown function>";
1599 }