1 /*
  2  * Copyright (c) 2018, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "c1/c1_LIRGenerator.hpp"
 27 #include "c1/c1_CodeStubs.hpp"
 28 #include "gc/g1/c1/g1BarrierSetC1.hpp"
 29 #include "gc/g1/g1BarrierSet.hpp"
 30 #include "gc/g1/g1BarrierSetAssembler.hpp"
 31 #include "gc/g1/g1ThreadLocalData.hpp"
 32 #include "gc/g1/heapRegion.hpp"
 33 #include "utilities/macros.hpp"
 34 
 35 #ifdef ASSERT
 36 #define __ gen->lir(__FILE__, __LINE__)->
 37 #else
 38 #define __ gen->lir()->
 39 #endif
 40 
 41 void G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
 42   G1BarrierSetAssembler* bs = (G1BarrierSetAssembler*)BarrierSet::barrier_set()->barrier_set_assembler();
 43   bs->gen_g1_pre_barrier_stub(ce, this);
 44 }
 45 
 46 void G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
 47   G1BarrierSetAssembler* bs = (G1BarrierSetAssembler*)BarrierSet::barrier_set()->barrier_set_assembler();
 48   bs->gen_g1_post_barrier_stub(ce, this);
 49 }
 50 
 51 void G1BarrierSetC1::pre_barrier(LIRAccess& access, LIR_Opr addr_opr,
 52                                  LIR_Opr pre_val, CodeEmitInfo* info) {
 53   LIRGenerator* gen = access.gen();
 54   DecoratorSet decorators = access.decorators();
 55   bool in_heap = (decorators & IN_HEAP) != 0;
 56   bool in_conc_root = (decorators & IN_CONCURRENT_ROOT) != 0;
 57   if (!in_heap && !in_conc_root) {
 58     return;
 59   }
 60 
 61   // First we test whether marking is in progress.
 62   BasicType flag_type;
 63   bool patch = (decorators & C1_NEEDS_PATCHING) != 0;
 64   bool do_load = pre_val == LIR_OprFact::illegalOpr;
 65   if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
 66     flag_type = T_INT;
 67   } else {
 68     guarantee(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1,
 69               "Assumption");
 70     // Use unsigned type T_BOOLEAN here rather than signed T_BYTE since some platforms, eg. ARM,
 71     // need to use unsigned instructions to use the large offset to load the satb_mark_queue.
 72     flag_type = T_BOOLEAN;
 73   }
 74   LIR_Opr thrd = gen->getThreadPointer();
 75   LIR_Address* mark_active_flag_addr =
 76     new LIR_Address(thrd,
 77                     in_bytes(G1ThreadLocalData::satb_mark_queue_active_offset()),
 78                     flag_type);
 79   // Read the marking-in-progress flag.
 80   LIR_Opr flag_val = gen->new_register(T_INT);
 81   __ load(mark_active_flag_addr, flag_val);
 82   __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
 83 
 84   LIR_PatchCode pre_val_patch_code = lir_patch_none;
 85 
 86   CodeStub* slow;
 87 
 88   if (do_load) {
 89     assert(pre_val == LIR_OprFact::illegalOpr, "sanity");
 90     assert(addr_opr != LIR_OprFact::illegalOpr, "sanity");
 91 
 92     if (patch)
 93       pre_val_patch_code = lir_patch_normal;
 94 
 95     pre_val = gen->new_register(T_OBJECT);
 96 
 97     if (!addr_opr->is_address()) {
 98       assert(addr_opr->is_register(), "must be");
 99       addr_opr = LIR_OprFact::address(new LIR_Address(addr_opr, T_OBJECT));
100     }
101     slow = new G1PreBarrierStub(addr_opr, pre_val, pre_val_patch_code, info);
102   } else {
103     assert(addr_opr == LIR_OprFact::illegalOpr, "sanity");
104     assert(pre_val->is_register(), "must be");
105     assert(pre_val->type() == T_OBJECT, "must be an object");
106     assert(info == NULL, "sanity");
107 
108     slow = new G1PreBarrierStub(pre_val);
109   }
110 
111   __ branch(lir_cond_notEqual, T_INT, slow);
112   __ branch_destination(slow->continuation());
113 }
114 
115 void G1BarrierSetC1::post_barrier(LIRAccess& access, LIR_OprDesc* addr, LIR_OprDesc* new_val) {
116   LIRGenerator* gen = access.gen();
117   DecoratorSet decorators = access.decorators();
118   bool in_heap = (decorators & IN_HEAP) != 0;
119   if (!in_heap) {
120     return;
121   }
122 
123   // If the "new_val" is a constant NULL, no barrier is necessary.
124   if (new_val->is_constant() &&
125       new_val->as_constant_ptr()->as_jobject() == NULL) return;
126 
127   if (!new_val->is_register()) {
128     LIR_Opr new_val_reg = gen->new_register(T_OBJECT);
129     if (new_val->is_constant()) {
130       __ move(new_val, new_val_reg);
131     } else {
132       __ leal(new_val, new_val_reg);
133     }
134     new_val = new_val_reg;
135   }
136   assert(new_val->is_register(), "must be a register at this point");
137 
138   if (addr->is_address()) {
139     LIR_Address* address = addr->as_address_ptr();
140     LIR_Opr ptr = gen->new_pointer_register();
141     if (!address->index()->is_valid() && address->disp() == 0) {
142       __ move(address->base(), ptr);
143     } else {
144       assert(address->disp() != max_jint, "lea doesn't support patched addresses!");
145       __ leal(addr, ptr);
146     }
147     addr = ptr;
148   }
149   assert(addr->is_register(), "must be a register at this point");
150 
151   LIR_Opr xor_res = gen->new_pointer_register();
152   LIR_Opr xor_shift_res = gen->new_pointer_register();
153   if (TwoOperandLIRForm) {
154     __ move(addr, xor_res);
155     __ logical_xor(xor_res, new_val, xor_res);
156     __ move(xor_res, xor_shift_res);
157     __ unsigned_shift_right(xor_shift_res,
158                             LIR_OprFact::intConst(HeapRegion::LogOfHRGrainBytes),
159                             xor_shift_res,
160                             LIR_OprDesc::illegalOpr());
161   } else {
162     __ logical_xor(addr, new_val, xor_res);
163     __ unsigned_shift_right(xor_res,
164                             LIR_OprFact::intConst(HeapRegion::LogOfHRGrainBytes),
165                             xor_shift_res,
166                             LIR_OprDesc::illegalOpr());
167   }
168 
169   if (!new_val->is_register()) {
170     LIR_Opr new_val_reg = gen->new_register(T_OBJECT);
171     __ leal(new_val, new_val_reg);
172     new_val = new_val_reg;
173   }
174   assert(new_val->is_register(), "must be a register at this point");
175 
176   __ cmp(lir_cond_notEqual, xor_shift_res, LIR_OprFact::intptrConst(NULL_WORD));
177 
178   CodeStub* slow = new G1PostBarrierStub(addr, new_val);
179   __ branch(lir_cond_notEqual, LP64_ONLY(T_LONG) NOT_LP64(T_INT), slow);
180   __ branch_destination(slow->continuation());
181 }
182 
183 void G1BarrierSetC1::load_at_resolved(LIRAccess& access, LIR_Opr result) {
184   DecoratorSet decorators = access.decorators();
185   bool is_weak = (decorators & ON_WEAK_OOP_REF) != 0;
186   bool is_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
187   bool is_anonymous = (decorators & ON_UNKNOWN_OOP_REF) != 0;
188   LIRGenerator *gen = access.gen();
189 
190   BarrierSetC1::load_at_resolved(access, result);
191 
192   if (access.is_oop() && (is_weak || is_phantom || is_anonymous)) {
193     // Register the value in the referent field with the pre-barrier
194     LabelObj *Lcont_anonymous;
195     if (is_anonymous) {
196       Lcont_anonymous = new LabelObj();
197       generate_referent_check(access, Lcont_anonymous);
198     }
199     pre_barrier(access, LIR_OprFact::illegalOpr /* addr_opr */,
200                 result /* pre_val */, access.patch_info() /* info */);
201     if (is_anonymous) {
202       __ branch_destination(Lcont_anonymous->label());
203     }
204   }
205 }
206 
207 class C1G1PreBarrierCodeGenClosure : public StubAssemblerCodeGenClosure {
208   virtual OopMapSet* generate_code(StubAssembler* sasm) {
209     G1BarrierSetAssembler* bs = (G1BarrierSetAssembler*)BarrierSet::barrier_set()->barrier_set_assembler();
210     bs->generate_c1_pre_barrier_runtime_stub(sasm);
211     return NULL;
212   }
213 };
214 
215 class C1G1PostBarrierCodeGenClosure : public StubAssemblerCodeGenClosure {
216   virtual OopMapSet* generate_code(StubAssembler* sasm) {
217     G1BarrierSetAssembler* bs = (G1BarrierSetAssembler*)BarrierSet::barrier_set()->barrier_set_assembler();
218     bs->generate_c1_post_barrier_runtime_stub(sasm);
219     return NULL;
220   }
221 };
222 
223 void G1BarrierSetC1::generate_c1_runtime_stubs(BufferBlob* buffer_blob) {
224   C1G1PreBarrierCodeGenClosure pre_code_gen_cl;
225   C1G1PostBarrierCodeGenClosure post_code_gen_cl;
226   _pre_barrier_c1_runtime_code_blob = Runtime1::generate_blob(buffer_blob, -1, "g1_pre_barrier_slow",
227                                                               false, &pre_code_gen_cl);
228   _post_barrier_c1_runtime_code_blob = Runtime1::generate_blob(buffer_blob, -1, "g1_post_barrier_slow",
229                                                                false, &post_code_gen_cl);
230 }