src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.hpp

BarrierSetC1_v2

BarrierSetC1

*** 25,34 ****
--- 25,40 ----
  #ifndef CPU_AARCH64_GC_G1_G1BARRIERSETASSEMBLER_AARCH64_HPP
  #define CPU_AARCH64_GC_G1_G1BARRIERSETASSEMBLER_AARCH64_HPP
  
  #include "asm/macroAssembler.hpp"
  #include "gc/shared/modRefBarrierSetAssembler.hpp"
+ #include "utilities/macros.hpp"
+ 
+ class LIR_Assembler;
+ class StubAssembler;
+ class G1PreBarrierStub;
+ class G1PostBarrierStub;
  
  class G1BarrierSetAssembler: public ModRefBarrierSetAssembler {
  protected:
    void gen_write_ref_array_pre_barrier(MacroAssembler* masm, DecoratorSet decorators,
                                         Register addr, Register count, RegSet saved_regs);
***************
*** 52,61 ****
--- 58,75 ----
  
    virtual void oop_store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
                              Address dst, Register val, Register tmp1, Register tmp2);
  
  public:
+ #ifdef COMPILER1
+   void gen_g1_pre_barrier_stub(LIR_Assembler* ce, G1PreBarrierStub* stub);
+   void gen_g1_post_barrier_stub(LIR_Assembler* ce, G1PostBarrierStub* stub);
+ 
+   void generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm);
+   void generate_c1_post_barrier_runtime_stub(StubAssembler* sasm);
+ #endif
+ 
    void load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
                 Register dst, Address src, Register tmp1, Register tmp_thread);
  };
  
  #endif // CPU_AARCH64_GC_G1_G1BARRIERSETASSEMBLER_AARCH64_HPP