1 /*
2 * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_Instruction.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_LIRGenerator.hpp"
32 #include "c1/c1_Runtime1.hpp"
33 #include "c1/c1_ValueStack.hpp"
34 #include "ci/ciArray.hpp"
35 #include "ci/ciObjArrayKlass.hpp"
36 #include "ci/ciTypeArrayKlass.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "vmreg_ppc.inline.hpp"
40
41 #ifdef ASSERT
42 #define __ gen()->lir(__FILE__, __LINE__)->
43 #else
44 #define __ gen()->lir()->
45 #endif
46
47 void LIRItem::load_byte_item() {
48 // Byte loads use same registers as other loads.
49 load_item();
50 }
51
52
53 void LIRItem::load_nonconstant() {
54 LIR_Opr r = value()->operand();
55 if (_gen->can_inline_as_constant(value())) {
56 if (!r->is_constant()) {
57 r = LIR_OprFact::value_type(value()->type());
58 }
59 _result = r;
60 } else {
61 load_item();
62 }
63 }
64
65
66 //--------------------------------------------------------------
67 // LIRGenerator
68 //--------------------------------------------------------------
69
70 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::R3_oop_opr; }
71 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::R4_opr; }
72 LIR_Opr LIRGenerator::syncLockOpr() { return FrameMap::R5_opr; } // Need temp effect for MonitorEnterStub.
73 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
74 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } // not needed
75
76 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
77 LIR_Opr opr;
78 switch (type->tag()) {
79 case intTag: opr = FrameMap::R3_opr; break;
80 case objectTag: opr = FrameMap::R3_oop_opr; break;
81 case longTag: opr = FrameMap::R3_long_opr; break;
82 case floatTag: opr = FrameMap::F1_opr; break;
83 case doubleTag: opr = FrameMap::F1_double_opr; break;
84
85 case addressTag:
86 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
87 }
88
89 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
90 return opr;
91 }
92
93 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
94 ShouldNotReachHere();
95 return LIR_OprFact::illegalOpr;
96 }
97
98
99 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
100 return new_register(T_INT);
101 }
102
103
104 //--------- loading items into registers --------------------------------
105
106 // PPC cannot inline all constants.
107 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
108 if (v->type()->as_IntConstant() != NULL) {
109 return Assembler::is_simm16(v->type()->as_IntConstant()->value());
110 } else if (v->type()->as_LongConstant() != NULL) {
111 return Assembler::is_simm16(v->type()->as_LongConstant()->value());
112 } else if (v->type()->as_ObjectConstant() != NULL) {
113 return v->type()->as_ObjectConstant()->value()->is_null_object();
114 } else {
115 return false;
116 }
117 }
118
119
120 // Only simm16 constants can be inlined.
121 bool LIRGenerator::can_inline_as_constant(Value i) const {
122 return can_store_as_constant(i, as_BasicType(i->type()));
123 }
124
125
126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
127 if (c->type() == T_INT) {
128 return Assembler::is_simm16(c->as_jint());
129 }
130 if (c->type() == T_LONG) {
131 return Assembler::is_simm16(c->as_jlong());
132 }
133 if (c->type() == T_OBJECT) {
134 return c->as_jobject() == NULL;
135 }
136 return false;
137 }
138
139
140 LIR_Opr LIRGenerator::safepoint_poll_register() {
141 return new_register(T_INT);
142 }
143
144
145 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
146 int shift, int disp, BasicType type) {
147 assert(base->is_register(), "must be");
148 intx large_disp = disp;
149
150 // Accumulate fixed displacements.
151 if (index->is_constant()) {
152 LIR_Const *constant = index->as_constant_ptr();
153 if (constant->type() == T_LONG) {
154 large_disp += constant->as_jlong() << shift;
155 } else {
156 large_disp += (intx)(constant->as_jint()) << shift;
157 }
158 index = LIR_OprFact::illegalOpr;
159 }
160
161 if (index->is_register()) {
162 // Apply the shift and accumulate the displacement.
163 if (shift > 0) {
164 LIR_Opr tmp = new_pointer_register();
165 __ shift_left(index, shift, tmp);
166 index = tmp;
167 }
168 if (large_disp != 0) {
169 LIR_Opr tmp = new_pointer_register();
170 if (Assembler::is_simm16(large_disp)) {
171 __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
172 index = tmp;
173 } else {
174 __ move(LIR_OprFact::intptrConst(large_disp), tmp);
175 __ add(tmp, index, tmp);
176 index = tmp;
177 }
178 large_disp = 0;
179 }
180 } else if (!Assembler::is_simm16(large_disp)) {
181 // Index is illegal so replace it with the displacement loaded into a register.
182 index = new_pointer_register();
183 __ move(LIR_OprFact::intptrConst(large_disp), index);
184 large_disp = 0;
185 }
186
187 // At this point we either have base + index or base + displacement.
188 if (large_disp == 0) {
189 return new LIR_Address(base, index, type);
190 } else {
191 assert(Assembler::is_simm16(large_disp), "must be");
192 return new LIR_Address(base, large_disp, type);
193 }
194 }
195
196
197 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
198 BasicType type) {
199 int elem_size = type2aelembytes(type);
200 int shift = exact_log2(elem_size);
201
202 LIR_Opr base_opr;
203 intx offset = arrayOopDesc::base_offset_in_bytes(type);
204
205 if (index_opr->is_constant()) {
206 intx i = index_opr->as_constant_ptr()->as_jint();
207 intx array_offset = i * elem_size;
208 if (Assembler::is_simm16(array_offset + offset)) {
209 base_opr = array_opr;
210 offset = array_offset + offset;
211 } else {
212 base_opr = new_pointer_register();
213 if (Assembler::is_simm16(array_offset)) {
214 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
215 } else {
216 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
217 __ add(base_opr, array_opr, base_opr);
218 }
219 }
220 } else {
221 #ifdef _LP64
222 if (index_opr->type() == T_INT) {
223 LIR_Opr tmp = new_register(T_LONG);
224 __ convert(Bytecodes::_i2l, index_opr, tmp);
225 index_opr = tmp;
226 }
227 #endif
228
229 base_opr = new_pointer_register();
230 assert (index_opr->is_register(), "Must be register");
231 if (shift > 0) {
232 __ shift_left(index_opr, shift, base_opr);
233 __ add(base_opr, array_opr, base_opr);
234 } else {
235 __ add(index_opr, array_opr, base_opr);
236 }
237 }
238 return new LIR_Address(base_opr, offset, type);
239 }
240
241
242 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
243 LIR_Opr r = NULL;
244 if (type == T_LONG) {
245 r = LIR_OprFact::longConst(x);
246 } else if (type == T_INT) {
247 r = LIR_OprFact::intConst(x);
248 } else {
249 ShouldNotReachHere();
250 }
251 if (!Assembler::is_simm16(x)) {
252 LIR_Opr tmp = new_register(type);
253 __ move(r, tmp);
254 return tmp;
255 }
256 return r;
257 }
258
259
260 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
261 LIR_Opr pointer = new_pointer_register();
262 __ move(LIR_OprFact::intptrConst(counter), pointer);
263 LIR_Address* addr = new LIR_Address(pointer, type);
264 increment_counter(addr, step);
265 }
266
267
268 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
269 LIR_Opr temp = new_register(addr->type());
270 __ move(addr, temp);
271 __ add(temp, load_immediate(step, addr->type()), temp);
272 __ move(temp, addr);
273 }
274
275
276 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
277 LIR_Opr tmp = FrameMap::R0_opr;
278 __ load(new LIR_Address(base, disp, T_INT), tmp, info);
279 __ cmp(condition, tmp, c);
280 }
281
282
283 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
284 int disp, BasicType type, CodeEmitInfo* info) {
285 LIR_Opr tmp = FrameMap::R0_opr;
286 __ load(new LIR_Address(base, disp, type), tmp, info);
287 __ cmp(condition, reg, tmp);
288 }
289
290
291 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
292 assert(left != result, "should be different registers");
293 if (is_power_of_2(c + 1)) {
294 __ shift_left(left, log2_intptr(c + 1), result);
295 __ sub(result, left, result);
296 return true;
297 } else if (is_power_of_2(c - 1)) {
298 __ shift_left(left, log2_intptr(c - 1), result);
299 __ add(result, left, result);
300 return true;
301 }
302 return false;
303 }
304
305
306 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
307 BasicType t = item->type();
308 LIR_Opr sp_opr = FrameMap::SP_opr;
309 if ((t == T_LONG || t == T_DOUBLE) &&
310 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
311 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
312 } else {
313 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
314 }
315 }
316
317
318 //----------------------------------------------------------------------
319 // visitor functions
320 //----------------------------------------------------------------------
321
322 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
323 // Following registers are used by slow_subtype_check:
324 LIR_Opr tmp1 = FrameMap::R4_opr; // super_klass
325 LIR_Opr tmp2 = FrameMap::R5_opr; // sub_klass
326 LIR_Opr tmp3 = FrameMap::R6_opr; // temp
327 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
328 }
329
330
331 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
332 assert(x->is_pinned(),"");
333 LIRItem obj(x->obj(), this);
334 obj.load_item();
335
336 set_no_result(x);
337
338 // We use R4+R5 in order to get a temp effect. These regs are used in slow path (MonitorEnterStub).
339 LIR_Opr lock = FrameMap::R5_opr;
340 LIR_Opr scratch = FrameMap::R4_opr;
341 LIR_Opr hdr = FrameMap::R6_opr;
342
343 CodeEmitInfo* info_for_exception = NULL;
344 if (x->needs_null_check()) {
345 info_for_exception = state_for(x);
346 }
347
348 // This CodeEmitInfo must not have the xhandlers because here the
349 // object is already locked (xhandlers expects object to be unlocked).
350 CodeEmitInfo* info = state_for(x, x->state(), true);
351 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
352 }
353
354
355 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
356 assert(x->is_pinned(),"");
357 LIRItem obj(x->obj(), this);
358 obj.dont_load_item();
359
360 set_no_result(x);
361 LIR_Opr lock = FrameMap::R5_opr;
362 LIR_Opr hdr = FrameMap::R4_opr; // Used for slow path (MonitorExitStub).
363 LIR_Opr obj_temp = FrameMap::R6_opr;
364 monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
365 }
366
367
368 // _ineg, _lneg, _fneg, _dneg
369 void LIRGenerator::do_NegateOp(NegateOp* x) {
370 LIRItem value(x->x(), this);
371 value.load_item();
372 LIR_Opr reg = rlock_result(x);
373 __ negate(value.result(), reg);
374 }
375
376
377 // for _fadd, _fmul, _fsub, _fdiv, _frem
378 // _dadd, _dmul, _dsub, _ddiv, _drem
379 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
380 switch (x->op()) {
381 case Bytecodes::_fadd:
382 case Bytecodes::_fmul:
383 case Bytecodes::_fsub:
384 case Bytecodes::_fdiv:
385 case Bytecodes::_dadd:
386 case Bytecodes::_dmul:
387 case Bytecodes::_dsub:
388 case Bytecodes::_ddiv: {
389 LIRItem left(x->x(), this);
390 LIRItem right(x->y(), this);
391 left.load_item();
392 right.load_item();
393 rlock_result(x);
394 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
395 }
396 break;
397
398 case Bytecodes::_frem:
399 case Bytecodes::_drem: {
400 address entry = NULL;
401 switch (x->op()) {
402 case Bytecodes::_frem:
403 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
404 break;
405 case Bytecodes::_drem:
406 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
407 break;
408 default:
409 ShouldNotReachHere();
410 }
411 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
412 set_result(x, result);
413 }
414 break;
415
416 default: ShouldNotReachHere();
417 }
418 }
419
420
421 // for _ladd, _lmul, _lsub, _ldiv, _lrem
422 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
423 bool is_div_rem = x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem;
424
425 LIRItem right(x->y(), this);
426 // Missing test if instr is commutative and if we should swap.
427 if (right.value()->type()->as_LongConstant() &&
428 (x->op() == Bytecodes::_lsub && right.value()->type()->as_LongConstant()->value() == ((-1)<<15)) ) {
429 // Sub is implemented by addi and can't support min_simm16 as constant..
430 right.load_item();
431 } else {
432 right.load_nonconstant();
433 }
434 assert(right.is_constant() || right.is_register(), "wrong state of right");
435
436 if (is_div_rem) {
437 LIR_Opr divisor = right.result();
438 if (divisor->is_register()) {
439 CodeEmitInfo* null_check_info = state_for(x);
440 __ cmp(lir_cond_equal, divisor, LIR_OprFact::longConst(0));
441 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(null_check_info));
442 } else {
443 jlong const_divisor = divisor->as_constant_ptr()->as_jlong();
444 if (const_divisor == 0) {
445 CodeEmitInfo* null_check_info = state_for(x);
446 __ jump(new DivByZeroStub(null_check_info));
447 rlock_result(x);
448 __ move(LIR_OprFact::longConst(0), x->operand()); // dummy
449 return;
450 }
451 if (x->op() == Bytecodes::_lrem && !is_power_of_2(const_divisor) && const_divisor != -1) {
452 // Remainder computation would need additional tmp != R0.
453 right.load_item();
454 }
455 }
456 }
457
458 LIRItem left(x->x(), this);
459 left.load_item();
460 rlock_result(x);
461 if (is_div_rem) {
462 CodeEmitInfo* info = NULL; // Null check already done above.
463 LIR_Opr tmp = FrameMap::R0_opr;
464 if (x->op() == Bytecodes::_lrem) {
465 __ irem(left.result(), right.result(), x->operand(), tmp, info);
466 } else if (x->op() == Bytecodes::_ldiv) {
467 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
468 }
469 } else {
470 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
471 }
472 }
473
474
475 // for: _iadd, _imul, _isub, _idiv, _irem
476 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
477 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
478
479 LIRItem right(x->y(), this);
480 // Missing test if instr is commutative and if we should swap.
481 if (right.value()->type()->as_IntConstant() &&
482 (x->op() == Bytecodes::_isub && right.value()->type()->as_IntConstant()->value() == ((-1)<<15)) ) {
483 // Sub is implemented by addi and can't support min_simm16 as constant.
484 right.load_item();
485 } else {
486 right.load_nonconstant();
487 }
488 assert(right.is_constant() || right.is_register(), "wrong state of right");
489
490 if (is_div_rem) {
491 LIR_Opr divisor = right.result();
492 if (divisor->is_register()) {
493 CodeEmitInfo* null_check_info = state_for(x);
494 __ cmp(lir_cond_equal, divisor, LIR_OprFact::intConst(0));
495 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(null_check_info));
496 } else {
497 jint const_divisor = divisor->as_constant_ptr()->as_jint();
498 if (const_divisor == 0) {
499 CodeEmitInfo* null_check_info = state_for(x);
500 __ jump(new DivByZeroStub(null_check_info));
501 rlock_result(x);
502 __ move(LIR_OprFact::intConst(0), x->operand()); // dummy
503 return;
504 }
505 if (x->op() == Bytecodes::_irem && !is_power_of_2(const_divisor) && const_divisor != -1) {
506 // Remainder computation would need additional tmp != R0.
507 right.load_item();
508 }
509 }
510 }
511
512 LIRItem left(x->x(), this);
513 left.load_item();
514 rlock_result(x);
515 if (is_div_rem) {
516 CodeEmitInfo* info = NULL; // Null check already done above.
517 LIR_Opr tmp = FrameMap::R0_opr;
518 if (x->op() == Bytecodes::_irem) {
519 __ irem(left.result(), right.result(), x->operand(), tmp, info);
520 } else if (x->op() == Bytecodes::_idiv) {
521 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
522 }
523 } else {
524 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::R0_opr);
525 }
526 }
527
528
529 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
530 ValueTag tag = x->type()->tag();
531 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
532 switch (tag) {
533 case floatTag:
534 case doubleTag: do_ArithmeticOp_FPU(x); return;
535 case longTag: do_ArithmeticOp_Long(x); return;
536 case intTag: do_ArithmeticOp_Int(x); return;
537 }
538 ShouldNotReachHere();
539 }
540
541
542 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
543 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
544 LIRItem value(x->x(), this);
545 LIRItem count(x->y(), this);
546 value.load_item();
547 LIR_Opr reg = rlock_result(x);
548 LIR_Opr mcount;
549 if (count.result()->is_register()) {
550 mcount = FrameMap::R0_opr;
551 } else {
552 mcount = LIR_OprFact::illegalOpr;
553 }
554 shift_op(x->op(), reg, value.result(), count.result(), mcount);
555 }
556
557
558 inline bool can_handle_logic_op_as_uimm(ValueType *type, Bytecodes::Code bc) {
559 jlong int_or_long_const;
560 if (type->as_IntConstant()) {
561 int_or_long_const = type->as_IntConstant()->value();
562 } else if (type->as_LongConstant()) {
563 int_or_long_const = type->as_LongConstant()->value();
564 } else if (type->as_ObjectConstant()) {
565 return type->as_ObjectConstant()->value()->is_null_object();
566 } else {
567 return false;
568 }
569
570 if (Assembler::is_uimm(int_or_long_const, 16)) return true;
571 if ((int_or_long_const & 0xFFFF) == 0 &&
572 Assembler::is_uimm((jlong)((julong)int_or_long_const >> 16), 16)) return true;
573
574 // see Assembler::andi
575 if (bc == Bytecodes::_iand &&
576 (is_power_of_2_long(int_or_long_const+1) ||
577 is_power_of_2_long(int_or_long_const) ||
578 is_power_of_2_long(-int_or_long_const))) return true;
579 if (bc == Bytecodes::_land &&
580 (is_power_of_2_long(int_or_long_const+1) ||
581 (Assembler::is_uimm(int_or_long_const, 32) && is_power_of_2_long(int_or_long_const)) ||
582 (int_or_long_const != min_jlong && is_power_of_2_long(-int_or_long_const)))) return true;
583
584 // special case: xor -1
585 if ((bc == Bytecodes::_ixor || bc == Bytecodes::_lxor) &&
586 int_or_long_const == -1) return true;
587 return false;
588 }
589
590
591 // _iand, _land, _ior, _lor, _ixor, _lxor
592 void LIRGenerator::do_LogicOp(LogicOp* x) {
593 LIRItem left(x->x(), this);
594 LIRItem right(x->y(), this);
595
596 left.load_item();
597
598 Value rval = right.value();
599 LIR_Opr r = rval->operand();
600 ValueType *type = rval->type();
601 // Logic instructions use unsigned immediate values.
602 if (can_handle_logic_op_as_uimm(type, x->op())) {
603 if (!r->is_constant()) {
604 r = LIR_OprFact::value_type(type);
605 rval->set_operand(r);
606 }
607 right.set_result(r);
608 } else {
609 right.load_item();
610 }
611
612 LIR_Opr reg = rlock_result(x);
613
614 logic_op(x->op(), reg, left.result(), right.result());
615 }
616
617
618 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
619 void LIRGenerator::do_CompareOp(CompareOp* x) {
620 LIRItem left(x->x(), this);
621 LIRItem right(x->y(), this);
622 left.load_item();
623 right.load_item();
624 LIR_Opr reg = rlock_result(x);
625 if (x->x()->type()->is_float_kind()) {
626 Bytecodes::Code code = x->op();
627 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
628 } else if (x->x()->type()->tag() == longTag) {
629 __ lcmp2int(left.result(), right.result(), reg);
630 } else {
631 Unimplemented();
632 }
633 }
634
635
636 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
637 LIR_Opr result = new_register(T_INT);
638 LIR_Opr t1 = LIR_OprFact::illegalOpr;
639 LIR_Opr t2 = LIR_OprFact::illegalOpr;
640 cmp_value.load_item();
641 new_value.load_item();
642
643 // Volatile load may be followed by Unsafe CAS.
644 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
645 __ membar();
646 } else {
647 __ membar_release();
648 }
649
650 if (type == T_OBJECT || type == T_ARRAY) {
651 if (UseCompressedOops) {
652 t1 = new_register(T_OBJECT);
653 t2 = new_register(T_OBJECT);
654 }
655 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
656 } else if (type == T_INT) {
657 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
658 } else if (type == T_LONG) {
659 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), t1, t2);
660 } else {
661 Unimplemented();
662 }
663 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
664 result, type);
665 return result;
666 }
667
668
669 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
670 LIR_Opr result = new_register(type);
671 LIR_Opr tmp = FrameMap::R0_opr;
672
673 value.load_item();
674
675 // Volatile load may be followed by Unsafe CAS.
676 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
677 __ membar();
678 } else {
679 __ membar_release();
680 }
681
682 __ xchg(addr, value.result(), result, tmp);
683
684 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
685 __ membar_acquire();
686 } else {
687 __ membar();
688 }
689 return result;
690 }
691
692
693 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
694 LIR_Opr result = new_register(type);
695 LIR_Opr tmp = FrameMap::R0_opr;
696
697 value.load_item();
698
699 // Volatile load may be followed by Unsafe CAS.
700 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
701 __ membar(); // To be safe. Unsafe semantics are unclear.
702 } else {
703 __ membar_release();
704 }
705
706 __ xadd(addr, value.result(), result, tmp);
707
708 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
709 __ membar_acquire();
710 } else {
711 __ membar();
712 }
713 return result;
714 }
715
716
717 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
718 switch (x->id()) {
719 case vmIntrinsics::_dabs: {
720 assert(x->number_of_arguments() == 1, "wrong type");
721 LIRItem value(x->argument_at(0), this);
722 value.load_item();
723 LIR_Opr dst = rlock_result(x);
724 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
725 break;
726 }
727 case vmIntrinsics::_dsqrt: {
728 if (VM_Version::has_fsqrt()) {
729 assert(x->number_of_arguments() == 1, "wrong type");
730 LIRItem value(x->argument_at(0), this);
731 value.load_item();
732 LIR_Opr dst = rlock_result(x);
733 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
734 break;
735 } // else fallthru
736 }
737 case vmIntrinsics::_dlog10: // fall through
738 case vmIntrinsics::_dlog: // fall through
739 case vmIntrinsics::_dsin: // fall through
740 case vmIntrinsics::_dtan: // fall through
741 case vmIntrinsics::_dcos: // fall through
742 case vmIntrinsics::_dexp: {
743 assert(x->number_of_arguments() == 1, "wrong type");
744
745 address runtime_entry = NULL;
746 switch (x->id()) {
747 case vmIntrinsics::_dsqrt:
748 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsqrt);
749 break;
750 case vmIntrinsics::_dsin:
751 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
752 break;
753 case vmIntrinsics::_dcos:
754 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
755 break;
756 case vmIntrinsics::_dtan:
757 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
758 break;
759 case vmIntrinsics::_dlog:
760 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
761 break;
762 case vmIntrinsics::_dlog10:
763 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
764 break;
765 case vmIntrinsics::_dexp:
766 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
767 break;
768 default:
769 ShouldNotReachHere();
770 }
771
772 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
773 set_result(x, result);
774 break;
775 }
776 case vmIntrinsics::_dpow: {
777 assert(x->number_of_arguments() == 2, "wrong type");
778 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
779 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
780 set_result(x, result);
781 break;
782 }
783 }
784 }
785
786
787 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
788 assert(x->number_of_arguments() == 5, "wrong type");
789
790 // Make all state_for calls early since they can emit code.
791 CodeEmitInfo* info = state_for(x, x->state());
792
793 LIRItem src (x->argument_at(0), this);
794 LIRItem src_pos (x->argument_at(1), this);
795 LIRItem dst (x->argument_at(2), this);
796 LIRItem dst_pos (x->argument_at(3), this);
797 LIRItem length (x->argument_at(4), this);
798
799 // Load all values in callee_save_registers (C calling convention),
800 // as this makes the parameter passing to the fast case simpler.
801 src.load_item_force (FrameMap::R14_oop_opr);
802 src_pos.load_item_force (FrameMap::R15_opr);
803 dst.load_item_force (FrameMap::R17_oop_opr);
804 dst_pos.load_item_force (FrameMap::R18_opr);
805 length.load_item_force (FrameMap::R19_opr);
806 LIR_Opr tmp = FrameMap::R20_opr;
807
808 int flags;
809 ciArrayKlass* expected_type;
810 arraycopy_helper(x, &flags, &expected_type);
811
812 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
813 length.result(), tmp,
814 expected_type, flags, info);
815 set_no_result(x);
816 }
817
818
819 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
820 // _i2b, _i2c, _i2s
821 void LIRGenerator::do_Convert(Convert* x) {
822 if (!VM_Version::has_mtfprd()) {
823 switch (x->op()) {
824
825 // int -> float: force spill
826 case Bytecodes::_l2f: {
827 if (!VM_Version::has_fcfids()) { // fcfids is >= Power7 only
828 // fcfid+frsp needs fixup code to avoid rounding incompatibility.
829 address entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
830 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
831 set_result(x, result);
832 return;
833 } // else fallthru
834 }
835 case Bytecodes::_l2d: {
836 LIRItem value(x->value(), this);
837 LIR_Opr reg = rlock_result(x);
838 value.load_item();
839 LIR_Opr tmp = force_to_spill(value.result(), T_DOUBLE);
840 __ convert(x->op(), tmp, reg);
841 return;
842 }
843 case Bytecodes::_i2f:
844 case Bytecodes::_i2d: {
845 LIRItem value(x->value(), this);
846 LIR_Opr reg = rlock_result(x);
847 value.load_item();
848 // Convert i2l first.
849 LIR_Opr tmp1 = new_register(T_LONG);
850 __ convert(Bytecodes::_i2l, value.result(), tmp1);
851 LIR_Opr tmp2 = force_to_spill(tmp1, T_DOUBLE);
852 __ convert(x->op(), tmp2, reg);
853 return;
854 }
855
856 // float -> int: result will be stored
857 case Bytecodes::_f2l:
858 case Bytecodes::_d2l: {
859 LIRItem value(x->value(), this);
860 LIR_Opr reg = rlock_result(x);
861 value.set_destroys_register(); // USE_KILL
862 value.load_item();
863 set_vreg_flag(reg, must_start_in_memory);
864 __ convert(x->op(), value.result(), reg);
865 return;
866 }
867 case Bytecodes::_f2i:
868 case Bytecodes::_d2i: {
869 LIRItem value(x->value(), this);
870 LIR_Opr reg = rlock_result(x);
871 value.set_destroys_register(); // USE_KILL
872 value.load_item();
873 // Convert l2i afterwards.
874 LIR_Opr tmp1 = new_register(T_LONG);
875 set_vreg_flag(tmp1, must_start_in_memory);
876 __ convert(x->op(), value.result(), tmp1);
877 __ convert(Bytecodes::_l2i, tmp1, reg);
878 return;
879 }
880
881 // Within same category: just register conversions.
882 case Bytecodes::_i2b:
883 case Bytecodes::_i2c:
884 case Bytecodes::_i2s:
885 case Bytecodes::_i2l:
886 case Bytecodes::_l2i:
887 case Bytecodes::_f2d:
888 case Bytecodes::_d2f:
889 break;
890
891 default: ShouldNotReachHere();
892 }
893 }
894
895 // Register conversion.
896 LIRItem value(x->value(), this);
897 LIR_Opr reg = rlock_result(x);
898 value.load_item();
899 switch (x->op()) {
900 case Bytecodes::_f2l:
901 case Bytecodes::_d2l:
902 case Bytecodes::_f2i:
903 case Bytecodes::_d2i: value.set_destroys_register(); break; // USE_KILL
904 default: break;
905 }
906 __ convert(x->op(), value.result(), reg);
907 }
908
909
910 void LIRGenerator::do_NewInstance(NewInstance* x) {
911 // This instruction can be deoptimized in the slow path.
912 const LIR_Opr reg = result_register_for(x->type());
913 #ifndef PRODUCT
914 if (PrintNotLoaded && !x->klass()->is_loaded()) {
915 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
916 }
917 #endif
918 CodeEmitInfo* info = state_for(x, x->state());
919 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewInstanceStub).
920 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
921 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
922 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
923 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
924 new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
925
926 // Must prevent reordering of stores for object initialization
927 // with stores that publish the new object.
928 __ membar_storestore();
929 LIR_Opr result = rlock_result(x);
930 __ move(reg, result);
931 }
932
933
934 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
935 // Evaluate state_for early since it may emit code.
936 CodeEmitInfo* info = state_for(x, x->state());
937
938 LIRItem length(x->length(), this);
939 length.load_item();
940
941 LIR_Opr reg = result_register_for(x->type());
942 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewTypeArrayStub).
943 // We use R5 in order to get a temp effect. This reg is used in slow path (NewTypeArrayStub).
944 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
945 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
946 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
947 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
948 LIR_Opr len = length.result();
949 BasicType elem_type = x->elt_type();
950
951 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
952
953 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
954 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
955
956 // Must prevent reordering of stores for object initialization
957 // with stores that publish the new object.
958 __ membar_storestore();
959 LIR_Opr result = rlock_result(x);
960 __ move(reg, result);
961 }
962
963
964 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
965 // Evaluate state_for early since it may emit code.
966 CodeEmitInfo* info = state_for(x, x->state());
967 // In case of patching (i.e., object class is not yet loaded),
968 // we need to reexecute the instruction and therefore provide
969 // the state before the parameters have been consumed.
970 CodeEmitInfo* patching_info = NULL;
971 if (!x->klass()->is_loaded() || PatchALot) {
972 patching_info = state_for(x, x->state_before());
973 }
974
975 LIRItem length(x->length(), this);
976 length.load_item();
977
978 const LIR_Opr reg = result_register_for(x->type());
979 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewObjectArrayStub).
980 // We use R5 in order to get a temp effect. This reg is used in slow path (NewObjectArrayStub).
981 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
982 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
983 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
984 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
985 LIR_Opr len = length.result();
986
987 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
988 ciMetadata* obj = ciObjArrayKlass::make(x->klass());
989 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
990 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
991 }
992 klass2reg_with_patching(klass_reg, obj, patching_info);
993 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
994
995 // Must prevent reordering of stores for object initialization
996 // with stores that publish the new object.
997 __ membar_storestore();
998 LIR_Opr result = rlock_result(x);
999 __ move(reg, result);
1000 }
1001
1002
1003 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1004 Values* dims = x->dims();
1005 int i = dims->length();
1006 LIRItemList* items = new LIRItemList(i, i, NULL);
1007 while (i-- > 0) {
1008 LIRItem* size = new LIRItem(dims->at(i), this);
1009 items->at_put(i, size);
1010 }
1011
1012 // Evaluate state_for early since it may emit code.
1013 CodeEmitInfo* patching_info = NULL;
1014 if (!x->klass()->is_loaded() || PatchALot) {
1015 patching_info = state_for(x, x->state_before());
1016
1017 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1018 // clone all handlers (NOTE: Usually this is handled transparently
1019 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1020 // is done explicitly here because a stub isn't being used).
1021 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1022 }
1023 CodeEmitInfo* info = state_for(x, x->state());
1024
1025 i = dims->length();
1026 while (i-- > 0) {
1027 LIRItem* size = items->at(i);
1028 size->load_nonconstant();
1029 // FrameMap::_reserved_argument_area_size includes the dimensions
1030 // varargs, because it's initialized to hir()->max_stack() when the
1031 // FrameMap is created.
1032 store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
1033 }
1034
1035 const LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path.
1036 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1037
1038 LIR_Opr rank = FrameMap::R5_opr; // Used by slow path.
1039 __ move(LIR_OprFact::intConst(x->rank()), rank);
1040
1041 LIR_Opr varargs = FrameMap::as_pointer_opr(R6); // Used by slow path.
1042 __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
1043 varargs);
1044
1045 // Note: This instruction can be deoptimized in the slow path.
1046 LIR_OprList* args = new LIR_OprList(3);
1047 args->append(klass_reg);
1048 args->append(rank);
1049 args->append(varargs);
1050 const LIR_Opr reg = result_register_for(x->type());
1051 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1052 LIR_OprFact::illegalOpr,
1053 reg, args, info);
1054
1055 // Must prevent reordering of stores for object initialization
1056 // with stores that publish the new object.
1057 __ membar_storestore();
1058 LIR_Opr result = rlock_result(x);
1059 __ move(reg, result);
1060 }
1061
1062
1063 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1064 // nothing to do for now
1065 }
1066
1067
1068 void LIRGenerator::do_CheckCast(CheckCast* x) {
1069 LIRItem obj(x->obj(), this);
1070 CodeEmitInfo* patching_info = NULL;
1071 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1072 // Must do this before locking the destination register as
1073 // an oop register, and before the obj is loaded (so x->obj()->item()
1074 // is valid for creating a debug info location).
1075 patching_info = state_for(x, x->state_before());
1076 }
1077 obj.load_item();
1078 LIR_Opr out_reg = rlock_result(x);
1079 CodeStub* stub;
1080 CodeEmitInfo* info_for_exception =
1081 (x->needs_exception_state() ? state_for(x) :
1082 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1083
1084 if (x->is_incompatible_class_change_check()) {
1085 assert(patching_info == NULL, "can't patch this");
1086 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id,
1087 LIR_OprFact::illegalOpr, info_for_exception);
1088 } else if (x->is_invokespecial_receiver_check()) {
1089 assert(patching_info == NULL, "can't patch this");
1090 stub = new DeoptimizeStub(info_for_exception,
1091 Deoptimization::Reason_class_check,
1092 Deoptimization::Action_none);
1093 } else {
1094 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1095 }
1096 // Following registers are used by slow_subtype_check:
1097 LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1098 LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1099 LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1100 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1101 x->direct_compare(), info_for_exception, patching_info, stub,
1102 x->profiled_method(), x->profiled_bci());
1103 }
1104
1105
1106 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1107 LIRItem obj(x->obj(), this);
1108 CodeEmitInfo* patching_info = NULL;
1109 if (!x->klass()->is_loaded() || PatchALot) {
1110 patching_info = state_for(x, x->state_before());
1111 }
1112 // Ensure the result register is not the input register because the
1113 // result is initialized before the patching safepoint.
1114 obj.load_item();
1115 LIR_Opr out_reg = rlock_result(x);
1116 // Following registers are used by slow_subtype_check:
1117 LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1118 LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1119 LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1120 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1121 x->direct_compare(), patching_info,
1122 x->profiled_method(), x->profiled_bci());
1123 }
1124
1125
1126 void LIRGenerator::do_If(If* x) {
1127 assert(x->number_of_sux() == 2, "inconsistency");
1128 ValueTag tag = x->x()->type()->tag();
1129 LIRItem xitem(x->x(), this);
1130 LIRItem yitem(x->y(), this);
1131 LIRItem* xin = &xitem;
1132 LIRItem* yin = &yitem;
1133 If::Condition cond = x->cond();
1134
1135 LIR_Opr left = LIR_OprFact::illegalOpr;
1136 LIR_Opr right = LIR_OprFact::illegalOpr;
1137
1138 xin->load_item();
1139 left = xin->result();
1140
1141 if (yin->result()->is_constant() && yin->result()->type() == T_INT &&
1142 Assembler::is_simm16(yin->result()->as_constant_ptr()->as_jint())) {
1143 // Inline int constants which are small enough to be immediate operands.
1144 right = LIR_OprFact::value_type(yin->value()->type());
1145 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1146 (cond == If::eql || cond == If::neq)) {
1147 // Inline long zero.
1148 right = LIR_OprFact::value_type(yin->value()->type());
1149 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
1150 right = LIR_OprFact::value_type(yin->value()->type());
1151 } else {
1152 yin->load_item();
1153 right = yin->result();
1154 }
1155 set_no_result(x);
1156
1157 // Add safepoint before generating condition code so it can be recomputed.
1158 if (x->is_safepoint()) {
1159 // Increment backedge counter if needed.
1160 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1161 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1162 }
1163
1164 __ cmp(lir_cond(cond), left, right);
1165 // Generate branch profiling. Profiling code doesn't kill flags.
1166 profile_branch(x, cond);
1167 move_to_phi(x->state());
1168 if (x->x()->type()->is_float_kind()) {
1169 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1170 } else {
1171 __ branch(lir_cond(cond), right->type(), x->tsux());
1172 }
1173 assert(x->default_sux() == x->fsux(), "wrong destination above");
1174 __ jump(x->default_sux());
1175 }
1176
1177
1178 LIR_Opr LIRGenerator::getThreadPointer() {
1179 return FrameMap::as_pointer_opr(R16_thread);
1180 }
1181
1182
1183 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1184 LIR_Opr arg1 = FrameMap::R3_opr; // ARG1
1185 __ move(LIR_OprFact::intConst(block->block_id()), arg1);
1186 LIR_OprList* args = new LIR_OprList(1);
1187 args->append(arg1);
1188 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1189 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1190 }
1191
1192
1193 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1194 CodeEmitInfo* info) {
1195 #ifdef _LP64
1196 __ store(value, address, info);
1197 #else
1198 Unimplemented();
1199 // __ volatile_store_mem_reg(value, address, info);
1200 #endif
1201 }
1202
1203 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1204 CodeEmitInfo* info) {
1205 #ifdef _LP64
1206 __ load(address, result, info);
1207 #else
1208 Unimplemented();
1209 // __ volatile_load_mem_reg(address, result, info);
1210 #endif
1211 }
1212
1213
1214 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1215 assert(UseCRC32Intrinsics, "or should not be here");
1216 LIR_Opr result = rlock_result(x);
1217
1218 switch (x->id()) {
1219 case vmIntrinsics::_updateCRC32: {
1220 LIRItem crc(x->argument_at(0), this);
1221 LIRItem val(x->argument_at(1), this);
1222 // Registers destroyed by update_crc32.
1223 crc.set_destroys_register();
1224 val.set_destroys_register();
1225 crc.load_item();
1226 val.load_item();
1227 __ update_crc32(crc.result(), val.result(), result);
1228 break;
1229 }
1230 case vmIntrinsics::_updateBytesCRC32:
1231 case vmIntrinsics::_updateByteBufferCRC32: {
1232 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1233
1234 LIRItem crc(x->argument_at(0), this);
1235 LIRItem buf(x->argument_at(1), this);
1236 LIRItem off(x->argument_at(2), this);
1237 LIRItem len(x->argument_at(3), this);
1238 buf.load_item();
1239 off.load_nonconstant();
1240
1241 LIR_Opr index = off.result();
1242 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1243 if (off.result()->is_constant()) {
1244 index = LIR_OprFact::illegalOpr;
1245 offset += off.result()->as_jint();
1246 }
1247 LIR_Opr base_op = buf.result();
1248 LIR_Address* a = NULL;
1249
1250 if (index->is_valid()) {
1251 LIR_Opr tmp = new_register(T_LONG);
1252 __ convert(Bytecodes::_i2l, index, tmp);
1253 index = tmp;
1254 __ add(index, LIR_OprFact::intptrConst(offset), index);
1255 a = new LIR_Address(base_op, index, T_BYTE);
1256 } else {
1257 a = new LIR_Address(base_op, offset, T_BYTE);
1258 }
1259
1260 BasicTypeList signature(3);
1261 signature.append(T_INT);
1262 signature.append(T_ADDRESS);
1263 signature.append(T_INT);
1264 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1265 const LIR_Opr result_reg = result_register_for(x->type());
1266
1267 LIR_Opr arg1 = cc->at(0),
1268 arg2 = cc->at(1),
1269 arg3 = cc->at(2);
1270
1271 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1272 __ leal(LIR_OprFact::address(a), arg2);
1273 len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1274
1275 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1276 __ move(result_reg, result);
1277 break;
1278 }
1279 default: {
1280 ShouldNotReachHere();
1281 }
1282 }
1283 }
1284
1285 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1286 assert(UseCRC32CIntrinsics, "or should not be here");
1287 LIR_Opr result = rlock_result(x);
1288
1289 switch (x->id()) {
1290 case vmIntrinsics::_updateBytesCRC32C:
1291 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1292 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1293
1294 LIRItem crc(x->argument_at(0), this);
1295 LIRItem buf(x->argument_at(1), this);
1296 LIRItem off(x->argument_at(2), this);
1297 LIRItem end(x->argument_at(3), this);
1298 buf.load_item();
1299 off.load_nonconstant();
1300 end.load_nonconstant();
1301
1302 // len = end - off
1303 LIR_Opr len = end.result();
1304 LIR_Opr tmpA = new_register(T_INT);
1305 LIR_Opr tmpB = new_register(T_INT);
1306 __ move(end.result(), tmpA);
1307 __ move(off.result(), tmpB);
1308 __ sub(tmpA, tmpB, tmpA);
1309 len = tmpA;
1310
1311 LIR_Opr index = off.result();
1312 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1313 if (off.result()->is_constant()) {
1314 index = LIR_OprFact::illegalOpr;
1315 offset += off.result()->as_jint();
1316 }
1317 LIR_Opr base_op = buf.result();
1318 LIR_Address* a = NULL;
1319
1320 if (index->is_valid()) {
1321 LIR_Opr tmp = new_register(T_LONG);
1322 __ convert(Bytecodes::_i2l, index, tmp);
1323 index = tmp;
1324 __ add(index, LIR_OprFact::intptrConst(offset), index);
1325 a = new LIR_Address(base_op, index, T_BYTE);
1326 } else {
1327 a = new LIR_Address(base_op, offset, T_BYTE);
1328 }
1329
1330 BasicTypeList signature(3);
1331 signature.append(T_INT);
1332 signature.append(T_ADDRESS);
1333 signature.append(T_INT);
1334 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1335 const LIR_Opr result_reg = result_register_for(x->type());
1336
1337 LIR_Opr arg1 = cc->at(0),
1338 arg2 = cc->at(1),
1339 arg3 = cc->at(2);
1340
1341 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1342 __ leal(LIR_OprFact::address(a), arg2);
1343 __ move(len, cc->at(2)); // We skip int->long conversion here, because CRC32C stub expects int.
1344
1345 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1346 __ move(result_reg, result);
1347 break;
1348 }
1349 default: {
1350 ShouldNotReachHere();
1351 }
1352 }
1353 }
1354
1355 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1356 assert(x->number_of_arguments() == 3, "wrong type");
1357 assert(UseFMA, "Needs FMA instructions support.");
1358 LIRItem value(x->argument_at(0), this);
1359 LIRItem value1(x->argument_at(1), this);
1360 LIRItem value2(x->argument_at(2), this);
1361
1362 value.load_item();
1363 value1.load_item();
1364 value2.load_item();
1365
1366 LIR_Opr calc_input = value.result();
1367 LIR_Opr calc_input1 = value1.result();
1368 LIR_Opr calc_input2 = value2.result();
1369 LIR_Opr calc_result = rlock_result(x);
1370
1371 switch (x->id()) {
1372 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1373 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1374 default: ShouldNotReachHere();
1375 }
1376 }
1377
1378 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1379 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1380 }