1 /*
2 * Copyright (c) 1999, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Defs.hpp"
27 #include "c1/c1_MacroAssembler.hpp"
28 #include "c1/c1_Runtime1.hpp"
29 #include "ci/ciUtilities.hpp"
30 #include "gc/shared/cardTable.hpp"
31 #include "gc/shared/cardTableBarrierSet.hpp"
32 #include "interpreter/interpreter.hpp"
33 #include "nativeInst_sparc.hpp"
34 #include "oops/compiledICHolder.hpp"
35 #include "oops/oop.inline.hpp"
36 #include "prims/jvmtiExport.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/signature.hpp"
39 #include "runtime/vframeArray.hpp"
40 #include "utilities/macros.hpp"
41 #include "utilities/align.hpp"
42 #include "vmreg_sparc.inline.hpp"
43
44 // Implementation of StubAssembler
45
46 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry_point, int number_of_arguments) {
47 // for sparc changing the number of arguments doesn't change
48 // anything about the frame size so we'll always lie and claim that
49 // we are only passing 1 argument.
50 set_num_rt_args(1);
51
52 assert_not_delayed();
53 // bang stack before going to runtime
54 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
55 st(G0, SP, G3_scratch);
56
57 // debugging support
58 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
59
60 set_last_Java_frame(SP, noreg);
61 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
62 save_thread(L7_thread_cache);
63 // do the call
64 call(entry_point, relocInfo::runtime_call_type);
65 if (!VerifyThread) {
66 delayed()->mov(G2_thread, O0); // pass thread as first argument
67 } else {
68 delayed()->nop(); // (thread already passed)
69 }
70 int call_offset = offset(); // offset of return address
71 restore_thread(L7_thread_cache);
72 reset_last_Java_frame();
73
74 // check for pending exceptions
75 { Label L;
76 Address exception_addr(G2_thread, Thread::pending_exception_offset());
77 ld_ptr(exception_addr, Gtemp);
78 br_null_short(Gtemp, pt, L);
79 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
80 st_ptr(G0, vm_result_addr);
81 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
82 st_ptr(G0, vm_result_addr_2);
83
84 if (frame_size() == no_frame_size) {
85 // we use O7 linkage so that forward_exception_entry has the issuing PC
86 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
87 delayed()->restore();
88 } else if (_stub_id == Runtime1::forward_exception_id) {
89 should_not_reach_here();
90 } else {
91 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
92 jump_to(exc, G4);
93 delayed()->nop();
94 }
95 bind(L);
96 }
97
98 // get oop result if there is one and reset the value in the thread
99 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
100 get_vm_result (oop_result1);
101 } else {
102 // be a little paranoid and clear the result
103 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
104 st_ptr(G0, vm_result_addr);
105 }
106
107 // get second result if there is one and reset the value in the thread
108 if (metadata_result->is_valid()) {
109 get_vm_result_2 (metadata_result);
110 } else {
111 // be a little paranoid and clear the result
112 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
113 st_ptr(G0, vm_result_addr_2);
114 }
115
116 return call_offset;
117 }
118
119
120 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
121 // O0 is reserved for the thread
122 mov(arg1, O1);
123 return call_RT(oop_result1, metadata_result, entry, 1);
124 }
125
126
127 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
128 // O0 is reserved for the thread
129 mov(arg1, O1);
130 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
131 return call_RT(oop_result1, metadata_result, entry, 2);
132 }
133
134
135 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
136 // O0 is reserved for the thread
137 mov(arg1, O1);
138 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
139 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
140 return call_RT(oop_result1, metadata_result, entry, 3);
141 }
142
143 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
144 set_info(name, must_gc_arguments);
145 }
146
147 void StubAssembler::epilogue() {
148 delayed()->restore();
149 }
150
151 // Implementation of Runtime1
152
153
154 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
155 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
156 static int reg_save_size_in_words;
157 static int frame_size_in_bytes = -1;
158
159 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
160 assert(frame_size_in_bytes == sasm->total_frame_size_in_bytes(reg_save_size_in_words),
161 "mismatch in calculation");
162 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
163 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
164 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
165
166 int i;
167 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
168 Register r = as_Register(i);
169 if (r == G1 || r == G3 || r == G4 || r == G5) {
170 int sp_offset = cpu_reg_save_offsets[i];
171 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
172 r->as_VMReg());
173 }
174 }
175
176 if (save_fpu_registers) {
177 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
178 FloatRegister r = as_FloatRegister(i);
179 int sp_offset = fpu_reg_save_offsets[i];
180 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
181 r->as_VMReg());
182 }
183 }
184 return oop_map;
185 }
186
187 #define __ this->
188
189 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
190 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
191 "mismatch in calculation");
192 __ save_frame_c1(frame_size_in_bytes);
193
194 // Record volatile registers as callee-save values in an OopMap so their save locations will be
195 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
196 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
197 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
198 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
199 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
200
201 int i;
202 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
203 Register r = as_Register(i);
204 if (r == G1 || r == G3 || r == G4 || r == G5) {
205 int sp_offset = cpu_reg_save_offsets[i];
206 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
207 }
208 }
209
210 if (save_fpu_registers) {
211 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
212 FloatRegister r = as_FloatRegister(i);
213 int sp_offset = fpu_reg_save_offsets[i];
214 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
215 }
216 }
217 }
218
219 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
220 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
221 Register r = as_Register(i);
222 if (r == G1 || r == G3 || r == G4 || r == G5) {
223 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
224 }
225 }
226
227 if (restore_fpu_registers) {
228 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
229 FloatRegister r = as_FloatRegister(i);
230 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
231 }
232 }
233 }
234
235 #undef __
236 #define __ sasm->
237
238 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
239 sasm->save_live_registers_no_oop_map(save_fpu_registers);
240 return generate_oop_map(sasm, save_fpu_registers);
241 }
242
243 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
244 sasm->restore_live_registers(restore_fpu_registers);
245 }
246
247
248 void Runtime1::initialize_pd() {
249 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
250 //
251 // A stub routine will have a frame that is at least large enough to hold
252 // a register window save area (obviously) and the volatile g registers
253 // and floating registers. A user of save_live_registers can have a frame
254 // that has more scratch area in it (although typically they will use L-regs).
255 // in that case the frame will look like this (stack growing down)
256 //
257 // FP -> | |
258 // | scratch mem |
259 // | " " |
260 // --------------
261 // | float regs |
262 // | " " |
263 // ---------------
264 // | G regs |
265 // | " " |
266 // ---------------
267 // | abi reg. |
268 // | window save |
269 // | area |
270 // SP -> ---------------
271 //
272 int i;
273 int sp_offset = align_up((int)frame::register_save_words, 2); // start doubleword aligned
274
275 // only G int registers are saved explicitly; others are found in register windows
276 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
277 Register r = as_Register(i);
278 if (r == G1 || r == G3 || r == G4 || r == G5) {
279 cpu_reg_save_offsets[i] = sp_offset;
280 sp_offset++;
281 }
282 }
283
284 // all float registers are saved explicitly
285 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
286 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
287 fpu_reg_save_offsets[i] = sp_offset;
288 sp_offset++;
289 }
290 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
291 // this should match assembler::total_frame_size_in_bytes, which
292 // isn't callable from this context. It's checked by an assert when
293 // it's used though.
294 frame_size_in_bytes = align_up(sp_offset * wordSize, 8);
295 }
296
297
298 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
299 // make a frame and preserve the caller's caller-save registers
300 OopMap* oop_map = save_live_registers(sasm);
301 int call_offset;
302 if (!has_argument) {
303 call_offset = __ call_RT(noreg, noreg, target);
304 } else {
305 call_offset = __ call_RT(noreg, noreg, target, G4);
306 }
307 OopMapSet* oop_maps = new OopMapSet();
308 oop_maps->add_gc_map(call_offset, oop_map);
309
310 __ should_not_reach_here();
311 return oop_maps;
312 }
313
314
315 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
316 Register arg1, Register arg2, Register arg3) {
317 // make a frame and preserve the caller's caller-save registers
318 OopMap* oop_map = save_live_registers(sasm);
319
320 int call_offset;
321 if (arg1 == noreg) {
322 call_offset = __ call_RT(result, noreg, target);
323 } else if (arg2 == noreg) {
324 call_offset = __ call_RT(result, noreg, target, arg1);
325 } else if (arg3 == noreg) {
326 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
327 } else {
328 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
329 }
330 OopMapSet* oop_maps = NULL;
331
332 oop_maps = new OopMapSet();
333 oop_maps->add_gc_map(call_offset, oop_map);
334 restore_live_registers(sasm);
335
336 __ ret();
337 __ delayed()->restore();
338
339 return oop_maps;
340 }
341
342
343 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
344 // make a frame and preserve the caller's caller-save registers
345 OopMap* oop_map = save_live_registers(sasm);
346
347 // call the runtime patching routine, returns non-zero if nmethod got deopted.
348 int call_offset = __ call_RT(noreg, noreg, target);
349 OopMapSet* oop_maps = new OopMapSet();
350 oop_maps->add_gc_map(call_offset, oop_map);
351
352 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
353 // deoptimization handler entry that will cause re-execution of the current bytecode
354 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
355 assert(deopt_blob != NULL, "deoptimization blob must have been created");
356
357 Label no_deopt;
358 __ br_null_short(O0, Assembler::pt, no_deopt);
359
360 // return to the deoptimization handler entry for unpacking and rexecute
361 // if we simply returned the we'd deopt as if any call we patched had just
362 // returned.
363
364 restore_live_registers(sasm);
365
366 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
367 __ jump_to(dest, O0);
368 __ delayed()->restore();
369
370 __ bind(no_deopt);
371 restore_live_registers(sasm);
372 __ ret();
373 __ delayed()->restore();
374
375 return oop_maps;
376 }
377
378 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
379
380 OopMapSet* oop_maps = NULL;
381 // for better readability
382 const bool must_gc_arguments = true;
383 const bool dont_gc_arguments = false;
384
385 // stub code & info for the different stubs
386 switch (id) {
387 case forward_exception_id:
388 {
389 oop_maps = generate_handle_exception(id, sasm);
390 }
391 break;
392
393 case new_instance_id:
394 case fast_new_instance_id:
395 case fast_new_instance_init_check_id:
396 {
397 Register G5_klass = G5; // Incoming
398 Register O0_obj = O0; // Outgoing
399
400 if (id == new_instance_id) {
401 __ set_info("new_instance", dont_gc_arguments);
402 } else if (id == fast_new_instance_id) {
403 __ set_info("fast new_instance", dont_gc_arguments);
404 } else {
405 assert(id == fast_new_instance_init_check_id, "bad StubID");
406 __ set_info("fast new_instance init check", dont_gc_arguments);
407 }
408
409 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
410 UseTLAB && Universe::heap()->supports_inline_contig_alloc()) {
411 Label slow_path;
412 Register G1_obj_size = G1;
413 Register G3_t1 = G3;
414 Register G4_t2 = G4;
415 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
416
417 // Push a frame since we may do dtrace notification for the
418 // allocation which requires calling out and we don't want
419 // to stomp the real return address.
420 __ save_frame(0);
421
422 if (id == fast_new_instance_init_check_id) {
423 // make sure the klass is initialized
424 __ ldub(G5_klass, in_bytes(InstanceKlass::init_state_offset()), G3_t1);
425 __ cmp(G3_t1, InstanceKlass::fully_initialized);
426 __ br(Assembler::notEqual, false, Assembler::pn, slow_path);
427 __ delayed()->nop();
428 }
429 #ifdef ASSERT
430 // assert object can be fast path allocated
431 {
432 Label ok, not_ok;
433 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
434 // make sure it's an instance (LH > 0)
435 __ cmp_and_br_short(G1_obj_size, 0, Assembler::lessEqual, Assembler::pn, not_ok);
436 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
437 __ br(Assembler::zero, false, Assembler::pn, ok);
438 __ delayed()->nop();
439 __ bind(not_ok);
440 __ stop("assert(can be fast path allocated)");
441 __ should_not_reach_here();
442 __ bind(ok);
443 }
444 #endif // ASSERT
445
446 // If we got here then the TLAB allocation failed, so try allocating directly from eden.
447 // get the instance size
448 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
449 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
450 __ incr_allocated_bytes(G1_obj_size, G3_t1, G4_t2);
451
452 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2, /* is_tlab_allocated */ false);
453 __ verify_oop(O0_obj);
454 __ mov(O0, I0);
455 __ ret();
456 __ delayed()->restore();
457
458 __ bind(slow_path);
459
460 // pop this frame so generate_stub_call can push it's own
461 __ restore();
462 }
463
464 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
465 // I0->O0: new instance
466 }
467
468 break;
469
470 case counter_overflow_id:
471 // G4 contains bci, G5 contains method
472 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4, G5);
473 break;
474
475 case new_type_array_id:
476 case new_object_array_id:
477 {
478 Register G5_klass = G5; // Incoming
479 Register G4_length = G4; // Incoming
480 Register O0_obj = O0; // Outgoing
481
482 Address klass_lh(G5_klass, Klass::layout_helper_offset());
483 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
484 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
485 // Use this offset to pick out an individual byte of the layout_helper:
486 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
487 - Klass::_lh_header_size_shift / BitsPerByte);
488
489 if (id == new_type_array_id) {
490 __ set_info("new_type_array", dont_gc_arguments);
491 } else {
492 __ set_info("new_object_array", dont_gc_arguments);
493 }
494
495 #ifdef ASSERT
496 // assert object type is really an array of the proper kind
497 {
498 Label ok;
499 Register G3_t1 = G3;
500 __ ld(klass_lh, G3_t1);
501 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
502 int tag = ((id == new_type_array_id)
503 ? Klass::_lh_array_tag_type_value
504 : Klass::_lh_array_tag_obj_value);
505 __ cmp_and_brx_short(G3_t1, tag, Assembler::equal, Assembler::pt, ok);
506 __ stop("assert(is an array klass)");
507 __ should_not_reach_here();
508 __ bind(ok);
509 }
510 #endif // ASSERT
511
512 if (id == new_type_array_id) {
513 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
514 } else {
515 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
516 }
517 // I0 -> O0: new array
518 }
519 break;
520
521 case new_multi_array_id:
522 { // O0: klass
523 // O1: rank
524 // O2: address of 1st dimension
525 __ set_info("new_multi_array", dont_gc_arguments);
526 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
527 // I0 -> O0: new multi array
528 }
529 break;
530
531 case register_finalizer_id:
532 {
533 __ set_info("register_finalizer", dont_gc_arguments);
534
535 // load the klass and check the has finalizer flag
536 Label register_finalizer;
537 Register t = O1;
538 __ load_klass(O0, t);
539 __ ld(t, in_bytes(Klass::access_flags_offset()), t);
540 __ set(JVM_ACC_HAS_FINALIZER, G3);
541 __ andcc(G3, t, G0);
542 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
543 __ delayed()->nop();
544
545 // do a leaf return
546 __ retl();
547 __ delayed()->nop();
548
549 __ bind(register_finalizer);
550 OopMap* oop_map = save_live_registers(sasm);
551 int call_offset = __ call_RT(noreg, noreg,
552 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
553 oop_maps = new OopMapSet();
554 oop_maps->add_gc_map(call_offset, oop_map);
555
556 // Now restore all the live registers
557 restore_live_registers(sasm);
558
559 __ ret();
560 __ delayed()->restore();
561 }
562 break;
563
564 case throw_range_check_failed_id:
565 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
566 // G4: index
567 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
568 }
569 break;
570
571 case throw_index_exception_id:
572 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
573 // G4: index
574 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
575 }
576 break;
577
578 case throw_div0_exception_id:
579 { __ set_info("throw_div0_exception", dont_gc_arguments);
580 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
581 }
582 break;
583
584 case throw_null_pointer_exception_id:
585 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
586 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
587 }
588 break;
589
590 case handle_exception_id:
591 { __ set_info("handle_exception", dont_gc_arguments);
592 oop_maps = generate_handle_exception(id, sasm);
593 }
594 break;
595
596 case handle_exception_from_callee_id:
597 { __ set_info("handle_exception_from_callee", dont_gc_arguments);
598 oop_maps = generate_handle_exception(id, sasm);
599 }
600 break;
601
602 case unwind_exception_id:
603 {
604 // O0: exception
605 // I7: address of call to this method
606
607 __ set_info("unwind_exception", dont_gc_arguments);
608 __ mov(Oexception, Oexception->after_save());
609 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
610
611 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
612 G2_thread, Oissuing_pc->after_save());
613 __ verify_not_null_oop(Oexception->after_save());
614
615 // Restore SP from L7 if the exception PC is a method handle call site.
616 __ mov(O0, G5); // Save the target address.
617 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
618 __ tst(L0); // Condition codes are preserved over the restore.
619 __ restore();
620
621 __ jmp(G5, 0);
622 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
623 }
624 break;
625
626 case throw_array_store_exception_id:
627 {
628 __ set_info("throw_array_store_exception", dont_gc_arguments);
629 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
630 }
631 break;
632
633 case throw_class_cast_exception_id:
634 {
635 // G4: object
636 __ set_info("throw_class_cast_exception", dont_gc_arguments);
637 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
638 }
639 break;
640
641 case throw_incompatible_class_change_error_id:
642 {
643 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
644 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
645 }
646 break;
647
648 case slow_subtype_check_id:
649 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
650 // Arguments :
651 //
652 // ret : G3
653 // sub : G3, argument, destroyed
654 // super: G1, argument, not changed
655 // raddr: O7, blown by call
656 Label miss;
657
658 __ save_frame(0); // Blow no registers!
659
660 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
661
662 __ mov(1, G3);
663 __ ret(); // Result in G5 is 'true'
664 __ delayed()->restore(); // free copy or add can go here
665
666 __ bind(miss);
667 __ mov(0, G3);
668 __ ret(); // Result in G5 is 'false'
669 __ delayed()->restore(); // free copy or add can go here
670 }
671
672 case monitorenter_nofpu_id:
673 case monitorenter_id:
674 { // G4: object
675 // G5: lock address
676 __ set_info("monitorenter", dont_gc_arguments);
677
678 int save_fpu_registers = (id == monitorenter_id);
679 // make a frame and preserve the caller's caller-save registers
680 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
681
682 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
683
684 oop_maps = new OopMapSet();
685 oop_maps->add_gc_map(call_offset, oop_map);
686 restore_live_registers(sasm, save_fpu_registers);
687
688 __ ret();
689 __ delayed()->restore();
690 }
691 break;
692
693 case monitorexit_nofpu_id:
694 case monitorexit_id:
695 { // G4: lock address
696 // note: really a leaf routine but must setup last java sp
697 // => use call_RT for now (speed can be improved by
698 // doing last java sp setup manually)
699 __ set_info("monitorexit", dont_gc_arguments);
700
701 int save_fpu_registers = (id == monitorexit_id);
702 // make a frame and preserve the caller's caller-save registers
703 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
704
705 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
706
707 oop_maps = new OopMapSet();
708 oop_maps->add_gc_map(call_offset, oop_map);
709 restore_live_registers(sasm, save_fpu_registers);
710
711 __ ret();
712 __ delayed()->restore();
713 }
714 break;
715
716 case deoptimize_id:
717 {
718 __ set_info("deoptimize", dont_gc_arguments);
719 OopMap* oop_map = save_live_registers(sasm);
720 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), G4);
721 oop_maps = new OopMapSet();
722 oop_maps->add_gc_map(call_offset, oop_map);
723 restore_live_registers(sasm);
724 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
725 assert(deopt_blob != NULL, "deoptimization blob must have been created");
726 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
727 __ jump_to(dest, O0);
728 __ delayed()->restore();
729 }
730 break;
731
732 case access_field_patching_id:
733 { __ set_info("access_field_patching", dont_gc_arguments);
734 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
735 }
736 break;
737
738 case load_klass_patching_id:
739 { __ set_info("load_klass_patching", dont_gc_arguments);
740 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
741 }
742 break;
743
744 case load_mirror_patching_id:
745 { __ set_info("load_mirror_patching", dont_gc_arguments);
746 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
747 }
748 break;
749
750 case load_appendix_patching_id:
751 { __ set_info("load_appendix_patching", dont_gc_arguments);
752 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
753 }
754 break;
755
756 case dtrace_object_alloc_id:
757 { // O0: object
758 __ set_info("dtrace_object_alloc", dont_gc_arguments);
759 // we can't gc here so skip the oopmap but make sure that all
760 // the live registers get saved.
761 save_live_registers(sasm);
762
763 __ save_thread(L7_thread_cache);
764 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
765 relocInfo::runtime_call_type);
766 __ delayed()->mov(I0, O0);
767 __ restore_thread(L7_thread_cache);
768
769 restore_live_registers(sasm);
770 __ ret();
771 __ delayed()->restore();
772 }
773 break;
774
775 case predicate_failed_trap_id:
776 {
777 __ set_info("predicate_failed_trap", dont_gc_arguments);
778 OopMap* oop_map = save_live_registers(sasm);
779
780 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
781
782 oop_maps = new OopMapSet();
783 oop_maps->add_gc_map(call_offset, oop_map);
784
785 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
786 assert(deopt_blob != NULL, "deoptimization blob must have been created");
787 restore_live_registers(sasm);
788
789 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
790 __ jump_to(dest, O0);
791 __ delayed()->restore();
792 }
793 break;
794
795 default:
796 { __ set_info("unimplemented entry", dont_gc_arguments);
797 __ save_frame(0);
798 __ set((int)id, O1);
799 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
800 __ should_not_reach_here();
801 }
802 break;
803 }
804 return oop_maps;
805 }
806
807
808 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) {
809 __ block_comment("generate_handle_exception");
810
811 // Save registers, if required.
812 OopMapSet* oop_maps = new OopMapSet();
813 OopMap* oop_map = NULL;
814 switch (id) {
815 case forward_exception_id:
816 // We're handling an exception in the context of a compiled frame.
817 // The registers have been saved in the standard places. Perform
818 // an exception lookup in the caller and dispatch to the handler
819 // if found. Otherwise unwind and dispatch to the callers
820 // exception handler.
821 oop_map = generate_oop_map(sasm, true);
822
823 // transfer the pending exception to the exception_oop
824 __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
825 __ ld_ptr(Oexception, 0, G0);
826 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
827 __ add(I7, frame::pc_return_offset, Oissuing_pc);
828 break;
829 case handle_exception_id:
830 // At this point all registers MAY be live.
831 oop_map = save_live_registers(sasm);
832 __ mov(Oexception->after_save(), Oexception);
833 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
834 break;
835 case handle_exception_from_callee_id:
836 // At this point all registers except exception oop (Oexception)
837 // and exception pc (Oissuing_pc) are dead.
838 oop_map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
839 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
840 __ save_frame_c1(frame_size_in_bytes);
841 __ mov(Oexception->after_save(), Oexception);
842 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
843 break;
844 default: ShouldNotReachHere();
845 }
846
847 __ verify_not_null_oop(Oexception);
848
849 #ifdef ASSERT
850 // check that fields in JavaThread for exception oop and issuing pc are
851 // empty before writing to them
852 Label oop_empty;
853 Register scratch = I7; // We can use I7 here because it's overwritten later anyway.
854 __ ld_ptr(Address(G2_thread, JavaThread::exception_oop_offset()), scratch);
855 __ br_null(scratch, false, Assembler::pt, oop_empty);
856 __ delayed()->nop();
857 __ stop("exception oop already set");
858 __ bind(oop_empty);
859
860 Label pc_empty;
861 __ ld_ptr(Address(G2_thread, JavaThread::exception_pc_offset()), scratch);
862 __ br_null(scratch, false, Assembler::pt, pc_empty);
863 __ delayed()->nop();
864 __ stop("exception pc already set");
865 __ bind(pc_empty);
866 #endif
867
868 // save the exception and issuing pc in the thread
869 __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
870 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
871
872 // use the throwing pc as the return address to lookup (has bci & oop map)
873 __ mov(Oissuing_pc, I7);
874 __ sub(I7, frame::pc_return_offset, I7);
875 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
876 oop_maps->add_gc_map(call_offset, oop_map);
877
878 // Note: if nmethod has been deoptimized then regardless of
879 // whether it had a handler or not we will deoptimize
880 // by entering the deopt blob with a pending exception.
881
882 // Restore the registers that were saved at the beginning, remove
883 // the frame and jump to the exception handler.
884 switch (id) {
885 case forward_exception_id:
886 case handle_exception_id:
887 restore_live_registers(sasm);
888 __ jmp(O0, 0);
889 __ delayed()->restore();
890 break;
891 case handle_exception_from_callee_id:
892 // Restore SP from L7 if the exception PC is a method handle call site.
893 __ mov(O0, G5); // Save the target address.
894 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
895 __ tst(L0); // Condition codes are preserved over the restore.
896 __ restore();
897
898 __ jmp(G5, 0); // jump to the exception handler
899 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
900 break;
901 default: ShouldNotReachHere();
902 }
903
904 return oop_maps;
905 }
906
907
908 #undef __
909
910 const char *Runtime1::pd_name_for_address(address entry) {
911 return "<unknown function>";
912 }