509 class NativeTstRegMem: public NativeInstruction {
510 public:
511 enum Intel_specific_constants {
512 instruction_rex_prefix_mask = 0xF0,
513 instruction_rex_prefix = Assembler::REX,
514 instruction_code_memXregl = 0x85,
515 modrm_mask = 0x38, // select reg from the ModRM byte
516 modrm_reg = 0x00 // rax
517 };
518 };
519
520 inline bool NativeInstruction::is_illegal() { return (short)int_at(0) == (short)NativeIllegalInstruction::instruction_code; }
521 inline bool NativeInstruction::is_call() { return ubyte_at(0) == NativeCall::instruction_code; }
522 inline bool NativeInstruction::is_return() { return ubyte_at(0) == NativeReturn::instruction_code ||
523 ubyte_at(0) == NativeReturnX::instruction_code; }
524 inline bool NativeInstruction::is_jump() { return ubyte_at(0) == NativeJump::instruction_code ||
525 ubyte_at(0) == 0xEB; /* short jump */ }
526 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ ||
527 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ }
528 inline bool NativeInstruction::is_safepoint_poll() {
529 #ifdef AMD64
530 if (Assembler::is_polling_page_far()) {
531 // two cases, depending on the choice of the base register in the address.
532 if (((ubyte_at(0) & NativeTstRegMem::instruction_rex_prefix_mask) == NativeTstRegMem::instruction_rex_prefix &&
533 ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl &&
534 (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) ||
535 ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
536 (ubyte_at(1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) {
537 return true;
538 } else {
539 return false;
540 }
541 } else {
542 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
543 ubyte_at(1) == 0x05) { // 00 rax 101
544 address fault = addr_at(6) + int_at(2);
545 return os::is_poll_address(fault);
546 } else {
547 return false;
548 }
549 }
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509 class NativeTstRegMem: public NativeInstruction {
510 public:
511 enum Intel_specific_constants {
512 instruction_rex_prefix_mask = 0xF0,
513 instruction_rex_prefix = Assembler::REX,
514 instruction_code_memXregl = 0x85,
515 modrm_mask = 0x38, // select reg from the ModRM byte
516 modrm_reg = 0x00 // rax
517 };
518 };
519
520 inline bool NativeInstruction::is_illegal() { return (short)int_at(0) == (short)NativeIllegalInstruction::instruction_code; }
521 inline bool NativeInstruction::is_call() { return ubyte_at(0) == NativeCall::instruction_code; }
522 inline bool NativeInstruction::is_return() { return ubyte_at(0) == NativeReturn::instruction_code ||
523 ubyte_at(0) == NativeReturnX::instruction_code; }
524 inline bool NativeInstruction::is_jump() { return ubyte_at(0) == NativeJump::instruction_code ||
525 ubyte_at(0) == 0xEB; /* short jump */ }
526 inline bool NativeInstruction::is_cond_jump() { return (int_at(0) & 0xF0FF) == 0x800F /* long jump */ ||
527 (ubyte_at(0) & 0xF0) == 0x70; /* short jump */ }
528 inline bool NativeInstruction::is_safepoint_poll() {
529 // TODO: Fix up parsing of safepoint poll code. Skipping now as it doesn't seem to be used for much other than asserts.
530 #ifdef AMD64
531 if (ThreadLocalSafepoints) {
532 return true;
533 }
534 if (Assembler::is_polling_page_far()) {
535 // two cases, depending on the choice of the base register in the address.
536 if (((ubyte_at(0) & NativeTstRegMem::instruction_rex_prefix_mask) == NativeTstRegMem::instruction_rex_prefix &&
537 ubyte_at(1) == NativeTstRegMem::instruction_code_memXregl &&
538 (ubyte_at(2) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) ||
539 ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
540 (ubyte_at(1) & NativeTstRegMem::modrm_mask) == NativeTstRegMem::modrm_reg) {
541 return true;
542 } else {
543 return false;
544 }
545 } else {
546 if (ubyte_at(0) == NativeTstRegMem::instruction_code_memXregl &&
547 ubyte_at(1) == 0x05) { // 00 rax 101
548 address fault = addr_at(6) + int_at(2);
549 return os::is_poll_address(fault);
550 } else {
551 return false;
552 }
553 }
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