1 /*
2 * Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Defs.hpp"
27 #include "c1/c1_MacroAssembler.hpp"
28 #include "c1/c1_Runtime1.hpp"
29 #include "interpreter/interpreter.hpp"
30 #include "nativeInst_sparc.hpp"
31 #include "oops/compiledICHolder.hpp"
32 #include "oops/oop.inline.hpp"
33 #include "prims/jvmtiExport.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/signature.hpp"
36 #include "runtime/vframeArray.hpp"
37 #include "utilities/macros.hpp"
38 #include "vmreg_sparc.inline.hpp"
39
40 // Implementation of StubAssembler
41
42 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry_point, int number_of_arguments) {
43 // for sparc changing the number of arguments doesn't change
44 // anything about the frame size so we'll always lie and claim that
45 // we are only passing 1 argument.
46 set_num_rt_args(1);
47
48 assert_not_delayed();
49 // bang stack before going to runtime
50 set(-os::vm_page_size() + STACK_BIAS, G3_scratch);
51 st(G0, SP, G3_scratch);
52
53 // debugging support
54 assert(number_of_arguments >= 0 , "cannot have negative number of arguments");
55
56 set_last_Java_frame(SP, noreg);
57 if (VerifyThread) mov(G2_thread, O0); // about to be smashed; pass early
58 save_thread(L7_thread_cache);
59 // do the call
60 call(entry_point, relocInfo::runtime_call_type);
61 if (!VerifyThread) {
62 delayed()->mov(G2_thread, O0); // pass thread as first argument
63 } else {
64 delayed()->nop(); // (thread already passed)
65 }
66 int call_offset = offset(); // offset of return address
67 restore_thread(L7_thread_cache);
68 reset_last_Java_frame();
69
70 // check for pending exceptions
71 { Label L;
72 Address exception_addr(G2_thread, Thread::pending_exception_offset());
73 ld_ptr(exception_addr, Gtemp);
74 br_null_short(Gtemp, pt, L);
75 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
76 st_ptr(G0, vm_result_addr);
77 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
78 st_ptr(G0, vm_result_addr_2);
79
80 if (frame_size() == no_frame_size) {
81 // we use O7 linkage so that forward_exception_entry has the issuing PC
82 call(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
83 delayed()->restore();
84 } else if (_stub_id == Runtime1::forward_exception_id) {
85 should_not_reach_here();
86 } else {
87 AddressLiteral exc(Runtime1::entry_for(Runtime1::forward_exception_id));
88 jump_to(exc, G4);
89 delayed()->nop();
90 }
91 bind(L);
92 }
93
94 // get oop result if there is one and reset the value in the thread
95 if (oop_result1->is_valid()) { // get oop result if there is one and reset it in the thread
96 get_vm_result (oop_result1);
97 } else {
98 // be a little paranoid and clear the result
99 Address vm_result_addr(G2_thread, JavaThread::vm_result_offset());
100 st_ptr(G0, vm_result_addr);
101 }
102
103 // get second result if there is one and reset the value in the thread
104 if (metadata_result->is_valid()) {
105 get_vm_result_2 (metadata_result);
106 } else {
107 // be a little paranoid and clear the result
108 Address vm_result_addr_2(G2_thread, JavaThread::vm_result_2_offset());
109 st_ptr(G0, vm_result_addr_2);
110 }
111
112 return call_offset;
113 }
114
115
116 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1) {
117 // O0 is reserved for the thread
118 mov(arg1, O1);
119 return call_RT(oop_result1, metadata_result, entry, 1);
120 }
121
122
123 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2) {
124 // O0 is reserved for the thread
125 mov(arg1, O1);
126 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
127 return call_RT(oop_result1, metadata_result, entry, 2);
128 }
129
130
131 int StubAssembler::call_RT(Register oop_result1, Register metadata_result, address entry, Register arg1, Register arg2, Register arg3) {
132 // O0 is reserved for the thread
133 mov(arg1, O1);
134 mov(arg2, O2); assert(arg2 != O1, "smashed argument");
135 mov(arg3, O3); assert(arg3 != O1 && arg3 != O2, "smashed argument");
136 return call_RT(oop_result1, metadata_result, entry, 3);
137 }
138
139 void StubAssembler::prologue(const char* name, bool must_gc_arguments) {
140 set_info(name, must_gc_arguments);
141 }
142
143 void StubAssembler::epilogue() {
144 delayed()->restore();
145 }
146
147 // Implementation of Runtime1
148
149
150 static int cpu_reg_save_offsets[FrameMap::nof_cpu_regs];
151 static int fpu_reg_save_offsets[FrameMap::nof_fpu_regs];
152 static int reg_save_size_in_words;
153 static int frame_size_in_bytes = -1;
154
155 static OopMap* generate_oop_map(StubAssembler* sasm, bool save_fpu_registers) {
156 assert(frame_size_in_bytes == sasm->total_frame_size_in_bytes(reg_save_size_in_words),
157 "mismatch in calculation");
158 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
159 int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
160 OopMap* oop_map = new OopMap(frame_size_in_slots, 0);
161
162 int i;
163 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
164 Register r = as_Register(i);
165 if (r == G1 || r == G3 || r == G4 || r == G5) {
166 int sp_offset = cpu_reg_save_offsets[i];
167 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
168 r->as_VMReg());
169 }
170 }
171
172 if (save_fpu_registers) {
173 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
174 FloatRegister r = as_FloatRegister(i);
175 int sp_offset = fpu_reg_save_offsets[i];
176 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset),
177 r->as_VMReg());
178 }
179 }
180 return oop_map;
181 }
182
183 #define __ this->
184
185 void C1_MacroAssembler::save_live_registers_no_oop_map(bool save_fpu_registers) {
186 assert(frame_size_in_bytes == __ total_frame_size_in_bytes(reg_save_size_in_words),
187 "mismatch in calculation");
188 __ save_frame_c1(frame_size_in_bytes);
189
190 // Record volatile registers as callee-save values in an OopMap so their save locations will be
191 // propagated to the caller frame's RegisterMap during StackFrameStream construction (needed for
192 // deoptimization; see compiledVFrame::create_stack_value). The caller's I, L and O registers
193 // are saved in register windows - I's and L's in the caller's frame and O's in the stub frame
194 // (as the stub's I's) when the runtime routine called by the stub creates its frame.
195 // OopMap frame sizes are in c2 stack slot sizes (sizeof(jint))
196
197 int i;
198 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
199 Register r = as_Register(i);
200 if (r == G1 || r == G3 || r == G4 || r == G5) {
201 int sp_offset = cpu_reg_save_offsets[i];
202 __ st_ptr(r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
203 }
204 }
205
206 if (save_fpu_registers) {
207 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
208 FloatRegister r = as_FloatRegister(i);
209 int sp_offset = fpu_reg_save_offsets[i];
210 __ stf(FloatRegisterImpl::S, r, SP, (sp_offset * BytesPerWord) + STACK_BIAS);
211 }
212 }
213 }
214
215 void C1_MacroAssembler::restore_live_registers(bool restore_fpu_registers) {
216 for (int i = 0; i < FrameMap::nof_cpu_regs; i++) {
217 Register r = as_Register(i);
218 if (r == G1 || r == G3 || r == G4 || r == G5) {
219 __ ld_ptr(SP, (cpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
220 }
221 }
222
223 if (restore_fpu_registers) {
224 for (int i = 0; i < FrameMap::nof_fpu_regs; i++) {
225 FloatRegister r = as_FloatRegister(i);
226 __ ldf(FloatRegisterImpl::S, SP, (fpu_reg_save_offsets[i] * BytesPerWord) + STACK_BIAS, r);
227 }
228 }
229 }
230
231 #undef __
232 #define __ sasm->
233
234 static OopMap* save_live_registers(StubAssembler* sasm, bool save_fpu_registers = true) {
235 sasm->save_live_registers_no_oop_map(save_fpu_registers);
236 return generate_oop_map(sasm, save_fpu_registers);
237 }
238
239 static void restore_live_registers(StubAssembler* sasm, bool restore_fpu_registers = true) {
240 sasm->restore_live_registers(restore_fpu_registers);
241 }
242
243
244 void Runtime1::initialize_pd() {
245 // compute word offsets from SP at which live (non-windowed) registers are captured by stub routines
246 //
247 // A stub routine will have a frame that is at least large enough to hold
248 // a register window save area (obviously) and the volatile g registers
249 // and floating registers. A user of save_live_registers can have a frame
250 // that has more scratch area in it (although typically they will use L-regs).
251 // in that case the frame will look like this (stack growing down)
252 //
253 // FP -> | |
254 // | scratch mem |
255 // | " " |
256 // --------------
257 // | float regs |
258 // | " " |
259 // ---------------
260 // | G regs |
261 // | " " |
262 // ---------------
263 // | abi reg. |
264 // | window save |
265 // | area |
266 // SP -> ---------------
267 //
268 int i;
269 int sp_offset = round_to(frame::register_save_words, 2); // start doubleword aligned
270
271 // only G int registers are saved explicitly; others are found in register windows
272 for (i = 0; i < FrameMap::nof_cpu_regs; i++) {
273 Register r = as_Register(i);
274 if (r == G1 || r == G3 || r == G4 || r == G5) {
275 cpu_reg_save_offsets[i] = sp_offset;
276 sp_offset++;
277 }
278 }
279
280 // all float registers are saved explicitly
281 assert(FrameMap::nof_fpu_regs == 32, "double registers not handled here");
282 for (i = 0; i < FrameMap::nof_fpu_regs; i++) {
283 fpu_reg_save_offsets[i] = sp_offset;
284 sp_offset++;
285 }
286 reg_save_size_in_words = sp_offset - frame::memory_parameter_word_sp_offset;
287 // this should match assembler::total_frame_size_in_bytes, which
288 // isn't callable from this context. It's checked by an assert when
289 // it's used though.
290 frame_size_in_bytes = align_size_up(sp_offset * wordSize, 8);
291 }
292
293
294 OopMapSet* Runtime1::generate_exception_throw(StubAssembler* sasm, address target, bool has_argument) {
295 // make a frame and preserve the caller's caller-save registers
296 OopMap* oop_map = save_live_registers(sasm);
297 int call_offset;
298 if (!has_argument) {
299 call_offset = __ call_RT(noreg, noreg, target);
300 } else {
301 call_offset = __ call_RT(noreg, noreg, target, G4);
302 }
303 OopMapSet* oop_maps = new OopMapSet();
304 oop_maps->add_gc_map(call_offset, oop_map);
305
306 __ should_not_reach_here();
307 return oop_maps;
308 }
309
310
311 OopMapSet* Runtime1::generate_stub_call(StubAssembler* sasm, Register result, address target,
312 Register arg1, Register arg2, Register arg3) {
313 // make a frame and preserve the caller's caller-save registers
314 OopMap* oop_map = save_live_registers(sasm);
315
316 int call_offset;
317 if (arg1 == noreg) {
318 call_offset = __ call_RT(result, noreg, target);
319 } else if (arg2 == noreg) {
320 call_offset = __ call_RT(result, noreg, target, arg1);
321 } else if (arg3 == noreg) {
322 call_offset = __ call_RT(result, noreg, target, arg1, arg2);
323 } else {
324 call_offset = __ call_RT(result, noreg, target, arg1, arg2, arg3);
325 }
326 OopMapSet* oop_maps = NULL;
327
328 oop_maps = new OopMapSet();
329 oop_maps->add_gc_map(call_offset, oop_map);
330 restore_live_registers(sasm);
331
332 __ ret();
333 __ delayed()->restore();
334
335 return oop_maps;
336 }
337
338
339 OopMapSet* Runtime1::generate_patching(StubAssembler* sasm, address target) {
340 // make a frame and preserve the caller's caller-save registers
341 OopMap* oop_map = save_live_registers(sasm);
342
343 // call the runtime patching routine, returns non-zero if nmethod got deopted.
344 int call_offset = __ call_RT(noreg, noreg, target);
345 OopMapSet* oop_maps = new OopMapSet();
346 oop_maps->add_gc_map(call_offset, oop_map);
347
348 // re-execute the patched instruction or, if the nmethod was deoptmized, return to the
349 // deoptimization handler entry that will cause re-execution of the current bytecode
350 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
351 assert(deopt_blob != NULL, "deoptimization blob must have been created");
352
353 Label no_deopt;
354 __ br_null_short(O0, Assembler::pt, no_deopt);
355
356 // return to the deoptimization handler entry for unpacking and rexecute
357 // if we simply returned the we'd deopt as if any call we patched had just
358 // returned.
359
360 restore_live_registers(sasm);
361
362 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
363 __ jump_to(dest, O0);
364 __ delayed()->restore();
365
366 __ bind(no_deopt);
367 restore_live_registers(sasm);
368 __ ret();
369 __ delayed()->restore();
370
371 return oop_maps;
372 }
373
374 OopMapSet* Runtime1::generate_code_for(StubID id, StubAssembler* sasm) {
375
376 OopMapSet* oop_maps = NULL;
377 // for better readability
378 const bool must_gc_arguments = true;
379 const bool dont_gc_arguments = false;
380
381 // stub code & info for the different stubs
382 switch (id) {
383 case forward_exception_id:
384 {
385 oop_maps = generate_handle_exception(id, sasm);
386 }
387 break;
388
389 case new_instance_id:
390 case fast_new_instance_id:
391 case fast_new_instance_init_check_id:
392 {
393 Register G5_klass = G5; // Incoming
394 Register O0_obj = O0; // Outgoing
395
396 if (id == new_instance_id) {
397 __ set_info("new_instance", dont_gc_arguments);
398 } else if (id == fast_new_instance_id) {
399 __ set_info("fast new_instance", dont_gc_arguments);
400 } else {
401 assert(id == fast_new_instance_init_check_id, "bad StubID");
402 __ set_info("fast new_instance init check", dont_gc_arguments);
403 }
404
405 if ((id == fast_new_instance_id || id == fast_new_instance_init_check_id) &&
406 UseTLAB && FastTLABRefill) {
407 Label slow_path;
408 Register G1_obj_size = G1;
409 Register G3_t1 = G3;
410 Register G4_t2 = G4;
411 assert_different_registers(G5_klass, G1_obj_size, G3_t1, G4_t2);
412
413 // Push a frame since we may do dtrace notification for the
414 // allocation which requires calling out and we don't want
415 // to stomp the real return address.
416 __ save_frame(0);
417
418 if (id == fast_new_instance_init_check_id) {
419 // make sure the klass is initialized
420 __ ldub(G5_klass, in_bytes(InstanceKlass::init_state_offset()), G3_t1);
421 __ cmp(G3_t1, InstanceKlass::fully_initialized);
422 __ br(Assembler::notEqual, false, Assembler::pn, slow_path);
423 __ delayed()->nop();
424 }
425 #ifdef ASSERT
426 // assert object can be fast path allocated
427 {
428 Label ok, not_ok;
429 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
430 // make sure it's an instance (LH > 0)
431 __ cmp_and_br_short(G1_obj_size, 0, Assembler::lessEqual, Assembler::pn, not_ok);
432 __ btst(Klass::_lh_instance_slow_path_bit, G1_obj_size);
433 __ br(Assembler::zero, false, Assembler::pn, ok);
434 __ delayed()->nop();
435 __ bind(not_ok);
436 __ stop("assert(can be fast path allocated)");
437 __ should_not_reach_here();
438 __ bind(ok);
439 }
440 #endif // ASSERT
441 // if we got here then the TLAB allocation failed, so try
442 // refilling the TLAB or allocating directly from eden.
443 Label retry_tlab, try_eden;
444 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G5_klass
445
446 __ bind(retry_tlab);
447
448 // get the instance size
449 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
450
451 __ tlab_allocate(O0_obj, G1_obj_size, 0, G3_t1, slow_path);
452
453 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2, /* is_tlab_allocated */ true);
454 __ verify_oop(O0_obj);
455 __ mov(O0, I0);
456 __ ret();
457 __ delayed()->restore();
458
459 __ bind(try_eden);
460 // get the instance size
461 __ ld(G5_klass, in_bytes(Klass::layout_helper_offset()), G1_obj_size);
462 __ eden_allocate(O0_obj, G1_obj_size, 0, G3_t1, G4_t2, slow_path);
463 __ incr_allocated_bytes(G1_obj_size, G3_t1, G4_t2);
464
465 __ initialize_object(O0_obj, G5_klass, G1_obj_size, 0, G3_t1, G4_t2, /* is_tlab_allocated */ false);
466 __ verify_oop(O0_obj);
467 __ mov(O0, I0);
468 __ ret();
469 __ delayed()->restore();
470
471 __ bind(slow_path);
472
473 // pop this frame so generate_stub_call can push it's own
474 __ restore();
475 }
476
477 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_instance), G5_klass);
478 // I0->O0: new instance
479 }
480
481 break;
482
483 case counter_overflow_id:
484 // G4 contains bci, G5 contains method
485 oop_maps = generate_stub_call(sasm, noreg, CAST_FROM_FN_PTR(address, counter_overflow), G4, G5);
486 break;
487
488 case new_type_array_id:
489 case new_object_array_id:
490 {
491 Register G5_klass = G5; // Incoming
492 Register G4_length = G4; // Incoming
493 Register O0_obj = O0; // Outgoing
494
495 Address klass_lh(G5_klass, Klass::layout_helper_offset());
496 assert(Klass::_lh_header_size_shift % BitsPerByte == 0, "bytewise");
497 assert(Klass::_lh_header_size_mask == 0xFF, "bytewise");
498 // Use this offset to pick out an individual byte of the layout_helper:
499 const int klass_lh_header_size_offset = ((BytesPerInt - 1) // 3 - 2 selects byte {0,1,0,0}
500 - Klass::_lh_header_size_shift / BitsPerByte);
501
502 if (id == new_type_array_id) {
503 __ set_info("new_type_array", dont_gc_arguments);
504 } else {
505 __ set_info("new_object_array", dont_gc_arguments);
506 }
507
508 #ifdef ASSERT
509 // assert object type is really an array of the proper kind
510 {
511 Label ok;
512 Register G3_t1 = G3;
513 __ ld(klass_lh, G3_t1);
514 __ sra(G3_t1, Klass::_lh_array_tag_shift, G3_t1);
515 int tag = ((id == new_type_array_id)
516 ? Klass::_lh_array_tag_type_value
517 : Klass::_lh_array_tag_obj_value);
518 __ cmp_and_brx_short(G3_t1, tag, Assembler::equal, Assembler::pt, ok);
519 __ stop("assert(is an array klass)");
520 __ should_not_reach_here();
521 __ bind(ok);
522 }
523 #endif // ASSERT
524
525 if (UseTLAB && FastTLABRefill) {
526 Label slow_path;
527 Register G1_arr_size = G1;
528 Register G3_t1 = G3;
529 Register O1_t2 = O1;
530 assert_different_registers(G5_klass, G4_length, G1_arr_size, G3_t1, O1_t2);
531
532 // check that array length is small enough for fast path
533 __ set(C1_MacroAssembler::max_array_allocation_length, G3_t1);
534 __ cmp(G4_length, G3_t1);
535 __ br(Assembler::greaterUnsigned, false, Assembler::pn, slow_path);
536 __ delayed()->nop();
537
538 // if we got here then the TLAB allocation failed, so try
539 // refilling the TLAB or allocating directly from eden.
540 Label retry_tlab, try_eden;
541 __ tlab_refill(retry_tlab, try_eden, slow_path); // preserves G4_length and G5_klass
542
543 __ bind(retry_tlab);
544
545 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
546 __ ld(klass_lh, G3_t1);
547 __ sll(G4_length, G3_t1, G1_arr_size);
548 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
549 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
550 __ add(G1_arr_size, G3_t1, G1_arr_size);
551 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size); // align up
552 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
553
554 __ tlab_allocate(O0_obj, G1_arr_size, 0, G3_t1, slow_path); // preserves G1_arr_size
555
556 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
557 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
558 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
559 __ add(O0_obj, G3_t1, G3_t1); // body start
560 if (!ZeroTLAB) {
561 __ initialize_body(G3_t1, O1_t2);
562 }
563 __ verify_oop(O0_obj);
564 __ retl();
565 __ delayed()->nop();
566
567 __ bind(try_eden);
568 // get the allocation size: (length << (layout_helper & 0x1F)) + header_size
569 __ ld(klass_lh, G3_t1);
570 __ sll(G4_length, G3_t1, G1_arr_size);
571 __ srl(G3_t1, Klass::_lh_header_size_shift, G3_t1);
572 __ and3(G3_t1, Klass::_lh_header_size_mask, G3_t1);
573 __ add(G1_arr_size, G3_t1, G1_arr_size);
574 __ add(G1_arr_size, MinObjAlignmentInBytesMask, G1_arr_size);
575 __ and3(G1_arr_size, ~MinObjAlignmentInBytesMask, G1_arr_size);
576
577 __ eden_allocate(O0_obj, G1_arr_size, 0, G3_t1, O1_t2, slow_path); // preserves G1_arr_size
578 __ incr_allocated_bytes(G1_arr_size, G3_t1, O1_t2);
579
580 __ initialize_header(O0_obj, G5_klass, G4_length, G3_t1, O1_t2);
581 __ ldub(klass_lh, G3_t1, klass_lh_header_size_offset);
582 __ sub(G1_arr_size, G3_t1, O1_t2); // body length
583 __ add(O0_obj, G3_t1, G3_t1); // body start
584 __ initialize_body(G3_t1, O1_t2);
585 __ verify_oop(O0_obj);
586 __ retl();
587 __ delayed()->nop();
588
589 __ bind(slow_path);
590 }
591
592 if (id == new_type_array_id) {
593 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_type_array), G5_klass, G4_length);
594 } else {
595 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_object_array), G5_klass, G4_length);
596 }
597 // I0 -> O0: new array
598 }
599 break;
600
601 case new_multi_array_id:
602 { // O0: klass
603 // O1: rank
604 // O2: address of 1st dimension
605 __ set_info("new_multi_array", dont_gc_arguments);
606 oop_maps = generate_stub_call(sasm, I0, CAST_FROM_FN_PTR(address, new_multi_array), I0, I1, I2);
607 // I0 -> O0: new multi array
608 }
609 break;
610
611 case register_finalizer_id:
612 {
613 __ set_info("register_finalizer", dont_gc_arguments);
614
615 // load the klass and check the has finalizer flag
616 Label register_finalizer;
617 Register t = O1;
618 __ load_klass(O0, t);
619 __ ld(t, in_bytes(Klass::access_flags_offset()), t);
620 __ set(JVM_ACC_HAS_FINALIZER, G3);
621 __ andcc(G3, t, G0);
622 __ br(Assembler::notZero, false, Assembler::pt, register_finalizer);
623 __ delayed()->nop();
624
625 // do a leaf return
626 __ retl();
627 __ delayed()->nop();
628
629 __ bind(register_finalizer);
630 OopMap* oop_map = save_live_registers(sasm);
631 int call_offset = __ call_RT(noreg, noreg,
632 CAST_FROM_FN_PTR(address, SharedRuntime::register_finalizer), I0);
633 oop_maps = new OopMapSet();
634 oop_maps->add_gc_map(call_offset, oop_map);
635
636 // Now restore all the live registers
637 restore_live_registers(sasm);
638
639 __ ret();
640 __ delayed()->restore();
641 }
642 break;
643
644 case throw_range_check_failed_id:
645 { __ set_info("range_check_failed", dont_gc_arguments); // arguments will be discarded
646 // G4: index
647 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_range_check_exception), true);
648 }
649 break;
650
651 case throw_index_exception_id:
652 { __ set_info("index_range_check_failed", dont_gc_arguments); // arguments will be discarded
653 // G4: index
654 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_index_exception), true);
655 }
656 break;
657
658 case throw_div0_exception_id:
659 { __ set_info("throw_div0_exception", dont_gc_arguments);
660 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_div0_exception), false);
661 }
662 break;
663
664 case throw_null_pointer_exception_id:
665 { __ set_info("throw_null_pointer_exception", dont_gc_arguments);
666 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_null_pointer_exception), false);
667 }
668 break;
669
670 case handle_exception_id:
671 { __ set_info("handle_exception", dont_gc_arguments);
672 oop_maps = generate_handle_exception(id, sasm);
673 }
674 break;
675
676 case handle_exception_from_callee_id:
677 { __ set_info("handle_exception_from_callee", dont_gc_arguments);
678 oop_maps = generate_handle_exception(id, sasm);
679 }
680 break;
681
682 case unwind_exception_id:
683 {
684 // O0: exception
685 // I7: address of call to this method
686
687 __ set_info("unwind_exception", dont_gc_arguments);
688 __ mov(Oexception, Oexception->after_save());
689 __ add(I7, frame::pc_return_offset, Oissuing_pc->after_save());
690
691 __ call_VM_leaf(L7_thread_cache, CAST_FROM_FN_PTR(address, SharedRuntime::exception_handler_for_return_address),
692 G2_thread, Oissuing_pc->after_save());
693 __ verify_not_null_oop(Oexception->after_save());
694
695 // Restore SP from L7 if the exception PC is a method handle call site.
696 __ mov(O0, G5); // Save the target address.
697 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
698 __ tst(L0); // Condition codes are preserved over the restore.
699 __ restore();
700
701 __ jmp(G5, 0);
702 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
703 }
704 break;
705
706 case throw_array_store_exception_id:
707 {
708 __ set_info("throw_array_store_exception", dont_gc_arguments);
709 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_array_store_exception), true);
710 }
711 break;
712
713 case throw_class_cast_exception_id:
714 {
715 // G4: object
716 __ set_info("throw_class_cast_exception", dont_gc_arguments);
717 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_class_cast_exception), true);
718 }
719 break;
720
721 case throw_incompatible_class_change_error_id:
722 {
723 __ set_info("throw_incompatible_class_cast_exception", dont_gc_arguments);
724 oop_maps = generate_exception_throw(sasm, CAST_FROM_FN_PTR(address, throw_incompatible_class_change_error), false);
725 }
726 break;
727
728 case slow_subtype_check_id:
729 { // Support for uint StubRoutine::partial_subtype_check( Klass sub, Klass super );
730 // Arguments :
731 //
732 // ret : G3
733 // sub : G3, argument, destroyed
734 // super: G1, argument, not changed
735 // raddr: O7, blown by call
736 Label miss;
737
738 __ save_frame(0); // Blow no registers!
739
740 __ check_klass_subtype_slow_path(G3, G1, L0, L1, L2, L4, NULL, &miss);
741
742 __ mov(1, G3);
743 __ ret(); // Result in G5 is 'true'
744 __ delayed()->restore(); // free copy or add can go here
745
746 __ bind(miss);
747 __ mov(0, G3);
748 __ ret(); // Result in G5 is 'false'
749 __ delayed()->restore(); // free copy or add can go here
750 }
751
752 case monitorenter_nofpu_id:
753 case monitorenter_id:
754 { // G4: object
755 // G5: lock address
756 __ set_info("monitorenter", dont_gc_arguments);
757
758 int save_fpu_registers = (id == monitorenter_id);
759 // make a frame and preserve the caller's caller-save registers
760 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
761
762 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorenter), G4, G5);
763
764 oop_maps = new OopMapSet();
765 oop_maps->add_gc_map(call_offset, oop_map);
766 restore_live_registers(sasm, save_fpu_registers);
767
768 __ ret();
769 __ delayed()->restore();
770 }
771 break;
772
773 case monitorexit_nofpu_id:
774 case monitorexit_id:
775 { // G4: lock address
776 // note: really a leaf routine but must setup last java sp
777 // => use call_RT for now (speed can be improved by
778 // doing last java sp setup manually)
779 __ set_info("monitorexit", dont_gc_arguments);
780
781 int save_fpu_registers = (id == monitorexit_id);
782 // make a frame and preserve the caller's caller-save registers
783 OopMap* oop_map = save_live_registers(sasm, save_fpu_registers);
784
785 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, monitorexit), G4);
786
787 oop_maps = new OopMapSet();
788 oop_maps->add_gc_map(call_offset, oop_map);
789 restore_live_registers(sasm, save_fpu_registers);
790
791 __ ret();
792 __ delayed()->restore();
793 }
794 break;
795
796 case deoptimize_id:
797 {
798 __ set_info("deoptimize", dont_gc_arguments);
799 OopMap* oop_map = save_live_registers(sasm);
800 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, deoptimize), G4);
801 oop_maps = new OopMapSet();
802 oop_maps->add_gc_map(call_offset, oop_map);
803 restore_live_registers(sasm);
804 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
805 assert(deopt_blob != NULL, "deoptimization blob must have been created");
806 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
807 __ jump_to(dest, O0);
808 __ delayed()->restore();
809 }
810 break;
811
812 case access_field_patching_id:
813 { __ set_info("access_field_patching", dont_gc_arguments);
814 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, access_field_patching));
815 }
816 break;
817
818 case load_klass_patching_id:
819 { __ set_info("load_klass_patching", dont_gc_arguments);
820 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_klass_patching));
821 }
822 break;
823
824 case load_mirror_patching_id:
825 { __ set_info("load_mirror_patching", dont_gc_arguments);
826 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_mirror_patching));
827 }
828 break;
829
830 case load_appendix_patching_id:
831 { __ set_info("load_appendix_patching", dont_gc_arguments);
832 oop_maps = generate_patching(sasm, CAST_FROM_FN_PTR(address, move_appendix_patching));
833 }
834 break;
835
836 case dtrace_object_alloc_id:
837 { // O0: object
838 __ set_info("dtrace_object_alloc", dont_gc_arguments);
839 // we can't gc here so skip the oopmap but make sure that all
840 // the live registers get saved.
841 save_live_registers(sasm);
842
843 __ save_thread(L7_thread_cache);
844 __ call(CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_object_alloc),
845 relocInfo::runtime_call_type);
846 __ delayed()->mov(I0, O0);
847 __ restore_thread(L7_thread_cache);
848
849 restore_live_registers(sasm);
850 __ ret();
851 __ delayed()->restore();
852 }
853 break;
854
855 case predicate_failed_trap_id:
856 {
857 __ set_info("predicate_failed_trap", dont_gc_arguments);
858 OopMap* oop_map = save_live_registers(sasm);
859
860 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, predicate_failed_trap));
861
862 oop_maps = new OopMapSet();
863 oop_maps->add_gc_map(call_offset, oop_map);
864
865 DeoptimizationBlob* deopt_blob = SharedRuntime::deopt_blob();
866 assert(deopt_blob != NULL, "deoptimization blob must have been created");
867 restore_live_registers(sasm);
868
869 AddressLiteral dest(deopt_blob->unpack_with_reexecution());
870 __ jump_to(dest, O0);
871 __ delayed()->restore();
872 }
873 break;
874
875 default:
876 { __ set_info("unimplemented entry", dont_gc_arguments);
877 __ save_frame(0);
878 __ set((int)id, O1);
879 __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, unimplemented_entry), O1);
880 __ should_not_reach_here();
881 }
882 break;
883 }
884 return oop_maps;
885 }
886
887
888 OopMapSet* Runtime1::generate_handle_exception(StubID id, StubAssembler* sasm) {
889 __ block_comment("generate_handle_exception");
890
891 // Save registers, if required.
892 OopMapSet* oop_maps = new OopMapSet();
893 OopMap* oop_map = NULL;
894 switch (id) {
895 case forward_exception_id:
896 // We're handling an exception in the context of a compiled frame.
897 // The registers have been saved in the standard places. Perform
898 // an exception lookup in the caller and dispatch to the handler
899 // if found. Otherwise unwind and dispatch to the callers
900 // exception handler.
901 oop_map = generate_oop_map(sasm, true);
902
903 // transfer the pending exception to the exception_oop
904 __ ld_ptr(G2_thread, in_bytes(JavaThread::pending_exception_offset()), Oexception);
905 __ ld_ptr(Oexception, 0, G0);
906 __ st_ptr(G0, G2_thread, in_bytes(JavaThread::pending_exception_offset()));
907 __ add(I7, frame::pc_return_offset, Oissuing_pc);
908 break;
909 case handle_exception_id:
910 // At this point all registers MAY be live.
911 oop_map = save_live_registers(sasm);
912 __ mov(Oexception->after_save(), Oexception);
913 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
914 break;
915 case handle_exception_from_callee_id:
916 // At this point all registers except exception oop (Oexception)
917 // and exception pc (Oissuing_pc) are dead.
918 oop_map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
919 sasm->set_frame_size(frame_size_in_bytes / BytesPerWord);
920 __ save_frame_c1(frame_size_in_bytes);
921 __ mov(Oexception->after_save(), Oexception);
922 __ mov(Oissuing_pc->after_save(), Oissuing_pc);
923 break;
924 default: ShouldNotReachHere();
925 }
926
927 __ verify_not_null_oop(Oexception);
928
929 #ifdef ASSERT
930 // check that fields in JavaThread for exception oop and issuing pc are
931 // empty before writing to them
932 Label oop_empty;
933 Register scratch = I7; // We can use I7 here because it's overwritten later anyway.
934 __ ld_ptr(Address(G2_thread, JavaThread::exception_oop_offset()), scratch);
935 __ br_null(scratch, false, Assembler::pt, oop_empty);
936 __ delayed()->nop();
937 __ stop("exception oop already set");
938 __ bind(oop_empty);
939
940 Label pc_empty;
941 __ ld_ptr(Address(G2_thread, JavaThread::exception_pc_offset()), scratch);
942 __ br_null(scratch, false, Assembler::pt, pc_empty);
943 __ delayed()->nop();
944 __ stop("exception pc already set");
945 __ bind(pc_empty);
946 #endif
947
948 // save the exception and issuing pc in the thread
949 __ st_ptr(Oexception, G2_thread, in_bytes(JavaThread::exception_oop_offset()));
950 __ st_ptr(Oissuing_pc, G2_thread, in_bytes(JavaThread::exception_pc_offset()));
951
952 // use the throwing pc as the return address to lookup (has bci & oop map)
953 __ mov(Oissuing_pc, I7);
954 __ sub(I7, frame::pc_return_offset, I7);
955 int call_offset = __ call_RT(noreg, noreg, CAST_FROM_FN_PTR(address, exception_handler_for_pc));
956 oop_maps->add_gc_map(call_offset, oop_map);
957
958 // Note: if nmethod has been deoptimized then regardless of
959 // whether it had a handler or not we will deoptimize
960 // by entering the deopt blob with a pending exception.
961
962 // Restore the registers that were saved at the beginning, remove
963 // the frame and jump to the exception handler.
964 switch (id) {
965 case forward_exception_id:
966 case handle_exception_id:
967 restore_live_registers(sasm);
968 __ jmp(O0, 0);
969 __ delayed()->restore();
970 break;
971 case handle_exception_from_callee_id:
972 // Restore SP from L7 if the exception PC is a method handle call site.
973 __ mov(O0, G5); // Save the target address.
974 __ lduw(Address(G2_thread, JavaThread::is_method_handle_return_offset()), L0);
975 __ tst(L0); // Condition codes are preserved over the restore.
976 __ restore();
977
978 __ jmp(G5, 0); // jump to the exception handler
979 __ delayed()->movcc(Assembler::notZero, false, Assembler::icc, L7_mh_SP_save, SP); // Restore SP if required.
980 break;
981 default: ShouldNotReachHere();
982 }
983
984 return oop_maps;
985 }
986
987
988 #undef __
989
990 const char *Runtime1::pd_name_for_address(address entry) {
991 return "<unknown function>";
992 }