< prev index next >

src/cpu/aarch64/vm/templateTable_aarch64.cpp

Print this page
rev 11894 : 8248219: aarch64: missing memory barrier in fast_storefield and fast_accessfield
Reviewed-by: aph
Contributed-by: songyaofei2@huawei.com

*** 2920,2929 **** --- 2920,2932 ---- jvmti_post_fast_field_mod(); // access constant pool cache __ get_cache_and_index_at_bcp(r2, r1, 1); + // Must prevent reordering of the following cp cache loads with bytecode load + __ membar(MacroAssembler::LoadLoad); + // test for volatile with r3 __ ldrw(r3, Address(r2, in_bytes(base + ConstantPoolCacheEntry::flags_offset()))); // replace index with field offset from cache entry
*** 3011,3020 **** --- 3014,3027 ---- __ bind(L1); } // access constant pool cache __ get_cache_and_index_at_bcp(r2, r1, 1); + + // Must prevent reordering of the following cp cache loads with bytecode load + __ membar(MacroAssembler::LoadLoad); + __ ldr(r1, Address(r2, in_bytes(ConstantPoolCache::base_offset() + ConstantPoolCacheEntry::f2_offset()))); __ ldrw(r3, Address(r2, in_bytes(ConstantPoolCache::base_offset() + ConstantPoolCacheEntry::flags_offset())));
< prev index next >