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src/share/vm/c1/c1_LinearScan.hpp
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@@ -40,14 +40,11 @@
class LIRGenerator;
class LinearScan;
class MoveResolver;
class Range;
-define_array(IntervalArray, Interval*)
-define_stack(IntervalList, IntervalArray)
-
-define_array(IntervalsArray, IntervalList*)
+define_array(IntervalsArray, GrowableArray<Interval*>*)
define_stack(IntervalsList, IntervalsArray)
define_array(OopMapArray, OopMap*)
define_stack(OopMapList, OopMapArray)
@@ -143,13 +140,13 @@
bool _has_fpu_registers; // true if this method uses any floating point registers (and so fpu stack allocation is necessary)
int _num_calls; // total number of calls in this method
int _max_spills; // number of stack slots used for intervals allocated to memory
int _unused_spill_slot; // unused spill slot for a single-word value because of alignment of a double-word value
- IntervalList _intervals; // mapping from register number to interval
- IntervalList* _new_intervals_from_allocation; // list with all intervals created during allocation when an existing interval is split
- IntervalArray* _sorted_intervals; // intervals sorted by Interval::from()
+ GrowableArray<Interval*> _intervals; // mapping from register number to interval
+ GrowableArray<Interval*>* _new_intervals_from_allocation; // list with all intervals created during allocation when an existing interval is split
+ GrowableArray<Interval*>* _sorted_intervals; // intervals sorted by Interval::from()
bool _needs_full_resort; // set to true if an Interval::from() is changed and _sorted_intervals must be resorted
LIR_OpArray _lir_ops; // mapping from LIR_Op id to LIR_Op node
BlockBeginArray _block_of_op; // mapping from LIR_Op id to the BlockBegin containing this instruction
BitMap _has_info; // bit set for each LIR_Op id that has a CodeEmitInfo
@@ -198,11 +195,11 @@
// access to interval list
int interval_count() const { return _intervals.length(); }
Interval* interval_at(int reg_num) const { return _intervals.at(reg_num); }
- IntervalList* new_intervals_from_allocation() const { return _new_intervals_from_allocation; }
+ GrowableArray<Interval*>* new_intervals_from_allocation() const { return _new_intervals_from_allocation; }
// access to LIR_Ops and Blocks indexed by op_id
int max_lir_op_id() const { assert(_lir_ops.length() > 0, "no operations"); return (_lir_ops.length() - 1) << 1; }
LIR_Op* lir_op_with_id(int op_id) const { assert(op_id >= 0 && op_id <= max_lir_op_id() && op_id % 2 == 0, "op_id out of range or not even"); return _lir_ops.at(op_id >> 1); }
BlockBegin* block_of_op_with_id(int op_id) const { assert(_block_of_op.length() > 0 && op_id >= 0 && op_id <= max_lir_op_id() + 1, "op_id out of range"); return _block_of_op.at(op_id >> 1); }
@@ -299,11 +296,11 @@
// Phase 5: actual register allocation
// (Uses LinearScanWalker)
//
// helper functions for building a sorted list of intervals
- NOT_PRODUCT(bool is_sorted(IntervalArray* intervals);)
+ NOT_PRODUCT(bool is_sorted(GrowableArray<Interval*>* intervals);)
static int interval_cmp(Interval** a, Interval** b);
void add_to_list(Interval** first, Interval** prev, Interval* interval);
void create_unhandled_lists(Interval** list1, Interval** list2, bool (is_list1)(const Interval* i), bool (is_list2)(const Interval* i));
void sort_intervals_before_allocation();
@@ -425,13 +422,13 @@
LIR_List* _insert_list;
int _insert_idx;
LIR_InsertionBuffer _insertion_buffer; // buffer where moves are inserted
- IntervalList _mapping_from;
+ GrowableArray<Interval*> _mapping_from;
LIR_OprList _mapping_from_opr;
- IntervalList _mapping_to;
+ GrowableArray<Interval*> _mapping_to;
bool _multiple_reads_allowed;
int _register_blocked[LinearScan::nof_regs];
int register_blocked(int reg) { assert(reg >= 0 && reg < LinearScan::nof_regs, "out of bounds"); return _register_blocked[reg]; }
void set_register_blocked(int reg, int direction) { assert(reg >= 0 && reg < LinearScan::nof_regs, "out of bounds"); assert(direction == 1 || direction == -1, "out of bounds"); _register_blocked[reg] += direction; }
@@ -531,11 +528,11 @@
int _cached_to; // cached value: to of last range (-1: not cached)
LIR_Opr _cached_opr;
VMReg _cached_vm_reg;
Interval* _split_parent; // the original interval where this interval is derived from
- IntervalList _split_children; // list of all intervals that are split off from this interval (only available for split parents)
+ GrowableArray<Interval*> _split_children; // list of all intervals that are split off from this interval (only available for split parents)
Interval* _current_split_child; // the current split child that has been active or inactive last (always stored in split parents)
int _canonical_spill_slot; // the stack slot where all split parts of this interval are spilled to (always stored in split parents)
bool _insert_move_when_activated; // true if move is inserted between _current_split_child and this interval when interval gets active the first time
IntervalSpillState _spill_state; // for spill move optimization
@@ -720,11 +717,11 @@
int _num_phys_regs; // required by current interval
bool _adjacent_regs; // have lo/hi words of phys. regs be adjacent
int _use_pos[LinearScan::nof_regs];
int _block_pos[LinearScan::nof_regs];
- IntervalList* _spill_intervals[LinearScan::nof_regs];
+ GrowableArray<Interval*>* _spill_intervals[LinearScan::nof_regs];
MoveResolver _move_resolver; // for ordering spill moves
// accessors mapped to same functions in class LinearScan
int block_count() const { return allocator()->block_count(); }
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