1 /*
   2  * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_Compilation.hpp"
  27 #include "c1/c1_FrameMap.hpp"
  28 #include "c1/c1_Instruction.hpp"
  29 #include "c1/c1_LIRAssembler.hpp"
  30 #include "c1/c1_LIRGenerator.hpp"
  31 #include "c1/c1_Runtime1.hpp"
  32 #include "c1/c1_ValueStack.hpp"
  33 #include "ci/ciArray.hpp"
  34 #include "ci/ciObjArrayKlass.hpp"
  35 #include "ci/ciTypeArrayKlass.hpp"
  36 #include "runtime/sharedRuntime.hpp"
  37 #include "runtime/stubRoutines.hpp"
  38 #include "vmreg_sparc.inline.hpp"
  39 
  40 #ifdef ASSERT
  41 #define __ gen()->lir(__FILE__, __LINE__)->
  42 #else
  43 #define __ gen()->lir()->
  44 #endif
  45 
  46 void LIRItem::load_byte_item() {
  47   // byte loads use same registers as other loads
  48   load_item();
  49 }
  50 
  51 
  52 void LIRItem::load_nonconstant() {
  53   LIR_Opr r = value()->operand();
  54   if (_gen->can_inline_as_constant(value())) {
  55     if (!r->is_constant()) {
  56       r = LIR_OprFact::value_type(value()->type());
  57     }
  58     _result = r;
  59   } else {
  60     load_item();
  61   }
  62 }
  63 
  64 
  65 //--------------------------------------------------------------
  66 //               LIRGenerator
  67 //--------------------------------------------------------------
  68 
  69 LIR_Opr LIRGenerator::exceptionOopOpr()              { return FrameMap::Oexception_opr;  }
  70 LIR_Opr LIRGenerator::exceptionPcOpr()               { return FrameMap::Oissuing_pc_opr; }
  71 LIR_Opr LIRGenerator::syncLockOpr()                  { return new_register(T_INT); }
  72 LIR_Opr LIRGenerator::syncTempOpr()                  { return new_register(T_OBJECT); }
  73 LIR_Opr LIRGenerator::getThreadTemp()                { return rlock_callee_saved(NOT_LP64(T_INT) LP64_ONLY(T_LONG)); }
  74 
  75 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
  76   LIR_Opr opr;
  77   switch (type->tag()) {
  78   case intTag:     opr = callee ? FrameMap::I0_opr      : FrameMap::O0_opr;       break;
  79   case objectTag:  opr = callee ? FrameMap::I0_oop_opr  : FrameMap::O0_oop_opr;   break;
  80   case longTag:    opr = callee ? FrameMap::in_long_opr : FrameMap::out_long_opr; break;
  81   case floatTag:   opr = FrameMap::F0_opr;                                        break;
  82   case doubleTag:  opr = FrameMap::F0_double_opr;                                 break;
  83 
  84   case addressTag:
  85   default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
  86   }
  87 
  88   assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
  89   return opr;
  90 }
  91 
  92 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
  93   LIR_Opr reg = new_register(type);
  94   set_vreg_flag(reg, callee_saved);
  95   return reg;
  96 }
  97 
  98 
  99 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
 100   return new_register(T_INT);
 101 }
 102 
 103 
 104 
 105 
 106 
 107 //--------- loading items into registers --------------------------------
 108 
 109 // SPARC cannot inline all constants
 110 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
 111   if (v->type()->as_IntConstant() != NULL) {
 112     return v->type()->as_IntConstant()->value() == 0;
 113   } else if (v->type()->as_LongConstant() != NULL) {
 114     return v->type()->as_LongConstant()->value() == 0L;
 115   } else if (v->type()->as_ObjectConstant() != NULL) {
 116     return v->type()->as_ObjectConstant()->value()->is_null_object();
 117   } else {
 118     return false;
 119   }
 120 }
 121 
 122 
 123 // only simm13 constants can be inlined
 124 bool LIRGenerator:: can_inline_as_constant(Value i) const {
 125   if (i->type()->as_IntConstant() != NULL) {
 126     return Assembler::is_simm13(i->type()->as_IntConstant()->value());
 127   } else {
 128     return can_store_as_constant(i, as_BasicType(i->type()));
 129   }
 130 }
 131 
 132 
 133 bool LIRGenerator:: can_inline_as_constant(LIR_Const* c) const {
 134   if (c->type() == T_INT) {
 135     return Assembler::is_simm13(c->as_jint());
 136   }
 137   return false;
 138 }
 139 
 140 
 141 LIR_Opr LIRGenerator::safepoint_poll_register() {
 142   return new_register(T_INT);
 143 }
 144 
 145 
 146 
 147 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
 148                                             int shift, int disp, BasicType type) {
 149   assert(base->is_register(), "must be");
 150 
 151   // accumulate fixed displacements
 152   if (index->is_constant()) {
 153     disp += index->as_constant_ptr()->as_jint() << shift;
 154     index = LIR_OprFact::illegalOpr;
 155   }
 156 
 157   if (index->is_register()) {
 158     // apply the shift and accumulate the displacement
 159     if (shift > 0) {
 160       LIR_Opr tmp = new_pointer_register();
 161       __ shift_left(index, shift, tmp);
 162       index = tmp;
 163     }
 164     if (disp != 0) {
 165       LIR_Opr tmp = new_pointer_register();
 166       if (Assembler::is_simm13(disp)) {
 167         __ add(tmp, LIR_OprFact::intptrConst(disp), tmp);
 168         index = tmp;
 169       } else {
 170         __ move(LIR_OprFact::intptrConst(disp), tmp);
 171         __ add(tmp, index, tmp);
 172         index = tmp;
 173       }
 174       disp = 0;
 175     }
 176   } else if (disp != 0 && !Assembler::is_simm13(disp)) {
 177     // index is illegal so replace it with the displacement loaded into a register
 178     index = new_pointer_register();
 179     __ move(LIR_OprFact::intptrConst(disp), index);
 180     disp = 0;
 181   }
 182 
 183   // at this point we either have base + index or base + displacement
 184   if (disp == 0) {
 185     return new LIR_Address(base, index, type);
 186   } else {
 187     assert(Assembler::is_simm13(disp), "must be");
 188     return new LIR_Address(base, disp, type);
 189   }
 190 }
 191 
 192 
 193 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
 194                                               BasicType type, bool needs_card_mark) {
 195   int elem_size = type2aelembytes(type);
 196   int shift = exact_log2(elem_size);
 197 
 198   LIR_Opr base_opr;
 199   int offset = arrayOopDesc::base_offset_in_bytes(type);
 200 
 201   if (index_opr->is_constant()) {
 202     int i = index_opr->as_constant_ptr()->as_jint();
 203     int array_offset = i * elem_size;
 204     if (Assembler::is_simm13(array_offset + offset)) {
 205       base_opr = array_opr;
 206       offset = array_offset + offset;
 207     } else {
 208       base_opr = new_pointer_register();
 209       if (Assembler::is_simm13(array_offset)) {
 210         __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
 211       } else {
 212         __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
 213         __ add(base_opr, array_opr, base_opr);
 214       }
 215     }
 216   } else {
 217 #ifdef _LP64
 218     if (index_opr->type() == T_INT) {
 219       LIR_Opr tmp = new_register(T_LONG);
 220       __ convert(Bytecodes::_i2l, index_opr, tmp);
 221       index_opr = tmp;
 222     }
 223 #endif
 224 
 225     base_opr = new_pointer_register();
 226     assert (index_opr->is_register(), "Must be register");
 227     if (shift > 0) {
 228       __ shift_left(index_opr, shift, base_opr);
 229       __ add(base_opr, array_opr, base_opr);
 230     } else {
 231       __ add(index_opr, array_opr, base_opr);
 232     }
 233   }
 234   if (needs_card_mark) {
 235     LIR_Opr ptr = new_pointer_register();
 236     __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
 237     return new LIR_Address(ptr, type);
 238   } else {
 239     return new LIR_Address(base_opr, offset, type);
 240   }
 241 }
 242 
 243 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
 244   LIR_Opr r;
 245   if (type == T_LONG) {
 246     r = LIR_OprFact::longConst(x);
 247   } else if (type == T_INT) {
 248     r = LIR_OprFact::intConst(x);
 249   } else {
 250     ShouldNotReachHere();
 251   }
 252   if (!Assembler::is_simm13(x)) {
 253     LIR_Opr tmp = new_register(type);
 254     __ move(r, tmp);
 255     return tmp;
 256   }
 257   return r;
 258 }
 259 
 260 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
 261   LIR_Opr pointer = new_pointer_register();
 262   __ move(LIR_OprFact::intptrConst(counter), pointer);
 263   LIR_Address* addr = new LIR_Address(pointer, type);
 264   increment_counter(addr, step);
 265 }
 266 
 267 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
 268   LIR_Opr temp = new_register(addr->type());
 269   __ move(addr, temp);
 270   __ add(temp, load_immediate(step, addr->type()), temp);
 271   __ move(temp, addr);
 272 }
 273 
 274 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
 275   LIR_Opr o7opr = FrameMap::O7_opr;
 276   __ load(new LIR_Address(base, disp, T_INT), o7opr, info);
 277   __ cmp(condition, o7opr, c);
 278 }
 279 
 280 
 281 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
 282   LIR_Opr o7opr = FrameMap::O7_opr;
 283   __ load(new LIR_Address(base, disp, type), o7opr, info);
 284   __ cmp(condition, reg, o7opr);
 285 }
 286 
 287 
 288 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
 289   LIR_Opr o7opr = FrameMap::O7_opr;
 290   __ load(new LIR_Address(base, disp, type), o7opr, info);
 291   __ cmp(condition, reg, o7opr);
 292 }
 293 
 294 
 295 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
 296   assert(left != result, "should be different registers");
 297   if (is_power_of_2(c + 1)) {
 298     __ shift_left(left, log2_intptr(c + 1), result);
 299     __ sub(result, left, result);
 300     return true;
 301   } else if (is_power_of_2(c - 1)) {
 302     __ shift_left(left, log2_intptr(c - 1), result);
 303     __ add(result, left, result);
 304     return true;
 305   }
 306   return false;
 307 }
 308 
 309 
 310 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
 311   BasicType t = item->type();
 312   LIR_Opr sp_opr = FrameMap::SP_opr;
 313   if ((t == T_LONG || t == T_DOUBLE) &&
 314       ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
 315     __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
 316   } else {
 317     __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
 318   }
 319 }
 320 
 321 //----------------------------------------------------------------------
 322 //             visitor functions
 323 //----------------------------------------------------------------------
 324 
 325 
 326 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
 327   assert(x->is_pinned(),"");
 328   bool needs_range_check = x->compute_needs_range_check();
 329   bool use_length = x->length() != NULL;
 330   bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
 331   bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
 332                                          !get_jobject_constant(x->value())->is_null_object() ||
 333                                          x->should_profile());
 334 
 335   LIRItem array(x->array(), this);
 336   LIRItem index(x->index(), this);
 337   LIRItem value(x->value(), this);
 338   LIRItem length(this);
 339 
 340   array.load_item();
 341   index.load_nonconstant();
 342 
 343   if (use_length && needs_range_check) {
 344     length.set_instruction(x->length());
 345     length.load_item();
 346   }
 347   if (needs_store_check) {
 348     value.load_item();
 349   } else {
 350     value.load_for_store(x->elt_type());
 351   }
 352 
 353   set_no_result(x);
 354 
 355   // the CodeEmitInfo must be duplicated for each different
 356   // LIR-instruction because spilling can occur anywhere between two
 357   // instructions and so the debug information must be different
 358   CodeEmitInfo* range_check_info = state_for(x);
 359   CodeEmitInfo* null_check_info = NULL;
 360   if (x->needs_null_check()) {
 361     null_check_info = new CodeEmitInfo(range_check_info);
 362   }
 363 
 364   // emit array address setup early so it schedules better
 365   LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
 366 
 367   if (GenerateRangeChecks && needs_range_check) {
 368     if (use_length) {
 369       __ cmp(lir_cond_belowEqual, length.result(), index.result());
 370       __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
 371     } else {
 372       array_range_check(array.result(), index.result(), null_check_info, range_check_info);
 373       // range_check also does the null check
 374       null_check_info = NULL;
 375     }
 376   }
 377 
 378   if (GenerateArrayStoreCheck && needs_store_check) {
 379     LIR_Opr tmp1 = FrameMap::G1_opr;
 380     LIR_Opr tmp2 = FrameMap::G3_opr;
 381     LIR_Opr tmp3 = FrameMap::G5_opr;
 382 
 383     CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
 384     __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
 385   }
 386 
 387   if (obj_store) {
 388     // Needs GC write barriers.
 389     pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
 390                 true /* do_load */, false /* patch */, NULL);
 391   }
 392   __ move(value.result(), array_addr, null_check_info);
 393   if (obj_store) {
 394     // Precise card mark
 395     post_barrier(LIR_OprFact::address(array_addr), value.result());
 396   }
 397 }
 398 
 399 
 400 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
 401   assert(x->is_pinned(),"");
 402   LIRItem obj(x->obj(), this);
 403   obj.load_item();
 404 
 405   set_no_result(x);
 406 
 407   LIR_Opr lock    = FrameMap::G1_opr;
 408   LIR_Opr scratch = FrameMap::G3_opr;
 409   LIR_Opr hdr     = FrameMap::G4_opr;
 410 
 411   CodeEmitInfo* info_for_exception = NULL;
 412   if (x->needs_null_check()) {
 413     info_for_exception = state_for(x);
 414   }
 415 
 416   // this CodeEmitInfo must not have the xhandlers because here the
 417   // object is already locked (xhandlers expects object to be unlocked)
 418   CodeEmitInfo* info = state_for(x, x->state(), true);
 419   monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
 420 }
 421 
 422 
 423 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
 424   assert(x->is_pinned(),"");
 425   LIRItem obj(x->obj(), this);
 426   obj.dont_load_item();
 427 
 428   set_no_result(x);
 429   LIR_Opr lock      = FrameMap::G1_opr;
 430   LIR_Opr hdr       = FrameMap::G3_opr;
 431   LIR_Opr obj_temp  = FrameMap::G4_opr;
 432   monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
 433 }
 434 
 435 
 436 // _ineg, _lneg, _fneg, _dneg
 437 void LIRGenerator::do_NegateOp(NegateOp* x) {
 438   LIRItem value(x->x(), this);
 439   value.load_item();
 440   LIR_Opr reg = rlock_result(x);
 441   __ negate(value.result(), reg);
 442 }
 443 
 444 
 445 
 446 // for  _fadd, _fmul, _fsub, _fdiv, _frem
 447 //      _dadd, _dmul, _dsub, _ddiv, _drem
 448 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
 449   switch (x->op()) {
 450   case Bytecodes::_fadd:
 451   case Bytecodes::_fmul:
 452   case Bytecodes::_fsub:
 453   case Bytecodes::_fdiv:
 454   case Bytecodes::_dadd:
 455   case Bytecodes::_dmul:
 456   case Bytecodes::_dsub:
 457   case Bytecodes::_ddiv: {
 458     LIRItem left(x->x(), this);
 459     LIRItem right(x->y(), this);
 460     left.load_item();
 461     right.load_item();
 462     rlock_result(x);
 463     arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
 464   }
 465   break;
 466 
 467   case Bytecodes::_frem:
 468   case Bytecodes::_drem: {
 469     address entry;
 470     switch (x->op()) {
 471     case Bytecodes::_frem:
 472       entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
 473       break;
 474     case Bytecodes::_drem:
 475       entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
 476       break;
 477     default:
 478       ShouldNotReachHere();
 479     }
 480     LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
 481     set_result(x, result);
 482   }
 483   break;
 484 
 485   default: ShouldNotReachHere();
 486   }
 487 }
 488 
 489 
 490 // for  _ladd, _lmul, _lsub, _ldiv, _lrem
 491 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
 492   switch (x->op()) {
 493   case Bytecodes::_lrem:
 494   case Bytecodes::_lmul:
 495   case Bytecodes::_ldiv: {
 496 
 497     if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
 498       LIRItem right(x->y(), this);
 499       right.load_item();
 500 
 501       CodeEmitInfo* info = state_for(x);
 502       LIR_Opr item = right.result();
 503       assert(item->is_register(), "must be");
 504       __ cmp(lir_cond_equal, item, LIR_OprFact::longConst(0));
 505       __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
 506     }
 507 
 508     address entry;
 509     switch (x->op()) {
 510     case Bytecodes::_lrem:
 511       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
 512       break; // check if dividend is 0 is done elsewhere
 513     case Bytecodes::_ldiv:
 514       entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
 515       break; // check if dividend is 0 is done elsewhere
 516     case Bytecodes::_lmul:
 517       entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
 518       break;
 519     default:
 520       ShouldNotReachHere();
 521     }
 522 
 523     // order of arguments to runtime call is reversed.
 524     LIR_Opr result = call_runtime(x->y(), x->x(), entry, x->type(), NULL);
 525     set_result(x, result);
 526     break;
 527   }
 528   case Bytecodes::_ladd:
 529   case Bytecodes::_lsub: {
 530     LIRItem left(x->x(), this);
 531     LIRItem right(x->y(), this);
 532     left.load_item();
 533     right.load_item();
 534     rlock_result(x);
 535 
 536     arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
 537     break;
 538   }
 539   default: ShouldNotReachHere();
 540   }
 541 }
 542 
 543 
 544 // Returns if item is an int constant that can be represented by a simm13
 545 static bool is_simm13(LIR_Opr item) {
 546   if (item->is_constant() && item->type() == T_INT) {
 547     return Assembler::is_simm13(item->as_constant_ptr()->as_jint());
 548   } else {
 549     return false;
 550   }
 551 }
 552 
 553 
 554 // for: _iadd, _imul, _isub, _idiv, _irem
 555 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
 556   bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
 557   LIRItem left(x->x(), this);
 558   LIRItem right(x->y(), this);
 559   // missing test if instr is commutative and if we should swap
 560   right.load_nonconstant();
 561   assert(right.is_constant() || right.is_register(), "wrong state of right");
 562   left.load_item();
 563   rlock_result(x);
 564   if (is_div_rem) {
 565     CodeEmitInfo* info = state_for(x);
 566     LIR_Opr tmp = FrameMap::G1_opr;
 567     if (x->op() == Bytecodes::_irem) {
 568       __ irem(left.result(), right.result(), x->operand(), tmp, info);
 569     } else if (x->op() == Bytecodes::_idiv) {
 570       __ idiv(left.result(), right.result(), x->operand(), tmp, info);
 571     }
 572   } else {
 573     arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::G1_opr);
 574   }
 575 }
 576 
 577 
 578 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
 579   ValueTag tag = x->type()->tag();
 580   assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
 581   switch (tag) {
 582     case floatTag:
 583     case doubleTag:  do_ArithmeticOp_FPU(x);  return;
 584     case longTag:    do_ArithmeticOp_Long(x); return;
 585     case intTag:     do_ArithmeticOp_Int(x);  return;
 586   }
 587   ShouldNotReachHere();
 588 }
 589 
 590 
 591 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
 592 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
 593   LIRItem value(x->x(), this);
 594   LIRItem count(x->y(), this);
 595   // Long shift destroys count register
 596   if (value.type()->is_long()) {
 597     count.set_destroys_register();
 598   }
 599   value.load_item();
 600   // the old backend doesn't support this
 601   if (count.is_constant() && count.type()->as_IntConstant() != NULL && value.type()->is_int()) {
 602     jint c = count.get_jint_constant() & 0x1f;
 603     assert(c >= 0 && c < 32, "should be small");
 604     count.dont_load_item();
 605   } else {
 606     count.load_item();
 607   }
 608   LIR_Opr reg = rlock_result(x);
 609   shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
 610 }
 611 
 612 
 613 // _iand, _land, _ior, _lor, _ixor, _lxor
 614 void LIRGenerator::do_LogicOp(LogicOp* x) {
 615   LIRItem left(x->x(), this);
 616   LIRItem right(x->y(), this);
 617 
 618   left.load_item();
 619   right.load_nonconstant();
 620   LIR_Opr reg = rlock_result(x);
 621 
 622   logic_op(x->op(), reg, left.result(), right.result());
 623 }
 624 
 625 
 626 
 627 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
 628 void LIRGenerator::do_CompareOp(CompareOp* x) {
 629   LIRItem left(x->x(), this);
 630   LIRItem right(x->y(), this);
 631   left.load_item();
 632   right.load_item();
 633   LIR_Opr reg = rlock_result(x);
 634   if (x->x()->type()->is_float_kind()) {
 635     Bytecodes::Code code = x->op();
 636     __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
 637   } else if (x->x()->type()->tag() == longTag) {
 638     __ lcmp2int(left.result(), right.result(), reg);
 639   } else {
 640     Unimplemented();
 641   }
 642 }
 643 
 644 
 645 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
 646   assert(x->number_of_arguments() == 4, "wrong type");
 647   LIRItem obj   (x->argument_at(0), this);  // object
 648   LIRItem offset(x->argument_at(1), this);  // offset of field
 649   LIRItem cmp   (x->argument_at(2), this);  // value to compare with field
 650   LIRItem val   (x->argument_at(3), this);  // replace field with val if matches cmp
 651 
 652   // Use temps to avoid kills
 653   LIR_Opr t1 = FrameMap::G1_opr;
 654   LIR_Opr t2 = FrameMap::G3_opr;
 655   LIR_Opr addr = new_pointer_register();
 656 
 657   // get address of field
 658   obj.load_item();
 659   offset.load_item();
 660   cmp.load_item();
 661   val.load_item();
 662 
 663   __ add(obj.result(), offset.result(), addr);
 664 
 665   if (type == objectType) {  // Write-barrier needed for Object fields.
 666     pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
 667                 true /* do_load */, false /* patch */, NULL);
 668   }
 669 
 670   if (type == objectType)
 671     __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
 672   else if (type == intType)
 673     __ cas_int(addr, cmp.result(), val.result(), t1, t2);
 674   else if (type == longType)
 675     __ cas_long(addr, cmp.result(), val.result(), t1, t2);
 676   else {
 677     ShouldNotReachHere();
 678   }
 679   // generate conditional move of boolean result
 680   LIR_Opr result = rlock_result(x);
 681   __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
 682            result, as_BasicType(type));
 683   if (type == objectType) {  // Write-barrier needed for Object fields.
 684     // Precise card mark since could either be object or array
 685     post_barrier(addr, val.result());
 686   }
 687 }
 688 
 689 
 690 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
 691   switch (x->id()) {
 692     case vmIntrinsics::_dabs:
 693     case vmIntrinsics::_dsqrt: {
 694       assert(x->number_of_arguments() == 1, "wrong type");
 695       LIRItem value(x->argument_at(0), this);
 696       value.load_item();
 697       LIR_Opr dst = rlock_result(x);
 698 
 699       switch (x->id()) {
 700       case vmIntrinsics::_dsqrt: {
 701         __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
 702         break;
 703       }
 704       case vmIntrinsics::_dabs: {
 705         __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
 706         break;
 707       }
 708       }
 709       break;
 710     }
 711     case vmIntrinsics::_dlog10: // fall through
 712     case vmIntrinsics::_dlog: // fall through
 713     case vmIntrinsics::_dsin: // fall through
 714     case vmIntrinsics::_dtan: // fall through
 715     case vmIntrinsics::_dcos: // fall through
 716     case vmIntrinsics::_dexp: {
 717       assert(x->number_of_arguments() == 1, "wrong type");
 718 
 719       address runtime_entry = NULL;
 720       switch (x->id()) {
 721       case vmIntrinsics::_dsin:
 722         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
 723         break;
 724       case vmIntrinsics::_dcos:
 725         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
 726         break;
 727       case vmIntrinsics::_dtan:
 728         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
 729         break;
 730       case vmIntrinsics::_dlog:
 731         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
 732         break;
 733       case vmIntrinsics::_dlog10:
 734         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
 735         break;
 736       case vmIntrinsics::_dexp:
 737         runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
 738         break;
 739       default:
 740         ShouldNotReachHere();
 741       }
 742 
 743       LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
 744       set_result(x, result);
 745       break;
 746     }
 747     case vmIntrinsics::_dpow: {
 748       assert(x->number_of_arguments() == 2, "wrong type");
 749       address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
 750       LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
 751       set_result(x, result);
 752       break;
 753     }
 754   }
 755 }
 756 
 757 
 758 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
 759   assert(x->number_of_arguments() == 5, "wrong type");
 760 
 761   // Make all state_for calls early since they can emit code
 762   CodeEmitInfo* info = state_for(x, x->state());
 763 
 764   // Note: spill caller save before setting the item
 765   LIRItem src     (x->argument_at(0), this);
 766   LIRItem src_pos (x->argument_at(1), this);
 767   LIRItem dst     (x->argument_at(2), this);
 768   LIRItem dst_pos (x->argument_at(3), this);
 769   LIRItem length  (x->argument_at(4), this);
 770   // load all values in callee_save_registers, as this makes the
 771   // parameter passing to the fast case simpler
 772   src.load_item_force     (rlock_callee_saved(T_OBJECT));
 773   src_pos.load_item_force (rlock_callee_saved(T_INT));
 774   dst.load_item_force     (rlock_callee_saved(T_OBJECT));
 775   dst_pos.load_item_force (rlock_callee_saved(T_INT));
 776   length.load_item_force  (rlock_callee_saved(T_INT));
 777 
 778   int flags;
 779   ciArrayKlass* expected_type;
 780   arraycopy_helper(x, &flags, &expected_type);
 781 
 782   __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
 783                length.result(), rlock_callee_saved(T_INT),
 784                expected_type, flags, info);
 785   set_no_result(x);
 786 }
 787 
 788 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
 789   // Make all state_for calls early since they can emit code
 790   LIR_Opr result = rlock_result(x);
 791   int flags = 0;
 792   switch (x->id()) {
 793     case vmIntrinsics::_updateCRC32: {
 794       LIRItem crc(x->argument_at(0), this);
 795       LIRItem val(x->argument_at(1), this);
 796       // val is destroyed by update_crc32
 797       val.set_destroys_register();
 798       crc.load_item();
 799       val.load_item();
 800       __ update_crc32(crc.result(), val.result(), result);
 801       break;
 802     }
 803     case vmIntrinsics::_updateBytesCRC32:
 804     case vmIntrinsics::_updateByteBufferCRC32: {
 805 
 806       bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
 807 
 808       LIRItem crc(x->argument_at(0), this);
 809       LIRItem buf(x->argument_at(1), this);
 810       LIRItem off(x->argument_at(2), this);
 811       LIRItem len(x->argument_at(3), this);
 812 
 813       buf.load_item();
 814       off.load_nonconstant();
 815 
 816       LIR_Opr index = off.result();
 817       int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
 818       if(off.result()->is_constant()) {
 819         index = LIR_OprFact::illegalOpr;
 820         offset += off.result()->as_jint();
 821       }
 822 
 823       LIR_Opr base_op = buf.result();
 824 
 825       if (index->is_valid()) {
 826         LIR_Opr tmp = new_register(T_LONG);
 827         __ convert(Bytecodes::_i2l, index, tmp);
 828         index = tmp;
 829         if (index->is_constant()) {
 830           offset += index->as_constant_ptr()->as_jint();
 831           index = LIR_OprFact::illegalOpr;
 832         } else if (index->is_register()) {
 833           LIR_Opr tmp2 = new_register(T_LONG);
 834           LIR_Opr tmp3 = new_register(T_LONG);
 835           __ move(base_op, tmp2);
 836           __ move(index, tmp3);
 837           __ add(tmp2, tmp3, tmp2);
 838           base_op = tmp2;
 839         } else {
 840           ShouldNotReachHere();
 841         }
 842       }
 843 
 844       LIR_Address* a = new LIR_Address(base_op, offset, T_BYTE);
 845 
 846       BasicTypeList signature(3);
 847       signature.append(T_INT);
 848       signature.append(T_ADDRESS);
 849       signature.append(T_INT);
 850       CallingConvention* cc = frame_map()->c_calling_convention(&signature);
 851       const LIR_Opr result_reg = result_register_for(x->type());
 852 
 853       LIR_Opr addr = new_pointer_register();
 854       __ leal(LIR_OprFact::address(a), addr);
 855 
 856       crc.load_item_force(cc->at(0));
 857       __ move(addr, cc->at(1));
 858       len.load_item_force(cc->at(2));
 859 
 860       __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
 861       __ move(result_reg, result);
 862 
 863       break;
 864     }
 865     default: {
 866       ShouldNotReachHere();
 867     }
 868   }
 869 }
 870 
 871 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
 872 // _i2b, _i2c, _i2s
 873 void LIRGenerator::do_Convert(Convert* x) {
 874 
 875   switch (x->op()) {
 876     case Bytecodes::_f2l:
 877     case Bytecodes::_d2l:
 878     case Bytecodes::_d2i:
 879     case Bytecodes::_l2f:
 880     case Bytecodes::_l2d: {
 881 
 882       address entry;
 883       switch (x->op()) {
 884       case Bytecodes::_l2f:
 885         entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
 886         break;
 887       case Bytecodes::_l2d:
 888         entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2d);
 889         break;
 890       case Bytecodes::_f2l:
 891         entry = CAST_FROM_FN_PTR(address, SharedRuntime::f2l);
 892         break;
 893       case Bytecodes::_d2l:
 894         entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2l);
 895         break;
 896       case Bytecodes::_d2i:
 897         entry = CAST_FROM_FN_PTR(address, SharedRuntime::d2i);
 898         break;
 899       default:
 900         ShouldNotReachHere();
 901       }
 902       LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
 903       set_result(x, result);
 904       break;
 905     }
 906 
 907     case Bytecodes::_i2f:
 908     case Bytecodes::_i2d: {
 909       LIRItem value(x->value(), this);
 910 
 911       LIR_Opr reg = rlock_result(x);
 912       // To convert an int to double, we need to load the 32-bit int
 913       // from memory into a single precision floating point register
 914       // (even numbered). Then the sparc fitod instruction takes care
 915       // of the conversion. This is a bit ugly, but is the best way to
 916       // get the int value in a single precision floating point register
 917       value.load_item();
 918       LIR_Opr tmp = force_to_spill(value.result(), T_FLOAT);
 919       __ convert(x->op(), tmp, reg);
 920       break;
 921     }
 922     break;
 923 
 924     case Bytecodes::_i2l:
 925     case Bytecodes::_i2b:
 926     case Bytecodes::_i2c:
 927     case Bytecodes::_i2s:
 928     case Bytecodes::_l2i:
 929     case Bytecodes::_f2d:
 930     case Bytecodes::_d2f: { // inline code
 931       LIRItem value(x->value(), this);
 932 
 933       value.load_item();
 934       LIR_Opr reg = rlock_result(x);
 935       __ convert(x->op(), value.result(), reg, false);
 936     }
 937     break;
 938 
 939     case Bytecodes::_f2i: {
 940       LIRItem value (x->value(), this);
 941       value.set_destroys_register();
 942       value.load_item();
 943       LIR_Opr reg = rlock_result(x);
 944       set_vreg_flag(reg, must_start_in_memory);
 945       __ convert(x->op(), value.result(), reg, false);
 946     }
 947     break;
 948 
 949     default: ShouldNotReachHere();
 950   }
 951 }
 952 
 953 
 954 void LIRGenerator::do_NewInstance(NewInstance* x) {
 955   print_if_not_loaded(x);
 956 
 957   // This instruction can be deoptimized in the slow path : use
 958   // O0 as result register.
 959   const LIR_Opr reg = result_register_for(x->type());
 960 
 961   CodeEmitInfo* info = state_for(x, x->state());
 962   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
 963   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
 964   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
 965   LIR_Opr tmp4 = FrameMap::O1_oop_opr;
 966   LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
 967   new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
 968   LIR_Opr result = rlock_result(x);
 969   __ move(reg, result);
 970 }
 971 
 972 
 973 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
 974   // Evaluate state_for early since it may emit code
 975   CodeEmitInfo* info = state_for(x, x->state());
 976 
 977   LIRItem length(x->length(), this);
 978   length.load_item();
 979 
 980   LIR_Opr reg = result_register_for(x->type());
 981   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
 982   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
 983   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
 984   LIR_Opr tmp4 = FrameMap::O1_oop_opr;
 985   LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
 986   LIR_Opr len = length.result();
 987   BasicType elem_type = x->elt_type();
 988 
 989   __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
 990 
 991   CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
 992   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
 993 
 994   LIR_Opr result = rlock_result(x);
 995   __ move(reg, result);
 996 }
 997 
 998 
 999 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1000   // Evaluate state_for early since it may emit code.
1001   CodeEmitInfo* info = state_for(x, x->state());
1002   // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1003   // and therefore provide the state before the parameters have been consumed
1004   CodeEmitInfo* patching_info = NULL;
1005   if (!x->klass()->is_loaded() || PatchALot) {
1006     patching_info = state_for(x, x->state_before());
1007   }
1008 
1009   LIRItem length(x->length(), this);
1010   length.load_item();
1011 
1012   const LIR_Opr reg = result_register_for(x->type());
1013   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
1014   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
1015   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1016   LIR_Opr tmp4 = FrameMap::O1_oop_opr;
1017   LIR_Opr klass_reg = FrameMap::G5_metadata_opr;
1018   LIR_Opr len = length.result();
1019 
1020   CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1021   ciMetadata* obj = ciObjArrayKlass::make(x->klass());
1022   if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1023     BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1024   }
1025   klass2reg_with_patching(klass_reg, obj, patching_info);
1026   __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1027 
1028   LIR_Opr result = rlock_result(x);
1029   __ move(reg, result);
1030 }
1031 
1032 
1033 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1034   Values* dims = x->dims();
1035   int i = dims->length();
1036   LIRItemList* items = new LIRItemList(i, i, NULL);
1037   while (i-- > 0) {
1038     LIRItem* size = new LIRItem(dims->at(i), this);
1039     items->at_put(i, size);
1040   }
1041 
1042   // Evaluate state_for early since it may emit code.
1043   CodeEmitInfo* patching_info = NULL;
1044   if (!x->klass()->is_loaded() || PatchALot) {
1045     patching_info = state_for(x, x->state_before());
1046 
1047     // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1048     // clone all handlers (NOTE: Usually this is handled transparently
1049     // by the CodeEmitInfo cloning logic in CodeStub constructors but
1050     // is done explicitly here because a stub isn't being used).
1051     x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1052   }
1053   CodeEmitInfo* info = state_for(x, x->state());
1054 
1055   i = dims->length();
1056   while (i-- > 0) {
1057     LIRItem* size = items->at(i);
1058     size->load_item();
1059     store_stack_parameter (size->result(),
1060                            in_ByteSize(STACK_BIAS +
1061                                        frame::memory_parameter_word_sp_offset * wordSize +
1062                                        i * sizeof(jint)));
1063   }
1064 
1065   // This instruction can be deoptimized in the slow path : use
1066   // O0 as result register.
1067   const LIR_Opr klass_reg = FrameMap::O0_metadata_opr;
1068   klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1069   LIR_Opr rank = FrameMap::O1_opr;
1070   __ move(LIR_OprFact::intConst(x->rank()), rank);
1071   LIR_Opr varargs = FrameMap::as_pointer_opr(O2);
1072   int offset_from_sp = (frame::memory_parameter_word_sp_offset * wordSize) + STACK_BIAS;
1073   __ add(FrameMap::SP_opr,
1074          LIR_OprFact::intptrConst(offset_from_sp),
1075          varargs);
1076   LIR_OprList* args = new LIR_OprList(3);
1077   args->append(klass_reg);
1078   args->append(rank);
1079   args->append(varargs);
1080   const LIR_Opr reg = result_register_for(x->type());
1081   __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1082                   LIR_OprFact::illegalOpr,
1083                   reg, args, info);
1084 
1085   LIR_Opr result = rlock_result(x);
1086   __ move(reg, result);
1087 }
1088 
1089 
1090 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1091 }
1092 
1093 
1094 void LIRGenerator::do_CheckCast(CheckCast* x) {
1095   LIRItem obj(x->obj(), this);
1096   CodeEmitInfo* patching_info = NULL;
1097   if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1098     // must do this before locking the destination register as an oop register,
1099     // and before the obj is loaded (so x->obj()->item() is valid for creating a debug info location)
1100     patching_info = state_for(x, x->state_before());
1101   }
1102   obj.load_item();
1103   LIR_Opr out_reg = rlock_result(x);
1104   CodeStub* stub;
1105   CodeEmitInfo* info_for_exception = state_for(x);
1106 
1107   if (x->is_incompatible_class_change_check()) {
1108     assert(patching_info == NULL, "can't patch this");
1109     stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1110   } else {
1111     stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1112   }
1113   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
1114   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
1115   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1116   __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1117                x->direct_compare(), info_for_exception, patching_info, stub,
1118                x->profiled_method(), x->profiled_bci());
1119 }
1120 
1121 
1122 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1123   LIRItem obj(x->obj(), this);
1124   CodeEmitInfo* patching_info = NULL;
1125   if (!x->klass()->is_loaded() || PatchALot) {
1126     patching_info = state_for(x, x->state_before());
1127   }
1128   // ensure the result register is not the input register because the result is initialized before the patching safepoint
1129   obj.load_item();
1130   LIR_Opr out_reg = rlock_result(x);
1131   LIR_Opr tmp1 = FrameMap::G1_oop_opr;
1132   LIR_Opr tmp2 = FrameMap::G3_oop_opr;
1133   LIR_Opr tmp3 = FrameMap::G4_oop_opr;
1134   __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1135                 x->direct_compare(), patching_info,
1136                 x->profiled_method(), x->profiled_bci());
1137 }
1138 
1139 
1140 void LIRGenerator::do_If(If* x) {
1141   assert(x->number_of_sux() == 2, "inconsistency");
1142   ValueTag tag = x->x()->type()->tag();
1143   LIRItem xitem(x->x(), this);
1144   LIRItem yitem(x->y(), this);
1145   LIRItem* xin = &xitem;
1146   LIRItem* yin = &yitem;
1147   If::Condition cond = x->cond();
1148 
1149   if (tag == longTag) {
1150     // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1151     // mirror for other conditions
1152     if (cond == If::gtr || cond == If::leq) {
1153       // swap inputs
1154       cond = Instruction::mirror(cond);
1155       xin = &yitem;
1156       yin = &xitem;
1157     }
1158     xin->set_destroys_register();
1159   }
1160 
1161   LIR_Opr left = LIR_OprFact::illegalOpr;
1162   LIR_Opr right = LIR_OprFact::illegalOpr;
1163 
1164   xin->load_item();
1165   left = xin->result();
1166 
1167   if (is_simm13(yin->result())) {
1168     // inline int constants which are small enough to be immediate operands
1169     right = LIR_OprFact::value_type(yin->value()->type());
1170   } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1171              (cond == If::eql || cond == If::neq)) {
1172     // inline long zero
1173     right = LIR_OprFact::value_type(yin->value()->type());
1174   } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
1175     right = LIR_OprFact::value_type(yin->value()->type());
1176   } else {
1177     yin->load_item();
1178     right = yin->result();
1179   }
1180   set_no_result(x);
1181 
1182   // add safepoint before generating condition code so it can be recomputed
1183   if (x->is_safepoint()) {
1184     // increment backedge counter if needed
1185     increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1186     __ safepoint(new_register(T_INT), state_for(x, x->state_before()));
1187   }
1188 
1189   __ cmp(lir_cond(cond), left, right);
1190   // Generate branch profiling. Profiling code doesn't kill flags.
1191   profile_branch(x, cond);
1192   move_to_phi(x->state());
1193   if (x->x()->type()->is_float_kind()) {
1194     __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1195   } else {
1196     __ branch(lir_cond(cond), right->type(), x->tsux());
1197   }
1198   assert(x->default_sux() == x->fsux(), "wrong destination above");
1199   __ jump(x->default_sux());
1200 }
1201 
1202 
1203 LIR_Opr LIRGenerator::getThreadPointer() {
1204   return FrameMap::as_pointer_opr(G2);
1205 }
1206 
1207 
1208 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1209   __ move(LIR_OprFact::intConst(block->block_id()), FrameMap::O0_opr);
1210   LIR_OprList* args = new LIR_OprList(1);
1211   args->append(FrameMap::O0_opr);
1212   address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1213   __ call_runtime_leaf(func, rlock_callee_saved(T_INT), LIR_OprFact::illegalOpr, args);
1214 }
1215 
1216 
1217 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1218                                         CodeEmitInfo* info) {
1219 #ifdef _LP64
1220   __ store(value, address, info);
1221 #else
1222   __ volatile_store_mem_reg(value, address, info);
1223 #endif
1224 }
1225 
1226 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1227                                        CodeEmitInfo* info) {
1228 #ifdef _LP64
1229   __ load(address, result, info);
1230 #else
1231   __ volatile_load_mem_reg(address, result, info);
1232 #endif
1233 }
1234 
1235 
1236 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1237                                      BasicType type, bool is_volatile) {
1238   LIR_Opr base_op = src;
1239   LIR_Opr index_op = offset;
1240 
1241   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1242 #ifndef _LP64
1243   if (is_volatile && type == T_LONG) {
1244     __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
1245   } else
1246 #endif
1247     {
1248       if (type == T_BOOLEAN) {
1249         type = T_BYTE;
1250       }
1251       LIR_Address* addr;
1252       if (type == T_ARRAY || type == T_OBJECT) {
1253         LIR_Opr tmp = new_pointer_register();
1254         __ add(base_op, index_op, tmp);
1255         addr = new LIR_Address(tmp, type);
1256       } else {
1257         addr = new LIR_Address(base_op, index_op, type);
1258       }
1259 
1260       if (is_obj) {
1261         pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1262                     true /* do_load */, false /* patch */, NULL);
1263         // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
1264       }
1265       __ move(data, addr);
1266       if (is_obj) {
1267         // This address is precise
1268         post_barrier(LIR_OprFact::address(addr), data);
1269       }
1270     }
1271 }
1272 
1273 
1274 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1275                                      BasicType type, bool is_volatile) {
1276 #ifndef _LP64
1277   if (is_volatile && type == T_LONG) {
1278     __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
1279   } else
1280 #endif
1281     {
1282     LIR_Address* addr = new LIR_Address(src, offset, type);
1283     __ load(addr, dst);
1284   }
1285 }
1286 
1287 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1288   BasicType type = x->basic_type();
1289   LIRItem src(x->object(), this);
1290   LIRItem off(x->offset(), this);
1291   LIRItem value(x->value(), this);
1292 
1293   src.load_item();
1294   value.load_item();
1295   off.load_nonconstant();
1296 
1297   LIR_Opr dst = rlock_result(x, type);
1298   LIR_Opr data = value.result();
1299   bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1300   LIR_Opr offset = off.result();
1301 
1302   // Because we want a 2-arg form of xchg
1303   __ move(data, dst);
1304 
1305   assert (!x->is_add() && (type == T_INT || (is_obj LP64_ONLY(&& UseCompressedOops))), "unexpected type");
1306   LIR_Address* addr;
1307   if (offset->is_constant()) {
1308 
1309 #ifdef _LP64
1310     jlong l = offset->as_jlong();
1311     assert((jlong)((jint)l) == l, "offset too large for constant");
1312     jint c = (jint)l;
1313 #else
1314     jint c = offset->as_jint();
1315 #endif
1316     addr = new LIR_Address(src.result(), c, type);
1317   } else {
1318     addr = new LIR_Address(src.result(), offset, type);
1319   }
1320 
1321   LIR_Opr tmp = LIR_OprFact::illegalOpr;
1322   LIR_Opr ptr = LIR_OprFact::illegalOpr;
1323 
1324   if (is_obj) {
1325     // Do the pre-write barrier, if any.
1326     // barriers on sparc don't work with a base + index address
1327     tmp = FrameMap::G3_opr;
1328     ptr = new_pointer_register();
1329     __ add(src.result(), off.result(), ptr);
1330     pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
1331                 true /* do_load */, false /* patch */, NULL);
1332   }
1333   __ xchg(LIR_OprFact::address(addr), dst, dst, tmp);
1334   if (is_obj) {
1335     // Seems to be a precise address
1336     post_barrier(ptr, data);
1337   }
1338 }