1 /* 2 * Copyright (c) 2005, 2016, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_Compilation.hpp" 27 #include "c1/c1_FrameMap.hpp" 28 #include "c1/c1_Instruction.hpp" 29 #include "c1/c1_LIRAssembler.hpp" 30 #include "c1/c1_LIRGenerator.hpp" 31 #include "c1/c1_Runtime1.hpp" 32 #include "c1/c1_ValueStack.hpp" 33 #include "ci/ciArray.hpp" 34 #include "ci/ciObjArrayKlass.hpp" 35 #include "ci/ciTypeArrayKlass.hpp" 36 #include "runtime/sharedRuntime.hpp" 37 #include "runtime/stubRoutines.hpp" 38 #include "vmreg_x86.inline.hpp" 39 40 #ifdef ASSERT 41 #define __ gen()->lir(__FILE__, __LINE__)-> 42 #else 43 #define __ gen()->lir()-> 44 #endif 45 46 // Item will be loaded into a byte register; Intel only 47 void LIRItem::load_byte_item() { 48 load_item(); 49 LIR_Opr res = result(); 50 51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) { 52 // make sure that it is a byte register 53 assert(!value()->type()->is_float() && !value()->type()->is_double(), 54 "can't load floats in byte register"); 55 LIR_Opr reg = _gen->rlock_byte(T_BYTE); 56 __ move(res, reg); 57 58 _result = reg; 59 } 60 } 61 62 63 void LIRItem::load_nonconstant() { 64 LIR_Opr r = value()->operand(); 65 if (r->is_constant()) { 66 _result = r; 67 } else { 68 load_item(); 69 } 70 } 71 72 //-------------------------------------------------------------- 73 // LIRGenerator 74 //-------------------------------------------------------------- 75 76 77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; } 78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; } 79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; } 80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; } 81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; } 82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; } 83 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); } 84 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; } 85 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } 86 87 88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) { 89 LIR_Opr opr; 90 switch (type->tag()) { 91 case intTag: opr = FrameMap::rax_opr; break; 92 case objectTag: opr = FrameMap::rax_oop_opr; break; 93 case longTag: opr = FrameMap::long0_opr; break; 94 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break; 95 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break; 96 97 case addressTag: 98 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 99 } 100 101 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch"); 102 return opr; 103 } 104 105 106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) { 107 LIR_Opr reg = new_register(T_INT); 108 set_vreg_flag(reg, LIRGenerator::byte_reg); 109 return reg; 110 } 111 112 113 //--------- loading items into registers -------------------------------- 114 115 116 // i486 instructions can inline constants 117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const { 118 if (type == T_SHORT || type == T_CHAR) { 119 // there is no immediate move of word values in asembler_i486.?pp 120 return false; 121 } 122 Constant* c = v->as_Constant(); 123 if (c && c->state_before() == NULL) { 124 // constants of any type can be stored directly, except for 125 // unloaded object constants. 126 return true; 127 } 128 return false; 129 } 130 131 132 bool LIRGenerator::can_inline_as_constant(Value v) const { 133 if (v->type()->tag() == longTag) return false; 134 return v->type()->tag() != objectTag || 135 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object()); 136 } 137 138 139 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { 140 if (c->type() == T_LONG) return false; 141 return c->type() != T_OBJECT || c->as_jobject() == NULL; 142 } 143 144 145 LIR_Opr LIRGenerator::safepoint_poll_register() { 146 return LIR_OprFact::illegalOpr; 147 } 148 149 150 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index, 151 int shift, int disp, BasicType type) { 152 assert(base->is_register(), "must be"); 153 if (index->is_constant()) { 154 return new LIR_Address(base, 155 (index->as_constant_ptr()->as_jint() << shift) + disp, 156 type); 157 } else { 158 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type); 159 } 160 } 161 162 163 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr, 164 BasicType type, bool needs_card_mark) { 165 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type); 166 167 LIR_Address* addr; 168 if (index_opr->is_constant()) { 169 int elem_size = type2aelembytes(type); 170 addr = new LIR_Address(array_opr, 171 offset_in_bytes + index_opr->as_jint() * elem_size, type); 172 } else { 173 #ifdef _LP64 174 if (index_opr->type() == T_INT) { 175 LIR_Opr tmp = new_register(T_LONG); 176 __ convert(Bytecodes::_i2l, index_opr, tmp); 177 index_opr = tmp; 178 } 179 #endif // _LP64 180 addr = new LIR_Address(array_opr, 181 index_opr, 182 LIR_Address::scale(type), 183 offset_in_bytes, type); 184 } 185 if (needs_card_mark) { 186 // This store will need a precise card mark, so go ahead and 187 // compute the full adddres instead of computing once for the 188 // store and again for the card mark. 189 LIR_Opr tmp = new_pointer_register(); 190 __ leal(LIR_OprFact::address(addr), tmp); 191 return new LIR_Address(tmp, type); 192 } else { 193 return addr; 194 } 195 } 196 197 198 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) { 199 LIR_Opr r = NULL; 200 if (type == T_LONG) { 201 r = LIR_OprFact::longConst(x); 202 } else if (type == T_INT) { 203 r = LIR_OprFact::intConst(x); 204 } else { 205 ShouldNotReachHere(); 206 } 207 return r; 208 } 209 210 void LIRGenerator::increment_counter(address counter, BasicType type, int step) { 211 LIR_Opr pointer = new_pointer_register(); 212 __ move(LIR_OprFact::intptrConst(counter), pointer); 213 LIR_Address* addr = new LIR_Address(pointer, type); 214 increment_counter(addr, step); 215 } 216 217 218 void LIRGenerator::increment_counter(LIR_Address* addr, int step) { 219 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr); 220 } 221 222 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 223 __ cmp_mem_int(condition, base, disp, c, info); 224 } 225 226 227 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) { 228 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 229 } 230 231 232 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) { 233 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info); 234 } 235 236 237 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) { 238 if (tmp->is_valid()) { 239 if (is_power_of_2(c + 1)) { 240 __ move(left, tmp); 241 __ shift_left(left, log2_intptr(c + 1), left); 242 __ sub(left, tmp, result); 243 return true; 244 } else if (is_power_of_2(c - 1)) { 245 __ move(left, tmp); 246 __ shift_left(left, log2_intptr(c - 1), left); 247 __ add(left, tmp, result); 248 return true; 249 } 250 } 251 return false; 252 } 253 254 255 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) { 256 BasicType type = item->type(); 257 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type)); 258 } 259 260 //---------------------------------------------------------------------- 261 // visitor functions 262 //---------------------------------------------------------------------- 263 264 265 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) { 266 assert(x->is_pinned(),""); 267 bool needs_range_check = x->compute_needs_range_check(); 268 bool use_length = x->length() != NULL; 269 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT; 270 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL || 271 !get_jobject_constant(x->value())->is_null_object() || 272 x->should_profile()); 273 274 LIRItem array(x->array(), this); 275 LIRItem index(x->index(), this); 276 LIRItem value(x->value(), this); 277 LIRItem length(this); 278 279 array.load_item(); 280 index.load_nonconstant(); 281 282 if (use_length && needs_range_check) { 283 length.set_instruction(x->length()); 284 length.load_item(); 285 286 } 287 if (needs_store_check) { 288 value.load_item(); 289 } else { 290 value.load_for_store(x->elt_type()); 291 } 292 293 set_no_result(x); 294 295 // the CodeEmitInfo must be duplicated for each different 296 // LIR-instruction because spilling can occur anywhere between two 297 // instructions and so the debug information must be different 298 CodeEmitInfo* range_check_info = state_for(x); 299 CodeEmitInfo* null_check_info = NULL; 300 if (x->needs_null_check()) { 301 null_check_info = new CodeEmitInfo(range_check_info); 302 } 303 304 // emit array address setup early so it schedules better 305 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store); 306 307 if (GenerateRangeChecks && needs_range_check) { 308 if (use_length) { 309 __ cmp(lir_cond_belowEqual, length.result(), index.result()); 310 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result())); 311 } else { 312 array_range_check(array.result(), index.result(), null_check_info, range_check_info); 313 // range_check also does the null check 314 null_check_info = NULL; 315 } 316 } 317 318 if (GenerateArrayStoreCheck && needs_store_check) { 319 LIR_Opr tmp1 = new_register(objectType); 320 LIR_Opr tmp2 = new_register(objectType); 321 LIR_Opr tmp3 = new_register(objectType); 322 323 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info); 324 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci()); 325 } 326 327 if (obj_store) { 328 // Needs GC write barriers. 329 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */, 330 true /* do_load */, false /* patch */, NULL); 331 __ move(value.result(), array_addr, null_check_info); 332 // Seems to be a precise 333 post_barrier(LIR_OprFact::address(array_addr), value.result()); 334 } else { 335 __ move(value.result(), array_addr, null_check_info); 336 } 337 } 338 339 340 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) { 341 assert(x->is_pinned(),""); 342 LIRItem obj(x->obj(), this); 343 obj.load_item(); 344 345 set_no_result(x); 346 347 // "lock" stores the address of the monitor stack slot, so this is not an oop 348 LIR_Opr lock = new_register(T_INT); 349 // Need a scratch register for biased locking on x86 350 LIR_Opr scratch = LIR_OprFact::illegalOpr; 351 if (UseBiasedLocking) { 352 scratch = new_register(T_INT); 353 } 354 355 CodeEmitInfo* info_for_exception = NULL; 356 if (x->needs_null_check()) { 357 info_for_exception = state_for(x); 358 } 359 // this CodeEmitInfo must not have the xhandlers because here the 360 // object is already locked (xhandlers expect object to be unlocked) 361 CodeEmitInfo* info = state_for(x, x->state(), true); 362 monitor_enter(obj.result(), lock, syncTempOpr(), scratch, 363 x->monitor_no(), info_for_exception, info); 364 } 365 366 367 void LIRGenerator::do_MonitorExit(MonitorExit* x) { 368 assert(x->is_pinned(),""); 369 370 LIRItem obj(x->obj(), this); 371 obj.dont_load_item(); 372 373 LIR_Opr lock = new_register(T_INT); 374 LIR_Opr obj_temp = new_register(T_INT); 375 set_no_result(x); 376 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no()); 377 } 378 379 380 // _ineg, _lneg, _fneg, _dneg 381 void LIRGenerator::do_NegateOp(NegateOp* x) { 382 LIRItem value(x->x(), this); 383 value.set_destroys_register(); 384 value.load_item(); 385 LIR_Opr reg = rlock(x); 386 __ negate(value.result(), reg); 387 388 set_result(x, round_item(reg)); 389 } 390 391 392 // for _fadd, _fmul, _fsub, _fdiv, _frem 393 // _dadd, _dmul, _dsub, _ddiv, _drem 394 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) { 395 LIRItem left(x->x(), this); 396 LIRItem right(x->y(), this); 397 LIRItem* left_arg = &left; 398 LIRItem* right_arg = &right; 399 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands"); 400 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem); 401 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) { 402 left.load_item(); 403 } else { 404 left.dont_load_item(); 405 } 406 407 // do not load right operand if it is a constant. only 0 and 1 are 408 // loaded because there are special instructions for loading them 409 // without memory access (not needed for SSE2 instructions) 410 bool must_load_right = false; 411 if (right.is_constant()) { 412 LIR_Const* c = right.result()->as_constant_ptr(); 413 assert(c != NULL, "invalid constant"); 414 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type"); 415 416 if (c->type() == T_FLOAT) { 417 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float()); 418 } else { 419 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double()); 420 } 421 } 422 423 if (must_load_both) { 424 // frem and drem destroy also right operand, so move it to a new register 425 right.set_destroys_register(); 426 right.load_item(); 427 } else if (right.is_register() || must_load_right) { 428 right.load_item(); 429 } else { 430 right.dont_load_item(); 431 } 432 LIR_Opr reg = rlock(x); 433 LIR_Opr tmp = LIR_OprFact::illegalOpr; 434 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) { 435 tmp = new_register(T_DOUBLE); 436 } 437 438 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) { 439 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots 440 LIR_Opr fpu0, fpu1; 441 if (x->op() == Bytecodes::_frem) { 442 fpu0 = LIR_OprFact::single_fpu(0); 443 fpu1 = LIR_OprFact::single_fpu(1); 444 } else { 445 fpu0 = LIR_OprFact::double_fpu(0); 446 fpu1 = LIR_OprFact::double_fpu(1); 447 } 448 __ move(right.result(), fpu1); // order of left and right operand is important! 449 __ move(left.result(), fpu0); 450 __ rem (fpu0, fpu1, fpu0); 451 __ move(fpu0, reg); 452 453 } else { 454 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp); 455 } 456 457 set_result(x, round_item(reg)); 458 } 459 460 461 // for _ladd, _lmul, _lsub, _ldiv, _lrem 462 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) { 463 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) { 464 // long division is implemented as a direct call into the runtime 465 LIRItem left(x->x(), this); 466 LIRItem right(x->y(), this); 467 468 // the check for division by zero destroys the right operand 469 right.set_destroys_register(); 470 471 BasicTypeList signature(2); 472 signature.append(T_LONG); 473 signature.append(T_LONG); 474 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 475 476 // check for division by zero (destroys registers of right operand!) 477 CodeEmitInfo* info = state_for(x); 478 479 const LIR_Opr result_reg = result_register_for(x->type()); 480 left.load_item_force(cc->at(1)); 481 right.load_item(); 482 483 __ move(right.result(), cc->at(0)); 484 485 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0)); 486 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info)); 487 488 address entry = NULL; 489 switch (x->op()) { 490 case Bytecodes::_lrem: 491 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem); 492 break; // check if dividend is 0 is done elsewhere 493 case Bytecodes::_ldiv: 494 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv); 495 break; // check if dividend is 0 is done elsewhere 496 case Bytecodes::_lmul: 497 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul); 498 break; 499 default: 500 ShouldNotReachHere(); 501 } 502 503 LIR_Opr result = rlock_result(x); 504 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args()); 505 __ move(result_reg, result); 506 } else if (x->op() == Bytecodes::_lmul) { 507 // missing test if instr is commutative and if we should swap 508 LIRItem left(x->x(), this); 509 LIRItem right(x->y(), this); 510 511 // right register is destroyed by the long mul, so it must be 512 // copied to a new register. 513 right.set_destroys_register(); 514 515 left.load_item(); 516 right.load_item(); 517 518 LIR_Opr reg = FrameMap::long0_opr; 519 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL); 520 LIR_Opr result = rlock_result(x); 521 __ move(reg, result); 522 } else { 523 // missing test if instr is commutative and if we should swap 524 LIRItem left(x->x(), this); 525 LIRItem right(x->y(), this); 526 527 left.load_item(); 528 // don't load constants to save register 529 right.load_nonconstant(); 530 rlock_result(x); 531 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL); 532 } 533 } 534 535 536 537 // for: _iadd, _imul, _isub, _idiv, _irem 538 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) { 539 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) { 540 // The requirements for division and modulo 541 // input : rax,: dividend min_int 542 // reg: divisor (may not be rax,/rdx) -1 543 // 544 // output: rax,: quotient (= rax, idiv reg) min_int 545 // rdx: remainder (= rax, irem reg) 0 546 547 // rax, and rdx will be destroyed 548 549 // Note: does this invalidate the spec ??? 550 LIRItem right(x->y(), this); 551 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid 552 553 // call state_for before load_item_force because state_for may 554 // force the evaluation of other instructions that are needed for 555 // correct debug info. Otherwise the live range of the fix 556 // register might be too long. 557 CodeEmitInfo* info = state_for(x); 558 559 left.load_item_force(divInOpr()); 560 561 right.load_item(); 562 563 LIR_Opr result = rlock_result(x); 564 LIR_Opr result_reg; 565 if (x->op() == Bytecodes::_idiv) { 566 result_reg = divOutOpr(); 567 } else { 568 result_reg = remOutOpr(); 569 } 570 571 if (!ImplicitDiv0Checks) { 572 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0)); 573 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info)); 574 } 575 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation 576 if (x->op() == Bytecodes::_irem) { 577 __ irem(left.result(), right.result(), result_reg, tmp, info); 578 } else if (x->op() == Bytecodes::_idiv) { 579 __ idiv(left.result(), right.result(), result_reg, tmp, info); 580 } else { 581 ShouldNotReachHere(); 582 } 583 584 __ move(result_reg, result); 585 } else { 586 // missing test if instr is commutative and if we should swap 587 LIRItem left(x->x(), this); 588 LIRItem right(x->y(), this); 589 LIRItem* left_arg = &left; 590 LIRItem* right_arg = &right; 591 if (x->is_commutative() && left.is_stack() && right.is_register()) { 592 // swap them if left is real stack (or cached) and right is real register(not cached) 593 left_arg = &right; 594 right_arg = &left; 595 } 596 597 left_arg->load_item(); 598 599 // do not need to load right, as we can handle stack and constants 600 if (x->op() == Bytecodes::_imul ) { 601 // check if we can use shift instead 602 bool use_constant = false; 603 bool use_tmp = false; 604 if (right_arg->is_constant()) { 605 int iconst = right_arg->get_jint_constant(); 606 if (iconst > 0) { 607 if (is_power_of_2(iconst)) { 608 use_constant = true; 609 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) { 610 use_constant = true; 611 use_tmp = true; 612 } 613 } 614 } 615 if (use_constant) { 616 right_arg->dont_load_item(); 617 } else { 618 right_arg->load_item(); 619 } 620 LIR_Opr tmp = LIR_OprFact::illegalOpr; 621 if (use_tmp) { 622 tmp = new_register(T_INT); 623 } 624 rlock_result(x); 625 626 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 627 } else { 628 right_arg->dont_load_item(); 629 rlock_result(x); 630 LIR_Opr tmp = LIR_OprFact::illegalOpr; 631 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp); 632 } 633 } 634 } 635 636 637 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) { 638 // when an operand with use count 1 is the left operand, then it is 639 // likely that no move for 2-operand-LIR-form is necessary 640 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 641 x->swap_operands(); 642 } 643 644 ValueTag tag = x->type()->tag(); 645 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters"); 646 switch (tag) { 647 case floatTag: 648 case doubleTag: do_ArithmeticOp_FPU(x); return; 649 case longTag: do_ArithmeticOp_Long(x); return; 650 case intTag: do_ArithmeticOp_Int(x); return; 651 } 652 ShouldNotReachHere(); 653 } 654 655 656 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr 657 void LIRGenerator::do_ShiftOp(ShiftOp* x) { 658 // count must always be in rcx 659 LIRItem value(x->x(), this); 660 LIRItem count(x->y(), this); 661 662 ValueTag elemType = x->type()->tag(); 663 bool must_load_count = !count.is_constant() || elemType == longTag; 664 if (must_load_count) { 665 // count for long must be in register 666 count.load_item_force(shiftCountOpr()); 667 } else { 668 count.dont_load_item(); 669 } 670 value.load_item(); 671 LIR_Opr reg = rlock_result(x); 672 673 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr); 674 } 675 676 677 // _iand, _land, _ior, _lor, _ixor, _lxor 678 void LIRGenerator::do_LogicOp(LogicOp* x) { 679 // when an operand with use count 1 is the left operand, then it is 680 // likely that no move for 2-operand-LIR-form is necessary 681 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) { 682 x->swap_operands(); 683 } 684 685 LIRItem left(x->x(), this); 686 LIRItem right(x->y(), this); 687 688 left.load_item(); 689 right.load_nonconstant(); 690 LIR_Opr reg = rlock_result(x); 691 692 logic_op(x->op(), reg, left.result(), right.result()); 693 } 694 695 696 697 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg 698 void LIRGenerator::do_CompareOp(CompareOp* x) { 699 LIRItem left(x->x(), this); 700 LIRItem right(x->y(), this); 701 ValueTag tag = x->x()->type()->tag(); 702 if (tag == longTag) { 703 left.set_destroys_register(); 704 } 705 left.load_item(); 706 right.load_item(); 707 LIR_Opr reg = rlock_result(x); 708 709 if (x->x()->type()->is_float_kind()) { 710 Bytecodes::Code code = x->op(); 711 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl)); 712 } else if (x->x()->type()->tag() == longTag) { 713 __ lcmp2int(left.result(), right.result(), reg); 714 } else { 715 Unimplemented(); 716 } 717 } 718 719 720 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) { 721 assert(x->number_of_arguments() == 4, "wrong type"); 722 LIRItem obj (x->argument_at(0), this); // object 723 LIRItem offset(x->argument_at(1), this); // offset of field 724 LIRItem cmp (x->argument_at(2), this); // value to compare with field 725 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp 726 727 assert(obj.type()->tag() == objectTag, "invalid type"); 728 729 // In 64bit the type can be long, sparc doesn't have this assert 730 // assert(offset.type()->tag() == intTag, "invalid type"); 731 732 assert(cmp.type()->tag() == type->tag(), "invalid type"); 733 assert(val.type()->tag() == type->tag(), "invalid type"); 734 735 // get address of field 736 obj.load_item(); 737 offset.load_nonconstant(); 738 739 LIR_Opr addr = new_pointer_register(); 740 LIR_Address* a; 741 if(offset.result()->is_constant()) { 742 #ifdef _LP64 743 jlong c = offset.result()->as_jlong(); 744 if ((jlong)((jint)c) == c) { 745 a = new LIR_Address(obj.result(), 746 (jint)c, 747 as_BasicType(type)); 748 } else { 749 LIR_Opr tmp = new_register(T_LONG); 750 __ move(offset.result(), tmp); 751 a = new LIR_Address(obj.result(), 752 tmp, 753 as_BasicType(type)); 754 } 755 #else 756 a = new LIR_Address(obj.result(), 757 offset.result()->as_jint(), 758 as_BasicType(type)); 759 #endif 760 } else { 761 a = new LIR_Address(obj.result(), 762 offset.result(), 763 LIR_Address::times_1, 764 0, 765 as_BasicType(type)); 766 } 767 __ leal(LIR_OprFact::address(a), addr); 768 769 if (type == objectType) { // Write-barrier needed for Object fields. 770 // Do the pre-write barrier, if any. 771 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */, 772 true /* do_load */, false /* patch */, NULL); 773 } 774 775 if (type == objectType) { 776 cmp.load_item_force(FrameMap::rax_oop_opr); 777 val.load_item(); 778 } else if (type == intType) { 779 cmp.load_item_force(FrameMap::rax_opr); 780 val.load_item(); 781 } else if (type == longType) { 782 cmp.load_item_force(FrameMap::long0_opr); 783 val.load_item_force(FrameMap::long1_opr); 784 } else { 785 ShouldNotReachHere(); 786 } 787 788 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience 789 if (type == objectType) 790 __ cas_obj(addr, cmp.result(), val.result(), ill, ill); 791 else if (type == intType) 792 __ cas_int(addr, cmp.result(), val.result(), ill, ill); 793 else if (type == longType) 794 __ cas_long(addr, cmp.result(), val.result(), ill, ill); 795 else { 796 ShouldNotReachHere(); 797 } 798 799 // generate conditional move of boolean result 800 LIR_Opr result = rlock_result(x); 801 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), 802 result, as_BasicType(type)); 803 if (type == objectType) { // Write-barrier needed for Object fields. 804 // Seems to be precise 805 post_barrier(addr, val.result()); 806 } 807 } 808 809 810 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) { 811 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type"); 812 813 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog || 814 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos || 815 x->id() == vmIntrinsics::_dsin) { 816 do_LibmIntrinsic(x); 817 return; 818 } 819 820 LIRItem value(x->argument_at(0), this); 821 822 bool use_fpu = false; 823 if (UseSSE >= 2) { 824 switch(x->id()) { 825 case vmIntrinsics::_dtan: 826 case vmIntrinsics::_dlog10: 827 use_fpu = true; 828 break; 829 } 830 } else { 831 value.set_destroys_register(); 832 } 833 834 value.load_item(); 835 836 LIR_Opr calc_input = value.result(); 837 LIR_Opr calc_input2 = NULL; 838 if (x->id() == vmIntrinsics::_dpow) { 839 LIRItem extra_arg(x->argument_at(1), this); 840 if (UseSSE < 2) { 841 extra_arg.set_destroys_register(); 842 } 843 extra_arg.load_item(); 844 calc_input2 = extra_arg.result(); 845 } 846 LIR_Opr calc_result = rlock_result(x); 847 848 // sin, cos, pow and exp need two free fpu stack slots, so register 849 // two temporary operands 850 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0); 851 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1); 852 853 if (use_fpu) { 854 LIR_Opr tmp = FrameMap::fpu0_double_opr; 855 int tmp_start = 1; 856 if (calc_input2 != NULL) { 857 __ move(calc_input2, tmp); 858 tmp_start = 2; 859 calc_input2 = tmp; 860 } 861 __ move(calc_input, tmp); 862 863 calc_input = tmp; 864 calc_result = tmp; 865 866 tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start); 867 tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1); 868 } 869 870 switch(x->id()) { 871 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break; 872 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break; 873 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break; 874 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break; 875 default: ShouldNotReachHere(); 876 } 877 878 if (use_fpu) { 879 __ move(calc_result, x->operand()); 880 } 881 } 882 883 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) { 884 LIRItem value(x->argument_at(0), this); 885 value.set_destroys_register(); 886 887 LIR_Opr calc_result = rlock_result(x); 888 LIR_Opr result_reg = result_register_for(x->type()); 889 890 CallingConvention* cc = NULL; 891 892 if (x->id() == vmIntrinsics::_dpow) { 893 LIRItem value1(x->argument_at(1), this); 894 895 value1.set_destroys_register(); 896 897 BasicTypeList signature(2); 898 signature.append(T_DOUBLE); 899 signature.append(T_DOUBLE); 900 cc = frame_map()->c_calling_convention(&signature); 901 value.load_item_force(cc->at(0)); 902 value1.load_item_force(cc->at(1)); 903 } else { 904 BasicTypeList signature(1); 905 signature.append(T_DOUBLE); 906 cc = frame_map()->c_calling_convention(&signature); 907 value.load_item_force(cc->at(0)); 908 } 909 910 #ifndef _LP64 911 LIR_Opr tmp = FrameMap::fpu0_double_opr; 912 result_reg = tmp; 913 switch(x->id()) { 914 case vmIntrinsics::_dexp: 915 if (VM_Version::supports_sse2()) { 916 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 917 } else { 918 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args()); 919 } 920 break; 921 case vmIntrinsics::_dlog: 922 if (VM_Version::supports_sse2()) { 923 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 924 } else { 925 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args()); 926 } 927 break; 928 case vmIntrinsics::_dpow: 929 if (VM_Version::supports_sse2()) { 930 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 931 } else { 932 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args()); 933 } 934 break; 935 case vmIntrinsics::_dsin: 936 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) { 937 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 938 } else { 939 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 940 } 941 break; 942 case vmIntrinsics::_dcos: 943 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) { 944 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 945 } else { 946 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 947 } 948 break; 949 default: ShouldNotReachHere(); 950 } 951 #else 952 switch (x->id()) { 953 case vmIntrinsics::_dexp: 954 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args()); 955 break; 956 case vmIntrinsics::_dlog: 957 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args()); 958 break; 959 case vmIntrinsics::_dpow: 960 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args()); 961 break; 962 case vmIntrinsics::_dsin: 963 if (StubRoutines::dsin() != NULL) { 964 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args()); 965 } else { 966 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args()); 967 } 968 break; 969 case vmIntrinsics::_dcos: 970 if (StubRoutines::dcos() != NULL) { 971 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args()); 972 } else { 973 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args()); 974 } 975 break; 976 default: ShouldNotReachHere(); 977 } 978 #endif // _LP64 979 __ move(result_reg, calc_result); 980 } 981 982 void LIRGenerator::do_ArrayCopy(Intrinsic* x) { 983 assert(x->number_of_arguments() == 5, "wrong type"); 984 985 // Make all state_for calls early since they can emit code 986 CodeEmitInfo* info = state_for(x, x->state()); 987 988 LIRItem src(x->argument_at(0), this); 989 LIRItem src_pos(x->argument_at(1), this); 990 LIRItem dst(x->argument_at(2), this); 991 LIRItem dst_pos(x->argument_at(3), this); 992 LIRItem length(x->argument_at(4), this); 993 994 // operands for arraycopy must use fixed registers, otherwise 995 // LinearScan will fail allocation (because arraycopy always needs a 996 // call) 997 998 #ifndef _LP64 999 src.load_item_force (FrameMap::rcx_oop_opr); 1000 src_pos.load_item_force (FrameMap::rdx_opr); 1001 dst.load_item_force (FrameMap::rax_oop_opr); 1002 dst_pos.load_item_force (FrameMap::rbx_opr); 1003 length.load_item_force (FrameMap::rdi_opr); 1004 LIR_Opr tmp = (FrameMap::rsi_opr); 1005 #else 1006 1007 // The java calling convention will give us enough registers 1008 // so that on the stub side the args will be perfect already. 1009 // On the other slow/special case side we call C and the arg 1010 // positions are not similar enough to pick one as the best. 1011 // Also because the java calling convention is a "shifted" version 1012 // of the C convention we can process the java args trivially into C 1013 // args without worry of overwriting during the xfer 1014 1015 src.load_item_force (FrameMap::as_oop_opr(j_rarg0)); 1016 src_pos.load_item_force (FrameMap::as_opr(j_rarg1)); 1017 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2)); 1018 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3)); 1019 length.load_item_force (FrameMap::as_opr(j_rarg4)); 1020 1021 LIR_Opr tmp = FrameMap::as_opr(j_rarg5); 1022 #endif // LP64 1023 1024 set_no_result(x); 1025 1026 int flags; 1027 ciArrayKlass* expected_type; 1028 arraycopy_helper(x, &flags, &expected_type); 1029 1030 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint 1031 } 1032 1033 void LIRGenerator::do_update_CRC32(Intrinsic* x) { 1034 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support"); 1035 // Make all state_for calls early since they can emit code 1036 LIR_Opr result = rlock_result(x); 1037 int flags = 0; 1038 switch (x->id()) { 1039 case vmIntrinsics::_updateCRC32: { 1040 LIRItem crc(x->argument_at(0), this); 1041 LIRItem val(x->argument_at(1), this); 1042 // val is destroyed by update_crc32 1043 val.set_destroys_register(); 1044 crc.load_item(); 1045 val.load_item(); 1046 __ update_crc32(crc.result(), val.result(), result); 1047 break; 1048 } 1049 case vmIntrinsics::_updateBytesCRC32: 1050 case vmIntrinsics::_updateByteBufferCRC32: { 1051 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32); 1052 1053 LIRItem crc(x->argument_at(0), this); 1054 LIRItem buf(x->argument_at(1), this); 1055 LIRItem off(x->argument_at(2), this); 1056 LIRItem len(x->argument_at(3), this); 1057 buf.load_item(); 1058 off.load_nonconstant(); 1059 1060 LIR_Opr index = off.result(); 1061 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0; 1062 if(off.result()->is_constant()) { 1063 index = LIR_OprFact::illegalOpr; 1064 offset += off.result()->as_jint(); 1065 } 1066 LIR_Opr base_op = buf.result(); 1067 1068 #ifndef _LP64 1069 if (!is_updateBytes) { // long b raw address 1070 base_op = new_register(T_INT); 1071 __ convert(Bytecodes::_l2i, buf.result(), base_op); 1072 } 1073 #else 1074 if (index->is_valid()) { 1075 LIR_Opr tmp = new_register(T_LONG); 1076 __ convert(Bytecodes::_i2l, index, tmp); 1077 index = tmp; 1078 } 1079 #endif 1080 1081 LIR_Address* a = new LIR_Address(base_op, 1082 index, 1083 LIR_Address::times_1, 1084 offset, 1085 T_BYTE); 1086 BasicTypeList signature(3); 1087 signature.append(T_INT); 1088 signature.append(T_ADDRESS); 1089 signature.append(T_INT); 1090 CallingConvention* cc = frame_map()->c_calling_convention(&signature); 1091 const LIR_Opr result_reg = result_register_for(x->type()); 1092 1093 LIR_Opr addr = new_pointer_register(); 1094 __ leal(LIR_OprFact::address(a), addr); 1095 1096 crc.load_item_force(cc->at(0)); 1097 __ move(addr, cc->at(1)); 1098 len.load_item_force(cc->at(2)); 1099 1100 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args()); 1101 __ move(result_reg, result); 1102 1103 break; 1104 } 1105 default: { 1106 ShouldNotReachHere(); 1107 } 1108 } 1109 } 1110 1111 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f 1112 // _i2b, _i2c, _i2s 1113 LIR_Opr fixed_register_for(BasicType type) { 1114 switch (type) { 1115 case T_FLOAT: return FrameMap::fpu0_float_opr; 1116 case T_DOUBLE: return FrameMap::fpu0_double_opr; 1117 case T_INT: return FrameMap::rax_opr; 1118 case T_LONG: return FrameMap::long0_opr; 1119 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr; 1120 } 1121 } 1122 1123 void LIRGenerator::do_Convert(Convert* x) { 1124 // flags that vary for the different operations and different SSE-settings 1125 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false; 1126 1127 switch (x->op()) { 1128 case Bytecodes::_i2l: // fall through 1129 case Bytecodes::_l2i: // fall through 1130 case Bytecodes::_i2b: // fall through 1131 case Bytecodes::_i2c: // fall through 1132 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1133 1134 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break; 1135 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break; 1136 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break; 1137 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break; 1138 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1139 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break; 1140 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break; 1141 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break; 1142 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1143 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break; 1144 default: ShouldNotReachHere(); 1145 } 1146 1147 LIRItem value(x->value(), this); 1148 value.load_item(); 1149 LIR_Opr input = value.result(); 1150 LIR_Opr result = rlock(x); 1151 1152 // arguments of lir_convert 1153 LIR_Opr conv_input = input; 1154 LIR_Opr conv_result = result; 1155 ConversionStub* stub = NULL; 1156 1157 if (fixed_input) { 1158 conv_input = fixed_register_for(input->type()); 1159 __ move(input, conv_input); 1160 } 1161 1162 assert(fixed_result == false || round_result == false, "cannot set both"); 1163 if (fixed_result) { 1164 conv_result = fixed_register_for(result->type()); 1165 } else if (round_result) { 1166 result = new_register(result->type()); 1167 set_vreg_flag(result, must_start_in_memory); 1168 } 1169 1170 if (needs_stub) { 1171 stub = new ConversionStub(x->op(), conv_input, conv_result); 1172 } 1173 1174 __ convert(x->op(), conv_input, conv_result, stub); 1175 1176 if (result != conv_result) { 1177 __ move(conv_result, result); 1178 } 1179 1180 assert(result->is_virtual(), "result must be virtual register"); 1181 set_result(x, result); 1182 } 1183 1184 1185 void LIRGenerator::do_NewInstance(NewInstance* x) { 1186 print_if_not_loaded(x); 1187 1188 CodeEmitInfo* info = state_for(x, x->state()); 1189 LIR_Opr reg = result_register_for(x->type()); 1190 new_instance(reg, x->klass(), x->is_unresolved(), 1191 FrameMap::rcx_oop_opr, 1192 FrameMap::rdi_oop_opr, 1193 FrameMap::rsi_oop_opr, 1194 LIR_OprFact::illegalOpr, 1195 FrameMap::rdx_metadata_opr, info); 1196 LIR_Opr result = rlock_result(x); 1197 __ move(reg, result); 1198 } 1199 1200 1201 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) { 1202 CodeEmitInfo* info = state_for(x, x->state()); 1203 1204 LIRItem length(x->length(), this); 1205 length.load_item_force(FrameMap::rbx_opr); 1206 1207 LIR_Opr reg = result_register_for(x->type()); 1208 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1209 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1210 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1211 LIR_Opr tmp4 = reg; 1212 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1213 LIR_Opr len = length.result(); 1214 BasicType elem_type = x->elt_type(); 1215 1216 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg); 1217 1218 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info); 1219 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path); 1220 1221 LIR_Opr result = rlock_result(x); 1222 __ move(reg, result); 1223 } 1224 1225 1226 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) { 1227 LIRItem length(x->length(), this); 1228 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction 1229 // and therefore provide the state before the parameters have been consumed 1230 CodeEmitInfo* patching_info = NULL; 1231 if (!x->klass()->is_loaded() || PatchALot) { 1232 patching_info = state_for(x, x->state_before()); 1233 } 1234 1235 CodeEmitInfo* info = state_for(x, x->state()); 1236 1237 const LIR_Opr reg = result_register_for(x->type()); 1238 LIR_Opr tmp1 = FrameMap::rcx_oop_opr; 1239 LIR_Opr tmp2 = FrameMap::rsi_oop_opr; 1240 LIR_Opr tmp3 = FrameMap::rdi_oop_opr; 1241 LIR_Opr tmp4 = reg; 1242 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr; 1243 1244 length.load_item_force(FrameMap::rbx_opr); 1245 LIR_Opr len = length.result(); 1246 1247 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info); 1248 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass()); 1249 if (obj == ciEnv::unloaded_ciobjarrayklass()) { 1250 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error"); 1251 } 1252 klass2reg_with_patching(klass_reg, obj, patching_info); 1253 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path); 1254 1255 LIR_Opr result = rlock_result(x); 1256 __ move(reg, result); 1257 } 1258 1259 1260 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) { 1261 Values* dims = x->dims(); 1262 int i = dims->length(); 1263 LIRItemList* items = new LIRItemList(i, i, NULL); 1264 while (i-- > 0) { 1265 LIRItem* size = new LIRItem(dims->at(i), this); 1266 items->at_put(i, size); 1267 } 1268 1269 // Evaluate state_for early since it may emit code. 1270 CodeEmitInfo* patching_info = NULL; 1271 if (!x->klass()->is_loaded() || PatchALot) { 1272 patching_info = state_for(x, x->state_before()); 1273 1274 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so 1275 // clone all handlers (NOTE: Usually this is handled transparently 1276 // by the CodeEmitInfo cloning logic in CodeStub constructors but 1277 // is done explicitly here because a stub isn't being used). 1278 x->set_exception_handlers(new XHandlers(x->exception_handlers())); 1279 } 1280 CodeEmitInfo* info = state_for(x, x->state()); 1281 1282 i = dims->length(); 1283 while (i-- > 0) { 1284 LIRItem* size = items->at(i); 1285 size->load_nonconstant(); 1286 1287 store_stack_parameter(size->result(), in_ByteSize(i*4)); 1288 } 1289 1290 LIR_Opr klass_reg = FrameMap::rax_metadata_opr; 1291 klass2reg_with_patching(klass_reg, x->klass(), patching_info); 1292 1293 LIR_Opr rank = FrameMap::rbx_opr; 1294 __ move(LIR_OprFact::intConst(x->rank()), rank); 1295 LIR_Opr varargs = FrameMap::rcx_opr; 1296 __ move(FrameMap::rsp_opr, varargs); 1297 LIR_OprList* args = new LIR_OprList(3); 1298 args->append(klass_reg); 1299 args->append(rank); 1300 args->append(varargs); 1301 LIR_Opr reg = result_register_for(x->type()); 1302 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id), 1303 LIR_OprFact::illegalOpr, 1304 reg, args, info); 1305 1306 LIR_Opr result = rlock_result(x); 1307 __ move(reg, result); 1308 } 1309 1310 1311 void LIRGenerator::do_BlockBegin(BlockBegin* x) { 1312 // nothing to do for now 1313 } 1314 1315 1316 void LIRGenerator::do_CheckCast(CheckCast* x) { 1317 LIRItem obj(x->obj(), this); 1318 1319 CodeEmitInfo* patching_info = NULL; 1320 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) { 1321 // must do this before locking the destination register as an oop register, 1322 // and before the obj is loaded (the latter is for deoptimization) 1323 patching_info = state_for(x, x->state_before()); 1324 } 1325 obj.load_item(); 1326 1327 // info for exceptions 1328 CodeEmitInfo* info_for_exception = state_for(x); 1329 1330 CodeStub* stub; 1331 if (x->is_incompatible_class_change_check()) { 1332 assert(patching_info == NULL, "can't patch this"); 1333 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception); 1334 } else { 1335 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception); 1336 } 1337 LIR_Opr reg = rlock_result(x); 1338 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1339 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1340 tmp3 = new_register(objectType); 1341 } 1342 __ checkcast(reg, obj.result(), x->klass(), 1343 new_register(objectType), new_register(objectType), tmp3, 1344 x->direct_compare(), info_for_exception, patching_info, stub, 1345 x->profiled_method(), x->profiled_bci()); 1346 } 1347 1348 1349 void LIRGenerator::do_InstanceOf(InstanceOf* x) { 1350 LIRItem obj(x->obj(), this); 1351 1352 // result and test object may not be in same register 1353 LIR_Opr reg = rlock_result(x); 1354 CodeEmitInfo* patching_info = NULL; 1355 if ((!x->klass()->is_loaded() || PatchALot)) { 1356 // must do this before locking the destination register as an oop register 1357 patching_info = state_for(x, x->state_before()); 1358 } 1359 obj.load_item(); 1360 LIR_Opr tmp3 = LIR_OprFact::illegalOpr; 1361 if (!x->klass()->is_loaded() || UseCompressedClassPointers) { 1362 tmp3 = new_register(objectType); 1363 } 1364 __ instanceof(reg, obj.result(), x->klass(), 1365 new_register(objectType), new_register(objectType), tmp3, 1366 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci()); 1367 } 1368 1369 1370 void LIRGenerator::do_If(If* x) { 1371 assert(x->number_of_sux() == 2, "inconsistency"); 1372 ValueTag tag = x->x()->type()->tag(); 1373 bool is_safepoint = x->is_safepoint(); 1374 1375 If::Condition cond = x->cond(); 1376 1377 LIRItem xitem(x->x(), this); 1378 LIRItem yitem(x->y(), this); 1379 LIRItem* xin = &xitem; 1380 LIRItem* yin = &yitem; 1381 1382 if (tag == longTag) { 1383 // for longs, only conditions "eql", "neq", "lss", "geq" are valid; 1384 // mirror for other conditions 1385 if (cond == If::gtr || cond == If::leq) { 1386 cond = Instruction::mirror(cond); 1387 xin = &yitem; 1388 yin = &xitem; 1389 } 1390 xin->set_destroys_register(); 1391 } 1392 xin->load_item(); 1393 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) { 1394 // inline long zero 1395 yin->dont_load_item(); 1396 } else if (tag == longTag || tag == floatTag || tag == doubleTag) { 1397 // longs cannot handle constants at right side 1398 yin->load_item(); 1399 } else { 1400 yin->dont_load_item(); 1401 } 1402 1403 // add safepoint before generating condition code so it can be recomputed 1404 if (x->is_safepoint()) { 1405 // increment backedge counter if needed 1406 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci()); 1407 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before())); 1408 } 1409 set_no_result(x); 1410 1411 LIR_Opr left = xin->result(); 1412 LIR_Opr right = yin->result(); 1413 __ cmp(lir_cond(cond), left, right); 1414 // Generate branch profiling. Profiling code doesn't kill flags. 1415 profile_branch(x, cond); 1416 move_to_phi(x->state()); 1417 if (x->x()->type()->is_float_kind()) { 1418 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux()); 1419 } else { 1420 __ branch(lir_cond(cond), right->type(), x->tsux()); 1421 } 1422 assert(x->default_sux() == x->fsux(), "wrong destination above"); 1423 __ jump(x->default_sux()); 1424 } 1425 1426 1427 LIR_Opr LIRGenerator::getThreadPointer() { 1428 #ifdef _LP64 1429 return FrameMap::as_pointer_opr(r15_thread); 1430 #else 1431 LIR_Opr result = new_register(T_INT); 1432 __ get_thread(result); 1433 return result; 1434 #endif // 1435 } 1436 1437 void LIRGenerator::trace_block_entry(BlockBegin* block) { 1438 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0)); 1439 LIR_OprList* args = new LIR_OprList(); 1440 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry); 1441 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args); 1442 } 1443 1444 1445 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address, 1446 CodeEmitInfo* info) { 1447 if (address->type() == T_LONG) { 1448 address = new LIR_Address(address->base(), 1449 address->index(), address->scale(), 1450 address->disp(), T_DOUBLE); 1451 // Transfer the value atomically by using FP moves. This means 1452 // the value has to be moved between CPU and FPU registers. It 1453 // always has to be moved through spill slot since there's no 1454 // quick way to pack the value into an SSE register. 1455 LIR_Opr temp_double = new_register(T_DOUBLE); 1456 LIR_Opr spill = new_register(T_LONG); 1457 set_vreg_flag(spill, must_start_in_memory); 1458 __ move(value, spill); 1459 __ volatile_move(spill, temp_double, T_LONG); 1460 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info); 1461 } else { 1462 __ store(value, address, info); 1463 } 1464 } 1465 1466 1467 1468 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result, 1469 CodeEmitInfo* info) { 1470 if (address->type() == T_LONG) { 1471 address = new LIR_Address(address->base(), 1472 address->index(), address->scale(), 1473 address->disp(), T_DOUBLE); 1474 // Transfer the value atomically by using FP moves. This means 1475 // the value has to be moved between CPU and FPU registers. In 1476 // SSE0 and SSE1 mode it has to be moved through spill slot but in 1477 // SSE2+ mode it can be moved directly. 1478 LIR_Opr temp_double = new_register(T_DOUBLE); 1479 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info); 1480 __ volatile_move(temp_double, result, T_LONG); 1481 if (UseSSE < 2) { 1482 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible 1483 set_vreg_flag(result, must_start_in_memory); 1484 } 1485 } else { 1486 __ load(address, result, info); 1487 } 1488 } 1489 1490 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset, 1491 BasicType type, bool is_volatile) { 1492 if (is_volatile && type == T_LONG) { 1493 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); 1494 LIR_Opr tmp = new_register(T_DOUBLE); 1495 __ load(addr, tmp); 1496 LIR_Opr spill = new_register(T_LONG); 1497 set_vreg_flag(spill, must_start_in_memory); 1498 __ move(tmp, spill); 1499 __ move(spill, dst); 1500 } else { 1501 LIR_Address* addr = new LIR_Address(src, offset, type); 1502 __ load(addr, dst); 1503 } 1504 } 1505 1506 1507 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data, 1508 BasicType type, bool is_volatile) { 1509 if (is_volatile && type == T_LONG) { 1510 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE); 1511 LIR_Opr tmp = new_register(T_DOUBLE); 1512 LIR_Opr spill = new_register(T_DOUBLE); 1513 set_vreg_flag(spill, must_start_in_memory); 1514 __ move(data, spill); 1515 __ move(spill, tmp); 1516 __ move(tmp, addr); 1517 } else { 1518 LIR_Address* addr = new LIR_Address(src, offset, type); 1519 bool is_obj = (type == T_ARRAY || type == T_OBJECT); 1520 if (is_obj) { 1521 // Do the pre-write barrier, if any. 1522 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, 1523 true /* do_load */, false /* patch */, NULL); 1524 __ move(data, addr); 1525 assert(src->is_register(), "must be register"); 1526 // Seems to be a precise address 1527 post_barrier(LIR_OprFact::address(addr), data); 1528 } else { 1529 __ move(data, addr); 1530 } 1531 } 1532 } 1533 1534 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) { 1535 BasicType type = x->basic_type(); 1536 LIRItem src(x->object(), this); 1537 LIRItem off(x->offset(), this); 1538 LIRItem value(x->value(), this); 1539 1540 src.load_item(); 1541 value.load_item(); 1542 off.load_nonconstant(); 1543 1544 LIR_Opr dst = rlock_result(x, type); 1545 LIR_Opr data = value.result(); 1546 bool is_obj = (type == T_ARRAY || type == T_OBJECT); 1547 LIR_Opr offset = off.result(); 1548 1549 assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type"); 1550 LIR_Address* addr; 1551 if (offset->is_constant()) { 1552 #ifdef _LP64 1553 jlong c = offset->as_jlong(); 1554 if ((jlong)((jint)c) == c) { 1555 addr = new LIR_Address(src.result(), (jint)c, type); 1556 } else { 1557 LIR_Opr tmp = new_register(T_LONG); 1558 __ move(offset, tmp); 1559 addr = new LIR_Address(src.result(), tmp, type); 1560 } 1561 #else 1562 addr = new LIR_Address(src.result(), offset->as_jint(), type); 1563 #endif 1564 } else { 1565 addr = new LIR_Address(src.result(), offset, type); 1566 } 1567 1568 // Because we want a 2-arg form of xchg and xadd 1569 __ move(data, dst); 1570 1571 if (x->is_add()) { 1572 __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr); 1573 } else { 1574 if (is_obj) { 1575 // Do the pre-write barrier, if any. 1576 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */, 1577 true /* do_load */, false /* patch */, NULL); 1578 } 1579 __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr); 1580 if (is_obj) { 1581 // Seems to be a precise address 1582 post_barrier(LIR_OprFact::address(addr), data); 1583 } 1584 } 1585 }