1 /*
   2  * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef SHARE_VM_C1_C1_LIR_HPP
  26 #define SHARE_VM_C1_C1_LIR_HPP
  27 
  28 #include "c1/c1_Defs.hpp"
  29 #include "c1/c1_ValueType.hpp"
  30 #include "oops/method.hpp"
  31 
  32 class BlockBegin;
  33 class BlockList;
  34 class LIR_Assembler;
  35 class CodeEmitInfo;
  36 class CodeStub;
  37 class CodeStubList;
  38 class ArrayCopyStub;
  39 class LIR_Op;
  40 class ciType;
  41 class ValueType;
  42 class LIR_OpVisitState;
  43 class FpuStackSim;
  44 
  45 //---------------------------------------------------------------------
  46 //                 LIR Operands
  47 //  LIR_OprDesc
  48 //    LIR_OprPtr
  49 //      LIR_Const
  50 //      LIR_Address
  51 //---------------------------------------------------------------------
  52 class LIR_OprDesc;
  53 class LIR_OprPtr;
  54 class LIR_Const;
  55 class LIR_Address;
  56 class LIR_OprVisitor;
  57 
  58 
  59 typedef LIR_OprDesc* LIR_Opr;
  60 typedef int          RegNr;
  61 
  62 typedef GrowableArray<LIR_Opr> LIR_OprList;
  63 typedef GrowableArray<LIR_Op*> LIR_OpArray;
  64 typedef GrowableArray<LIR_Op*> LIR_OpList;
  65 
  66 // define LIR_OprPtr early so LIR_OprDesc can refer to it
  67 class LIR_OprPtr: public CompilationResourceObj {
  68  public:
  69   bool is_oop_pointer() const                    { return (type() == T_OBJECT); }
  70   bool is_float_kind() const                     { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
  71 
  72   virtual LIR_Const*  as_constant()              { return NULL; }
  73   virtual LIR_Address* as_address()              { return NULL; }
  74   virtual BasicType type() const                 = 0;
  75   virtual void print_value_on(outputStream* out) const = 0;
  76 };
  77 
  78 
  79 
  80 // LIR constants
  81 class LIR_Const: public LIR_OprPtr {
  82  private:
  83   JavaValue _value;
  84 
  85   void type_check(BasicType t) const   { assert(type() == t, "type check"); }
  86   void type_check(BasicType t1, BasicType t2) const   { assert(type() == t1 || type() == t2, "type check"); }
  87   void type_check(BasicType t1, BasicType t2, BasicType t3) const   { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
  88 
  89  public:
  90   LIR_Const(jint i, bool is_address=false)       { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
  91   LIR_Const(jlong l)                             { _value.set_type(T_LONG);    _value.set_jlong(l); }
  92   LIR_Const(jfloat f)                            { _value.set_type(T_FLOAT);   _value.set_jfloat(f); }
  93   LIR_Const(jdouble d)                           { _value.set_type(T_DOUBLE);  _value.set_jdouble(d); }
  94   LIR_Const(jobject o)                           { _value.set_type(T_OBJECT);  _value.set_jobject(o); }
  95   LIR_Const(void* p) {
  96 #ifdef _LP64
  97     assert(sizeof(jlong) >= sizeof(p), "too small");;
  98     _value.set_type(T_LONG);    _value.set_jlong((jlong)p);
  99 #else
 100     assert(sizeof(jint) >= sizeof(p), "too small");;
 101     _value.set_type(T_INT);     _value.set_jint((jint)p);
 102 #endif
 103   }
 104   LIR_Const(Metadata* m) {
 105     _value.set_type(T_METADATA);
 106 #ifdef _LP64
 107     _value.set_jlong((jlong)m);
 108 #else
 109     _value.set_jint((jint)m);
 110 #endif // _LP64
 111   }
 112 
 113   virtual BasicType type()       const { return _value.get_type(); }
 114   virtual LIR_Const* as_constant()     { return this; }
 115 
 116   jint      as_jint()    const         { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
 117   jlong     as_jlong()   const         { type_check(T_LONG  ); return _value.get_jlong(); }
 118   jfloat    as_jfloat()  const         { type_check(T_FLOAT ); return _value.get_jfloat(); }
 119   jdouble   as_jdouble() const         { type_check(T_DOUBLE); return _value.get_jdouble(); }
 120   jobject   as_jobject() const         { type_check(T_OBJECT); return _value.get_jobject(); }
 121   jint      as_jint_lo() const         { type_check(T_LONG  ); return low(_value.get_jlong()); }
 122   jint      as_jint_hi() const         { type_check(T_LONG  ); return high(_value.get_jlong()); }
 123 
 124 #ifdef _LP64
 125   address   as_pointer() const         { type_check(T_LONG  ); return (address)_value.get_jlong(); }
 126   Metadata* as_metadata() const        { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); }
 127 #else
 128   address   as_pointer() const         { type_check(T_INT   ); return (address)_value.get_jint(); }
 129   Metadata* as_metadata() const        { type_check(T_METADATA); return (Metadata*)_value.get_jint(); }
 130 #endif
 131 
 132 
 133   jint      as_jint_bits() const       { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
 134   jint      as_jint_lo_bits() const    {
 135     if (type() == T_DOUBLE) {
 136       return low(jlong_cast(_value.get_jdouble()));
 137     } else {
 138       return as_jint_lo();
 139     }
 140   }
 141   jint      as_jint_hi_bits() const    {
 142     if (type() == T_DOUBLE) {
 143       return high(jlong_cast(_value.get_jdouble()));
 144     } else {
 145       return as_jint_hi();
 146     }
 147   }
 148   jlong      as_jlong_bits() const    {
 149     if (type() == T_DOUBLE) {
 150       return jlong_cast(_value.get_jdouble());
 151     } else {
 152       return as_jlong();
 153     }
 154   }
 155 
 156   virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
 157 
 158 
 159   bool is_zero_float() {
 160     jfloat f = as_jfloat();
 161     jfloat ok = 0.0f;
 162     return jint_cast(f) == jint_cast(ok);
 163   }
 164 
 165   bool is_one_float() {
 166     jfloat f = as_jfloat();
 167     return !g_isnan(f) && g_isfinite(f) && f == 1.0;
 168   }
 169 
 170   bool is_zero_double() {
 171     jdouble d = as_jdouble();
 172     jdouble ok = 0.0;
 173     return jlong_cast(d) == jlong_cast(ok);
 174   }
 175 
 176   bool is_one_double() {
 177     jdouble d = as_jdouble();
 178     return !g_isnan(d) && g_isfinite(d) && d == 1.0;
 179   }
 180 };
 181 
 182 
 183 //---------------------LIR Operand descriptor------------------------------------
 184 //
 185 // The class LIR_OprDesc represents a LIR instruction operand;
 186 // it can be a register (ALU/FPU), stack location or a constant;
 187 // Constants and addresses are represented as resource area allocated
 188 // structures (see above).
 189 // Registers and stack locations are inlined into the this pointer
 190 // (see value function).
 191 
 192 class LIR_OprDesc: public CompilationResourceObj {
 193  public:
 194   // value structure:
 195   //     data       opr-type opr-kind
 196   // +--------------+-------+-------+
 197   // [max...........|7 6 5 4|3 2 1 0]
 198   //                             ^
 199   //                    is_pointer bit
 200   //
 201   // lowest bit cleared, means it is a structure pointer
 202   // we need  4 bits to represent types
 203 
 204  private:
 205   friend class LIR_OprFact;
 206 
 207   // Conversion
 208   intptr_t value() const                         { return (intptr_t) this; }
 209 
 210   bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
 211     return (value() & mask) == masked_value;
 212   }
 213 
 214   enum OprKind {
 215       pointer_value      = 0
 216     , stack_value        = 1
 217     , cpu_register       = 3
 218     , fpu_register       = 5
 219     , illegal_value      = 7
 220   };
 221 
 222   enum OprBits {
 223       pointer_bits   = 1
 224     , kind_bits      = 3
 225     , type_bits      = 4
 226     , size_bits      = 2
 227     , destroys_bits  = 1
 228     , virtual_bits   = 1
 229     , is_xmm_bits    = 1
 230     , last_use_bits  = 1
 231     , is_fpu_stack_offset_bits = 1        // used in assertion checking on x86 for FPU stack slot allocation
 232     , non_data_bits  = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
 233                        is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
 234     , data_bits      = BitsPerInt - non_data_bits
 235     , reg_bits       = data_bits / 2      // for two registers in one value encoding
 236   };
 237 
 238   enum OprShift {
 239       kind_shift     = 0
 240     , type_shift     = kind_shift     + kind_bits
 241     , size_shift     = type_shift     + type_bits
 242     , destroys_shift = size_shift     + size_bits
 243     , last_use_shift = destroys_shift + destroys_bits
 244     , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
 245     , virtual_shift  = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
 246     , is_xmm_shift   = virtual_shift + virtual_bits
 247     , data_shift     = is_xmm_shift + is_xmm_bits
 248     , reg1_shift = data_shift
 249     , reg2_shift = data_shift + reg_bits
 250 
 251   };
 252 
 253   enum OprSize {
 254       single_size = 0 << size_shift
 255     , double_size = 1 << size_shift
 256   };
 257 
 258   enum OprMask {
 259       kind_mask      = right_n_bits(kind_bits)
 260     , type_mask      = right_n_bits(type_bits) << type_shift
 261     , size_mask      = right_n_bits(size_bits) << size_shift
 262     , last_use_mask  = right_n_bits(last_use_bits) << last_use_shift
 263     , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
 264     , virtual_mask   = right_n_bits(virtual_bits) << virtual_shift
 265     , is_xmm_mask    = right_n_bits(is_xmm_bits) << is_xmm_shift
 266     , pointer_mask   = right_n_bits(pointer_bits)
 267     , lower_reg_mask = right_n_bits(reg_bits)
 268     , no_type_mask   = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
 269   };
 270 
 271   uintptr_t data() const                         { return value() >> data_shift; }
 272   int lo_reg_half() const                        { return data() & lower_reg_mask; }
 273   int hi_reg_half() const                        { return (data() >> reg_bits) & lower_reg_mask; }
 274   OprKind kind_field() const                     { return (OprKind)(value() & kind_mask); }
 275   OprSize size_field() const                     { return (OprSize)(value() & size_mask); }
 276 
 277   static char type_char(BasicType t);
 278 
 279  public:
 280   enum {
 281     vreg_base = ConcreteRegisterImpl::number_of_registers,
 282     vreg_max = (1 << data_bits) - 1
 283   };
 284 
 285   static inline LIR_Opr illegalOpr();
 286 
 287   enum OprType {
 288       unknown_type  = 0 << type_shift    // means: not set (catch uninitialized types)
 289     , int_type      = 1 << type_shift
 290     , long_type     = 2 << type_shift
 291     , object_type   = 3 << type_shift
 292     , address_type  = 4 << type_shift
 293     , float_type    = 5 << type_shift
 294     , double_type   = 6 << type_shift
 295     , metadata_type = 7 << type_shift
 296   };
 297   friend OprType as_OprType(BasicType t);
 298   friend BasicType as_BasicType(OprType t);
 299 
 300   OprType type_field_valid() const               { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
 301   OprType type_field() const                     { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
 302 
 303   static OprSize size_for(BasicType t) {
 304     switch (t) {
 305       case T_LONG:
 306       case T_DOUBLE:
 307         return double_size;
 308         break;
 309 
 310       case T_FLOAT:
 311       case T_BOOLEAN:
 312       case T_CHAR:
 313       case T_BYTE:
 314       case T_SHORT:
 315       case T_INT:
 316       case T_ADDRESS:
 317       case T_OBJECT:
 318       case T_ARRAY:
 319       case T_METADATA:
 320         return single_size;
 321         break;
 322 
 323       default:
 324         ShouldNotReachHere();
 325         return single_size;
 326       }
 327   }
 328 
 329 
 330   void validate_type() const PRODUCT_RETURN;
 331 
 332   BasicType type() const {
 333     if (is_pointer()) {
 334       return pointer()->type();
 335     }
 336     return as_BasicType(type_field());
 337   }
 338 
 339 
 340   ValueType* value_type() const                  { return as_ValueType(type()); }
 341 
 342   char type_char() const                         { return type_char((is_pointer()) ? pointer()->type() : type()); }
 343 
 344   bool is_equal(LIR_Opr opr) const         { return this == opr; }
 345   // checks whether types are same
 346   bool is_same_type(LIR_Opr opr) const     {
 347     assert(type_field() != unknown_type &&
 348            opr->type_field() != unknown_type, "shouldn't see unknown_type");
 349     return type_field() == opr->type_field();
 350   }
 351   bool is_same_register(LIR_Opr opr) {
 352     return (is_register() && opr->is_register() &&
 353             kind_field() == opr->kind_field() &&
 354             (value() & no_type_mask) == (opr->value() & no_type_mask));
 355   }
 356 
 357   bool is_pointer() const      { return check_value_mask(pointer_mask, pointer_value); }
 358   bool is_illegal() const      { return kind_field() == illegal_value; }
 359   bool is_valid() const        { return kind_field() != illegal_value; }
 360 
 361   bool is_register() const     { return is_cpu_register() || is_fpu_register(); }
 362   bool is_virtual() const      { return is_virtual_cpu()  || is_virtual_fpu();  }
 363 
 364   bool is_constant() const     { return is_pointer() && pointer()->as_constant() != NULL; }
 365   bool is_address() const      { return is_pointer() && pointer()->as_address() != NULL; }
 366 
 367   bool is_float_kind() const   { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
 368   bool is_oop() const;
 369 
 370   // semantic for fpu- and xmm-registers:
 371   // * is_float and is_double return true for xmm_registers
 372   //   (so is_single_fpu and is_single_xmm are true)
 373   // * So you must always check for is_???_xmm prior to is_???_fpu to
 374   //   distinguish between fpu- and xmm-registers
 375 
 376   bool is_stack() const        { validate_type(); return check_value_mask(kind_mask,                stack_value);                 }
 377   bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask,    stack_value  | single_size);  }
 378   bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask,    stack_value  | double_size);  }
 379 
 380   bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask,                cpu_register);                }
 381   bool is_virtual_cpu() const  { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
 382   bool is_fixed_cpu() const    { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register);                }
 383   bool is_single_cpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    cpu_register | single_size);  }
 384   bool is_double_cpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    cpu_register | double_size);  }
 385 
 386   bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask,                fpu_register);                }
 387   bool is_virtual_fpu() const  { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
 388   bool is_fixed_fpu() const    { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register);                }
 389   bool is_single_fpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    fpu_register | single_size);  }
 390   bool is_double_fpu() const   { validate_type(); return check_value_mask(kind_mask | size_mask,    fpu_register | double_size);  }
 391 
 392   bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask,             fpu_register | is_xmm_mask); }
 393   bool is_single_xmm() const   { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
 394   bool is_double_xmm() const   { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
 395 
 396   // fast accessor functions for special bits that do not work for pointers
 397   // (in this functions, the check for is_pointer() is omitted)
 398   bool is_single_word() const      { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
 399   bool is_double_word() const      { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
 400   bool is_virtual_register() const { assert(is_register(),               "type check"); return check_value_mask(virtual_mask, virtual_mask); }
 401   bool is_oop_register() const     { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
 402   BasicType type_register() const  { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid());  }
 403 
 404   bool is_last_use() const         { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
 405   bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
 406   LIR_Opr make_last_use()          { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
 407   LIR_Opr make_fpu_stack_offset()  { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
 408 
 409 
 410   int single_stack_ix() const  { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
 411   int double_stack_ix() const  { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
 412   RegNr cpu_regnr() const      { assert(is_single_cpu()   && !is_virtual(), "type check"); return (RegNr)data(); }
 413   RegNr cpu_regnrLo() const    { assert(is_double_cpu()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
 414   RegNr cpu_regnrHi() const    { assert(is_double_cpu()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
 415   RegNr fpu_regnr() const      { assert(is_single_fpu()   && !is_virtual(), "type check"); return (RegNr)data(); }
 416   RegNr fpu_regnrLo() const    { assert(is_double_fpu()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
 417   RegNr fpu_regnrHi() const    { assert(is_double_fpu()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
 418   RegNr xmm_regnr() const      { assert(is_single_xmm()   && !is_virtual(), "type check"); return (RegNr)data(); }
 419   RegNr xmm_regnrLo() const    { assert(is_double_xmm()   && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
 420   RegNr xmm_regnrHi() const    { assert(is_double_xmm()   && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
 421   int   vreg_number() const    { assert(is_virtual(),                       "type check"); return (RegNr)data(); }
 422 
 423   LIR_OprPtr* pointer()  const                   { assert(is_pointer(), "type check");      return (LIR_OprPtr*)this; }
 424   LIR_Const* as_constant_ptr() const             { return pointer()->as_constant(); }
 425   LIR_Address* as_address_ptr() const            { return pointer()->as_address(); }
 426 
 427   Register as_register()    const;
 428   Register as_register_lo() const;
 429   Register as_register_hi() const;
 430 
 431   Register as_pointer_register() {
 432 #ifdef _LP64
 433     if (is_double_cpu()) {
 434       assert(as_register_lo() == as_register_hi(), "should be a single register");
 435       return as_register_lo();
 436     }
 437 #endif
 438     return as_register();
 439   }
 440 
 441 #ifdef X86
 442   XMMRegister as_xmm_float_reg() const;
 443   XMMRegister as_xmm_double_reg() const;
 444   // for compatibility with RInfo
 445   int fpu () const                                  { return lo_reg_half(); }
 446 #endif
 447 #if defined(SPARC) || defined(ARM) || defined(PPC) || defined(AARCH64)
 448   FloatRegister as_float_reg   () const;
 449   FloatRegister as_double_reg  () const;
 450 #endif
 451 
 452   jint      as_jint()    const { return as_constant_ptr()->as_jint(); }
 453   jlong     as_jlong()   const { return as_constant_ptr()->as_jlong(); }
 454   jfloat    as_jfloat()  const { return as_constant_ptr()->as_jfloat(); }
 455   jdouble   as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
 456   jobject   as_jobject() const { return as_constant_ptr()->as_jobject(); }
 457 
 458   void print() const PRODUCT_RETURN;
 459   void print(outputStream* out) const PRODUCT_RETURN;
 460 };
 461 
 462 
 463 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
 464   switch (type) {
 465   case T_INT:      return LIR_OprDesc::int_type;
 466   case T_LONG:     return LIR_OprDesc::long_type;
 467   case T_FLOAT:    return LIR_OprDesc::float_type;
 468   case T_DOUBLE:   return LIR_OprDesc::double_type;
 469   case T_OBJECT:
 470   case T_ARRAY:    return LIR_OprDesc::object_type;
 471   case T_ADDRESS:  return LIR_OprDesc::address_type;
 472   case T_METADATA: return LIR_OprDesc::metadata_type;
 473   case T_ILLEGAL:  // fall through
 474   default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
 475   }
 476 }
 477 
 478 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
 479   switch (t) {
 480   case LIR_OprDesc::int_type:     return T_INT;
 481   case LIR_OprDesc::long_type:    return T_LONG;
 482   case LIR_OprDesc::float_type:   return T_FLOAT;
 483   case LIR_OprDesc::double_type:  return T_DOUBLE;
 484   case LIR_OprDesc::object_type:  return T_OBJECT;
 485   case LIR_OprDesc::address_type: return T_ADDRESS;
 486   case LIR_OprDesc::metadata_type:return T_METADATA;
 487   case LIR_OprDesc::unknown_type: // fall through
 488   default: ShouldNotReachHere();  return T_ILLEGAL;
 489   }
 490 }
 491 
 492 
 493 // LIR_Address
 494 class LIR_Address: public LIR_OprPtr {
 495  friend class LIR_OpVisitState;
 496 
 497  public:
 498   // NOTE: currently these must be the log2 of the scale factor (and
 499   // must also be equivalent to the ScaleFactor enum in
 500   // assembler_i486.hpp)
 501   enum Scale {
 502     times_1  =  0,
 503     times_2  =  1,
 504     times_4  =  2,
 505     times_8  =  3
 506   };
 507 
 508  private:
 509   LIR_Opr   _base;
 510   LIR_Opr   _index;
 511   Scale     _scale;
 512   intx      _disp;
 513   BasicType _type;
 514 
 515  public:
 516   LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
 517        _base(base)
 518      , _index(index)
 519      , _scale(times_1)
 520      , _type(type)
 521      , _disp(0) { verify(); }
 522 
 523   LIR_Address(LIR_Opr base, intx disp, BasicType type):
 524        _base(base)
 525      , _index(LIR_OprDesc::illegalOpr())
 526      , _scale(times_1)
 527      , _type(type)
 528      , _disp(disp) { verify(); }
 529 
 530   LIR_Address(LIR_Opr base, BasicType type):
 531        _base(base)
 532      , _index(LIR_OprDesc::illegalOpr())
 533      , _scale(times_1)
 534      , _type(type)
 535      , _disp(0) { verify(); }
 536 
 537 #if defined(X86) || defined(ARM) || defined(AARCH64)
 538   LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
 539        _base(base)
 540      , _index(index)
 541      , _scale(scale)
 542      , _type(type)
 543      , _disp(disp) { verify(); }
 544 #endif // X86 || ARM
 545 
 546   LIR_Opr base()  const                          { return _base;  }
 547   LIR_Opr index() const                          { return _index; }
 548   Scale   scale() const                          { return _scale; }
 549   intx    disp()  const                          { return _disp;  }
 550 
 551   bool equals(LIR_Address* other) const          { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
 552 
 553   virtual LIR_Address* as_address()              { return this;   }
 554   virtual BasicType type() const                 { return _type; }
 555   virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
 556 
 557   void verify0() const PRODUCT_RETURN;
 558 #if defined(LIR_ADDRESS_PD_VERIFY) && !defined(PRODUCT)
 559   void pd_verify() const;
 560   void verify() const { pd_verify(); }
 561 #else
 562   void verify() const { verify0(); }
 563 #endif
 564 
 565   static Scale scale(BasicType type);
 566 };
 567 
 568 
 569 // operand factory
 570 class LIR_OprFact: public AllStatic {
 571  public:
 572 
 573   static LIR_Opr illegalOpr;
 574 
 575   static LIR_Opr single_cpu(int reg) {
 576     return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 577                                LIR_OprDesc::int_type             |
 578                                LIR_OprDesc::cpu_register         |
 579                                LIR_OprDesc::single_size);
 580   }
 581   static LIR_Opr single_cpu_oop(int reg) {
 582     return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 583                                LIR_OprDesc::object_type          |
 584                                LIR_OprDesc::cpu_register         |
 585                                LIR_OprDesc::single_size);
 586   }
 587   static LIR_Opr single_cpu_address(int reg) {
 588     return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 589                                LIR_OprDesc::address_type         |
 590                                LIR_OprDesc::cpu_register         |
 591                                LIR_OprDesc::single_size);
 592   }
 593   static LIR_Opr single_cpu_metadata(int reg) {
 594     return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 595                                LIR_OprDesc::metadata_type        |
 596                                LIR_OprDesc::cpu_register         |
 597                                LIR_OprDesc::single_size);
 598   }
 599   static LIR_Opr double_cpu(int reg1, int reg2) {
 600     LP64_ONLY(assert(reg1 == reg2, "must be identical"));
 601     return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
 602                                (reg2 << LIR_OprDesc::reg2_shift) |
 603                                LIR_OprDesc::long_type            |
 604                                LIR_OprDesc::cpu_register         |
 605                                LIR_OprDesc::double_size);
 606   }
 607 
 608   static LIR_Opr single_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 609                                                                              LIR_OprDesc::float_type           |
 610                                                                              LIR_OprDesc::fpu_register         |
 611                                                                              LIR_OprDesc::single_size); }
 612 #if defined(ARM32)
 613   static LIR_Opr double_fpu(int reg1, int reg2)    { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
 614   static LIR_Opr single_softfp(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift) |                                     LIR_OprDesc::float_type  | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
 615   static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
 616 #endif
 617 #ifdef SPARC
 618   static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
 619                                                                              (reg2 << LIR_OprDesc::reg2_shift) |
 620                                                                              LIR_OprDesc::double_type          |
 621                                                                              LIR_OprDesc::fpu_register         |
 622                                                                              LIR_OprDesc::double_size); }
 623 #endif
 624 #if defined(X86) || defined(AARCH64)
 625   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 626                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 627                                                                              LIR_OprDesc::double_type          |
 628                                                                              LIR_OprDesc::fpu_register         |
 629                                                                              LIR_OprDesc::double_size); }
 630 
 631   static LIR_Opr single_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 632                                                                              LIR_OprDesc::float_type           |
 633                                                                              LIR_OprDesc::fpu_register         |
 634                                                                              LIR_OprDesc::single_size          |
 635                                                                              LIR_OprDesc::is_xmm_mask); }
 636   static LIR_Opr double_xmm(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 637                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 638                                                                              LIR_OprDesc::double_type          |
 639                                                                              LIR_OprDesc::fpu_register         |
 640                                                                              LIR_OprDesc::double_size          |
 641                                                                              LIR_OprDesc::is_xmm_mask); }
 642 #endif // X86
 643 #if defined(PPC)
 644   static LIR_Opr double_fpu(int reg)            { return (LIR_Opr)(intptr_t)((reg  << LIR_OprDesc::reg1_shift) |
 645                                                                              (reg  << LIR_OprDesc::reg2_shift) |
 646                                                                              LIR_OprDesc::double_type          |
 647                                                                              LIR_OprDesc::fpu_register         |
 648                                                                              LIR_OprDesc::double_size); }
 649 #endif
 650 #ifdef PPC32
 651   static LIR_Opr single_softfp(int reg)            { return (LIR_Opr)((reg  << LIR_OprDesc::reg1_shift)        |
 652                                                                              LIR_OprDesc::float_type           |
 653                                                                              LIR_OprDesc::cpu_register         |
 654                                                                              LIR_OprDesc::single_size); }
 655   static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift)        |
 656                                                                              (reg1 << LIR_OprDesc::reg2_shift) |
 657                                                                              LIR_OprDesc::double_type          |
 658                                                                              LIR_OprDesc::cpu_register         |
 659                                                                              LIR_OprDesc::double_size); }
 660 #endif // PPC32
 661 
 662   static LIR_Opr virtual_register(int index, BasicType type) {
 663     LIR_Opr res;
 664     switch (type) {
 665       case T_OBJECT: // fall through
 666       case T_ARRAY:
 667         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
 668                                             LIR_OprDesc::object_type  |
 669                                             LIR_OprDesc::cpu_register |
 670                                             LIR_OprDesc::single_size  |
 671                                             LIR_OprDesc::virtual_mask);
 672         break;
 673 
 674       case T_METADATA:
 675         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift)  |
 676                                             LIR_OprDesc::metadata_type|
 677                                             LIR_OprDesc::cpu_register |
 678                                             LIR_OprDesc::single_size  |
 679                                             LIR_OprDesc::virtual_mask);
 680         break;
 681 
 682       case T_INT:
 683         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 684                                   LIR_OprDesc::int_type              |
 685                                   LIR_OprDesc::cpu_register          |
 686                                   LIR_OprDesc::single_size           |
 687                                   LIR_OprDesc::virtual_mask);
 688         break;
 689 
 690       case T_ADDRESS:
 691         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 692                                   LIR_OprDesc::address_type          |
 693                                   LIR_OprDesc::cpu_register          |
 694                                   LIR_OprDesc::single_size           |
 695                                   LIR_OprDesc::virtual_mask);
 696         break;
 697 
 698       case T_LONG:
 699         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 700                                   LIR_OprDesc::long_type             |
 701                                   LIR_OprDesc::cpu_register          |
 702                                   LIR_OprDesc::double_size           |
 703                                   LIR_OprDesc::virtual_mask);
 704         break;
 705 
 706 #ifdef __SOFTFP__
 707       case T_FLOAT:
 708         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 709                                   LIR_OprDesc::float_type  |
 710                                   LIR_OprDesc::cpu_register |
 711                                   LIR_OprDesc::single_size |
 712                                   LIR_OprDesc::virtual_mask);
 713         break;
 714       case T_DOUBLE:
 715         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 716                                   LIR_OprDesc::double_type |
 717                                   LIR_OprDesc::cpu_register |
 718                                   LIR_OprDesc::double_size |
 719                                   LIR_OprDesc::virtual_mask);
 720         break;
 721 #else // __SOFTFP__
 722       case T_FLOAT:
 723         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 724                                   LIR_OprDesc::float_type           |
 725                                   LIR_OprDesc::fpu_register         |
 726                                   LIR_OprDesc::single_size          |
 727                                   LIR_OprDesc::virtual_mask);
 728         break;
 729 
 730       case
 731         T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 732                                             LIR_OprDesc::double_type           |
 733                                             LIR_OprDesc::fpu_register          |
 734                                             LIR_OprDesc::double_size           |
 735                                             LIR_OprDesc::virtual_mask);
 736         break;
 737 #endif // __SOFTFP__
 738       default:       ShouldNotReachHere(); res = illegalOpr;
 739     }
 740 
 741 #ifdef ASSERT
 742     res->validate_type();
 743     assert(res->vreg_number() == index, "conversion check");
 744     assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
 745     assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
 746 
 747     // old-style calculation; check if old and new method are equal
 748     LIR_OprDesc::OprType t = as_OprType(type);
 749 #ifdef __SOFTFP__
 750     LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 751                                t |
 752                                LIR_OprDesc::cpu_register |
 753                                LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
 754 #else // __SOFTFP__
 755     LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
 756                                           ((type == T_FLOAT || type == T_DOUBLE) ?  LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
 757                                LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
 758     assert(res == old_res, "old and new method not equal");
 759 #endif // __SOFTFP__
 760 #endif // ASSERT
 761 
 762     return res;
 763   }
 764 
 765   // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
 766   // the index is platform independent; a double stack useing indeces 2 and 3 has always
 767   // index 2.
 768   static LIR_Opr stack(int index, BasicType type) {
 769     LIR_Opr res;
 770     switch (type) {
 771       case T_OBJECT: // fall through
 772       case T_ARRAY:
 773         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 774                                   LIR_OprDesc::object_type           |
 775                                   LIR_OprDesc::stack_value           |
 776                                   LIR_OprDesc::single_size);
 777         break;
 778 
 779       case T_METADATA:
 780         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 781                                   LIR_OprDesc::metadata_type         |
 782                                   LIR_OprDesc::stack_value           |
 783                                   LIR_OprDesc::single_size);
 784         break;
 785       case T_INT:
 786         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 787                                   LIR_OprDesc::int_type              |
 788                                   LIR_OprDesc::stack_value           |
 789                                   LIR_OprDesc::single_size);
 790         break;
 791 
 792       case T_ADDRESS:
 793         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 794                                   LIR_OprDesc::address_type          |
 795                                   LIR_OprDesc::stack_value           |
 796                                   LIR_OprDesc::single_size);
 797         break;
 798 
 799       case T_LONG:
 800         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 801                                   LIR_OprDesc::long_type             |
 802                                   LIR_OprDesc::stack_value           |
 803                                   LIR_OprDesc::double_size);
 804         break;
 805 
 806       case T_FLOAT:
 807         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 808                                   LIR_OprDesc::float_type            |
 809                                   LIR_OprDesc::stack_value           |
 810                                   LIR_OprDesc::single_size);
 811         break;
 812       case T_DOUBLE:
 813         res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 814                                   LIR_OprDesc::double_type           |
 815                                   LIR_OprDesc::stack_value           |
 816                                   LIR_OprDesc::double_size);
 817         break;
 818 
 819       default:       ShouldNotReachHere(); res = illegalOpr;
 820     }
 821 
 822 #ifdef ASSERT
 823     assert(index >= 0, "index must be positive");
 824     assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
 825 
 826     LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
 827                                           LIR_OprDesc::stack_value           |
 828                                           as_OprType(type)                   |
 829                                           LIR_OprDesc::size_for(type));
 830     assert(res == old_res, "old and new method not equal");
 831 #endif
 832 
 833     return res;
 834   }
 835 
 836   static LIR_Opr intConst(jint i)                { return (LIR_Opr)(new LIR_Const(i)); }
 837   static LIR_Opr longConst(jlong l)              { return (LIR_Opr)(new LIR_Const(l)); }
 838   static LIR_Opr floatConst(jfloat f)            { return (LIR_Opr)(new LIR_Const(f)); }
 839   static LIR_Opr doubleConst(jdouble d)          { return (LIR_Opr)(new LIR_Const(d)); }
 840   static LIR_Opr oopConst(jobject o)             { return (LIR_Opr)(new LIR_Const(o)); }
 841   static LIR_Opr address(LIR_Address* a)         { return (LIR_Opr)a; }
 842   static LIR_Opr intptrConst(void* p)            { return (LIR_Opr)(new LIR_Const(p)); }
 843   static LIR_Opr intptrConst(intptr_t v)         { return (LIR_Opr)(new LIR_Const((void*)v)); }
 844   static LIR_Opr illegal()                       { return (LIR_Opr)-1; }
 845   static LIR_Opr addressConst(jint i)            { return (LIR_Opr)(new LIR_Const(i, true)); }
 846   static LIR_Opr metadataConst(Metadata* m)      { return (LIR_Opr)(new LIR_Const(m)); }
 847 
 848   static LIR_Opr value_type(ValueType* type);
 849   static LIR_Opr dummy_value_type(ValueType* type);
 850 };
 851 
 852 
 853 //-------------------------------------------------------------------------------
 854 //                   LIR Instructions
 855 //-------------------------------------------------------------------------------
 856 //
 857 // Note:
 858 //  - every instruction has a result operand
 859 //  - every instruction has an CodeEmitInfo operand (can be revisited later)
 860 //  - every instruction has a LIR_OpCode operand
 861 //  - LIR_OpN, means an instruction that has N input operands
 862 //
 863 // class hierarchy:
 864 //
 865 class  LIR_Op;
 866 class    LIR_Op0;
 867 class      LIR_OpLabel;
 868 class    LIR_Op1;
 869 class      LIR_OpBranch;
 870 class      LIR_OpConvert;
 871 class      LIR_OpAllocObj;
 872 class      LIR_OpRoundFP;
 873 class    LIR_Op2;
 874 class    LIR_OpDelay;
 875 class    LIR_Op3;
 876 class      LIR_OpAllocArray;
 877 class    LIR_OpCall;
 878 class      LIR_OpJavaCall;
 879 class      LIR_OpRTCall;
 880 class    LIR_OpArrayCopy;
 881 class    LIR_OpUpdateCRC32;
 882 class    LIR_OpLock;
 883 class    LIR_OpTypeCheck;
 884 class    LIR_OpCompareAndSwap;
 885 class    LIR_OpProfileCall;
 886 class    LIR_OpProfileType;
 887 #ifdef ASSERT
 888 class    LIR_OpAssert;
 889 #endif
 890 
 891 // LIR operation codes
 892 enum LIR_Code {
 893     lir_none
 894   , begin_op0
 895       , lir_word_align
 896       , lir_label
 897       , lir_nop
 898       , lir_backwardbranch_target
 899       , lir_std_entry
 900       , lir_osr_entry
 901       , lir_build_frame
 902       , lir_fpop_raw
 903       , lir_24bit_FPU
 904       , lir_reset_FPU
 905       , lir_breakpoint
 906       , lir_rtcall
 907       , lir_membar
 908       , lir_membar_acquire
 909       , lir_membar_release
 910       , lir_membar_loadload
 911       , lir_membar_storestore
 912       , lir_membar_loadstore
 913       , lir_membar_storeload
 914       , lir_get_thread
 915   , end_op0
 916   , begin_op1
 917       , lir_fxch
 918       , lir_fld
 919       , lir_ffree
 920       , lir_push
 921       , lir_pop
 922       , lir_null_check
 923       , lir_return
 924       , lir_leal
 925       , lir_neg
 926       , lir_branch
 927       , lir_cond_float_branch
 928       , lir_move
 929       , lir_convert
 930       , lir_alloc_object
 931       , lir_monaddr
 932       , lir_roundfp
 933       , lir_safepoint
 934       , lir_pack64
 935       , lir_unpack64
 936       , lir_unwind
 937   , end_op1
 938   , begin_op2
 939       , lir_cmp
 940       , lir_cmp_l2i
 941       , lir_ucmp_fd2i
 942       , lir_cmp_fd2i
 943       , lir_cmove
 944       , lir_add
 945       , lir_sub
 946       , lir_mul
 947       , lir_mul_strictfp
 948       , lir_div
 949       , lir_div_strictfp
 950       , lir_rem
 951       , lir_sqrt
 952       , lir_abs
 953       , lir_tan
 954       , lir_log10
 955       , lir_logic_and
 956       , lir_logic_or
 957       , lir_logic_xor
 958       , lir_shl
 959       , lir_shr
 960       , lir_ushr
 961       , lir_alloc_array
 962       , lir_throw
 963       , lir_compare_to
 964       , lir_xadd
 965       , lir_xchg
 966   , end_op2
 967   , begin_op3
 968       , lir_idiv
 969       , lir_irem
 970   , end_op3
 971   , begin_opJavaCall
 972       , lir_static_call
 973       , lir_optvirtual_call
 974       , lir_icvirtual_call
 975       , lir_virtual_call
 976       , lir_dynamic_call
 977   , end_opJavaCall
 978   , begin_opArrayCopy
 979       , lir_arraycopy
 980   , end_opArrayCopy
 981   , begin_opUpdateCRC32
 982       , lir_updatecrc32
 983   , end_opUpdateCRC32
 984   , begin_opLock
 985     , lir_lock
 986     , lir_unlock
 987   , end_opLock
 988   , begin_delay_slot
 989     , lir_delay_slot
 990   , end_delay_slot
 991   , begin_opTypeCheck
 992     , lir_instanceof
 993     , lir_checkcast
 994     , lir_store_check
 995   , end_opTypeCheck
 996   , begin_opCompareAndSwap
 997     , lir_cas_long
 998     , lir_cas_obj
 999     , lir_cas_int
1000   , end_opCompareAndSwap
1001   , begin_opMDOProfile
1002     , lir_profile_call
1003     , lir_profile_type
1004   , end_opMDOProfile
1005   , begin_opAssert
1006     , lir_assert
1007   , end_opAssert
1008 };
1009 
1010 
1011 enum LIR_Condition {
1012     lir_cond_equal
1013   , lir_cond_notEqual
1014   , lir_cond_less
1015   , lir_cond_lessEqual
1016   , lir_cond_greaterEqual
1017   , lir_cond_greater
1018   , lir_cond_belowEqual
1019   , lir_cond_aboveEqual
1020   , lir_cond_always
1021   , lir_cond_unknown = -1
1022 };
1023 
1024 
1025 enum LIR_PatchCode {
1026   lir_patch_none,
1027   lir_patch_low,
1028   lir_patch_high,
1029   lir_patch_normal
1030 };
1031 
1032 
1033 enum LIR_MoveKind {
1034   lir_move_normal,
1035   lir_move_volatile,
1036   lir_move_unaligned,
1037   lir_move_wide,
1038   lir_move_max_flag
1039 };
1040 
1041 
1042 // --------------------------------------------------
1043 // LIR_Op
1044 // --------------------------------------------------
1045 class LIR_Op: public CompilationResourceObj {
1046  friend class LIR_OpVisitState;
1047 
1048 #ifdef ASSERT
1049  private:
1050   const char *  _file;
1051   int           _line;
1052 #endif
1053 
1054  protected:
1055   LIR_Opr       _result;
1056   unsigned short _code;
1057   unsigned short _flags;
1058   CodeEmitInfo* _info;
1059   int           _id;     // value id for register allocation
1060   int           _fpu_pop_count;
1061   Instruction*  _source; // for debugging
1062 
1063   static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1064 
1065  protected:
1066   static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end)  { return start < test && test < end; }
1067 
1068  public:
1069   LIR_Op()
1070     : _result(LIR_OprFact::illegalOpr)
1071     , _code(lir_none)
1072     , _flags(0)
1073     , _info(NULL)
1074 #ifdef ASSERT
1075     , _file(NULL)
1076     , _line(0)
1077 #endif
1078     , _fpu_pop_count(0)
1079     , _source(NULL)
1080     , _id(-1)                             {}
1081 
1082   LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1083     : _result(result)
1084     , _code(code)
1085     , _flags(0)
1086     , _info(info)
1087 #ifdef ASSERT
1088     , _file(NULL)
1089     , _line(0)
1090 #endif
1091     , _fpu_pop_count(0)
1092     , _source(NULL)
1093     , _id(-1)                             {}
1094 
1095   CodeEmitInfo* info() const                  { return _info;   }
1096   LIR_Code code()      const                  { return (LIR_Code)_code;   }
1097   LIR_Opr result_opr() const                  { return _result; }
1098   void    set_result_opr(LIR_Opr opr)         { _result = opr;  }
1099 
1100 #ifdef ASSERT
1101   void set_file_and_line(const char * file, int line) {
1102     _file = file;
1103     _line = line;
1104   }
1105 #endif
1106 
1107   virtual const char * name() const PRODUCT_RETURN0;
1108 
1109   int id()             const                  { return _id;     }
1110   void set_id(int id)                         { _id = id; }
1111 
1112   // FPU stack simulation helpers -- only used on Intel
1113   void set_fpu_pop_count(int count)           { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1114   int  fpu_pop_count() const                  { return _fpu_pop_count; }
1115   bool pop_fpu_stack()                        { return _fpu_pop_count > 0; }
1116 
1117   Instruction* source() const                 { return _source; }
1118   void set_source(Instruction* ins)           { _source = ins; }
1119 
1120   virtual void emit_code(LIR_Assembler* masm) = 0;
1121   virtual void print_instr(outputStream* out) const   = 0;
1122   virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1123 
1124   virtual bool is_patching() { return false; }
1125   virtual LIR_OpCall* as_OpCall() { return NULL; }
1126   virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1127   virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1128   virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1129   virtual LIR_OpLock* as_OpLock() { return NULL; }
1130   virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1131   virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1132   virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1133   virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1134   virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1135   virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1136   virtual LIR_Op0* as_Op0() { return NULL; }
1137   virtual LIR_Op1* as_Op1() { return NULL; }
1138   virtual LIR_Op2* as_Op2() { return NULL; }
1139   virtual LIR_Op3* as_Op3() { return NULL; }
1140   virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1141   virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; }
1142   virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1143   virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1144   virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1145   virtual LIR_OpProfileType* as_OpProfileType() { return NULL; }
1146 #ifdef ASSERT
1147   virtual LIR_OpAssert* as_OpAssert() { return NULL; }
1148 #endif
1149 
1150   virtual void verify() const {}
1151 };
1152 
1153 // for calls
1154 class LIR_OpCall: public LIR_Op {
1155  friend class LIR_OpVisitState;
1156 
1157  protected:
1158   address      _addr;
1159   LIR_OprList* _arguments;
1160  protected:
1161   LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1162              LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1163     : LIR_Op(code, result, info)
1164     , _arguments(arguments)
1165     , _addr(addr) {}
1166 
1167  public:
1168   address addr() const                           { return _addr; }
1169   const LIR_OprList* arguments() const           { return _arguments; }
1170   virtual LIR_OpCall* as_OpCall()                { return this; }
1171 };
1172 
1173 
1174 // --------------------------------------------------
1175 // LIR_OpJavaCall
1176 // --------------------------------------------------
1177 class LIR_OpJavaCall: public LIR_OpCall {
1178  friend class LIR_OpVisitState;
1179 
1180  private:
1181   ciMethod* _method;
1182   LIR_Opr   _receiver;
1183   LIR_Opr   _method_handle_invoke_SP_save_opr;  // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1184 
1185  public:
1186   LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1187                  LIR_Opr receiver, LIR_Opr result,
1188                  address addr, LIR_OprList* arguments,
1189                  CodeEmitInfo* info)
1190   : LIR_OpCall(code, addr, result, arguments, info)
1191   , _receiver(receiver)
1192   , _method(method)
1193   , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1194   { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1195 
1196   LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1197                  LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1198                  LIR_OprList* arguments, CodeEmitInfo* info)
1199   : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1200   , _receiver(receiver)
1201   , _method(method)
1202   , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1203   { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1204 
1205   LIR_Opr receiver() const                       { return _receiver; }
1206   ciMethod* method() const                       { return _method;   }
1207 
1208   // JSR 292 support.
1209   bool is_invokedynamic() const                  { return code() == lir_dynamic_call; }
1210   bool is_method_handle_invoke() const {
1211     return method()->is_compiled_lambda_form() ||   // Java-generated lambda form
1212            method()->is_method_handle_intrinsic();  // JVM-generated MH intrinsic
1213   }
1214 
1215   intptr_t vtable_offset() const {
1216     assert(_code == lir_virtual_call, "only have vtable for real vcall");
1217     return (intptr_t) addr();
1218   }
1219 
1220   virtual void emit_code(LIR_Assembler* masm);
1221   virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1222   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1223 };
1224 
1225 // --------------------------------------------------
1226 // LIR_OpLabel
1227 // --------------------------------------------------
1228 // Location where a branch can continue
1229 class LIR_OpLabel: public LIR_Op {
1230  friend class LIR_OpVisitState;
1231 
1232  private:
1233   Label* _label;
1234  public:
1235   LIR_OpLabel(Label* lbl)
1236    : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1237    , _label(lbl)                                 {}
1238   Label* label() const                           { return _label; }
1239 
1240   virtual void emit_code(LIR_Assembler* masm);
1241   virtual LIR_OpLabel* as_OpLabel() { return this; }
1242   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1243 };
1244 
1245 // LIR_OpArrayCopy
1246 class LIR_OpArrayCopy: public LIR_Op {
1247  friend class LIR_OpVisitState;
1248 
1249  private:
1250   ArrayCopyStub*  _stub;
1251   LIR_Opr   _src;
1252   LIR_Opr   _src_pos;
1253   LIR_Opr   _dst;
1254   LIR_Opr   _dst_pos;
1255   LIR_Opr   _length;
1256   LIR_Opr   _tmp;
1257   ciArrayKlass* _expected_type;
1258   int       _flags;
1259 
1260 public:
1261   enum Flags {
1262     src_null_check         = 1 << 0,
1263     dst_null_check         = 1 << 1,
1264     src_pos_positive_check = 1 << 2,
1265     dst_pos_positive_check = 1 << 3,
1266     length_positive_check  = 1 << 4,
1267     src_range_check        = 1 << 5,
1268     dst_range_check        = 1 << 6,
1269     type_check             = 1 << 7,
1270     overlapping            = 1 << 8,
1271     unaligned              = 1 << 9,
1272     src_objarray           = 1 << 10,
1273     dst_objarray           = 1 << 11,
1274     all_flags              = (1 << 12) - 1
1275   };
1276 
1277   LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1278                   ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1279 
1280   LIR_Opr src() const                            { return _src; }
1281   LIR_Opr src_pos() const                        { return _src_pos; }
1282   LIR_Opr dst() const                            { return _dst; }
1283   LIR_Opr dst_pos() const                        { return _dst_pos; }
1284   LIR_Opr length() const                         { return _length; }
1285   LIR_Opr tmp() const                            { return _tmp; }
1286   int flags() const                              { return _flags; }
1287   ciArrayKlass* expected_type() const            { return _expected_type; }
1288   ArrayCopyStub* stub() const                    { return _stub; }
1289 
1290   virtual void emit_code(LIR_Assembler* masm);
1291   virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1292   void print_instr(outputStream* out) const PRODUCT_RETURN;
1293 };
1294 
1295 // LIR_OpUpdateCRC32
1296 class LIR_OpUpdateCRC32: public LIR_Op {
1297   friend class LIR_OpVisitState;
1298 
1299 private:
1300   LIR_Opr   _crc;
1301   LIR_Opr   _val;
1302 
1303 public:
1304 
1305   LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res);
1306 
1307   LIR_Opr crc() const                            { return _crc; }
1308   LIR_Opr val() const                            { return _val; }
1309 
1310   virtual void emit_code(LIR_Assembler* masm);
1311   virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32()  { return this; }
1312   void print_instr(outputStream* out) const PRODUCT_RETURN;
1313 };
1314 
1315 // --------------------------------------------------
1316 // LIR_Op0
1317 // --------------------------------------------------
1318 class LIR_Op0: public LIR_Op {
1319  friend class LIR_OpVisitState;
1320 
1321  public:
1322   LIR_Op0(LIR_Code code)
1323    : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)  { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1324   LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1325    : LIR_Op(code, result, info)  { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1326 
1327   virtual void emit_code(LIR_Assembler* masm);
1328   virtual LIR_Op0* as_Op0() { return this; }
1329   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1330 };
1331 
1332 
1333 // --------------------------------------------------
1334 // LIR_Op1
1335 // --------------------------------------------------
1336 
1337 class LIR_Op1: public LIR_Op {
1338  friend class LIR_OpVisitState;
1339 
1340  protected:
1341   LIR_Opr         _opr;   // input operand
1342   BasicType       _type;  // Operand types
1343   LIR_PatchCode   _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1344 
1345   static void print_patch_code(outputStream* out, LIR_PatchCode code);
1346 
1347   void set_kind(LIR_MoveKind kind) {
1348     assert(code() == lir_move, "must be");
1349     _flags = kind;
1350   }
1351 
1352  public:
1353   LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1354     : LIR_Op(code, result, info)
1355     , _opr(opr)
1356     , _patch(patch)
1357     , _type(type)                      { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1358 
1359   LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1360     : LIR_Op(code, result, info)
1361     , _opr(opr)
1362     , _patch(patch)
1363     , _type(type)                      {
1364     assert(code == lir_move, "must be");
1365     set_kind(kind);
1366   }
1367 
1368   LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1369     : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1370     , _opr(opr)
1371     , _patch(lir_patch_none)
1372     , _type(T_ILLEGAL)                 { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1373 
1374   LIR_Opr in_opr()           const               { return _opr;   }
1375   LIR_PatchCode patch_code() const               { return _patch; }
1376   BasicType type()           const               { return _type;  }
1377 
1378   LIR_MoveKind move_kind() const {
1379     assert(code() == lir_move, "must be");
1380     return (LIR_MoveKind)_flags;
1381   }
1382 
1383   virtual bool is_patching() { return _patch != lir_patch_none; }
1384   virtual void emit_code(LIR_Assembler* masm);
1385   virtual LIR_Op1* as_Op1() { return this; }
1386   virtual const char * name() const PRODUCT_RETURN0;
1387 
1388   void set_in_opr(LIR_Opr opr) { _opr = opr; }
1389 
1390   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1391   virtual void verify() const;
1392 };
1393 
1394 
1395 // for runtime calls
1396 class LIR_OpRTCall: public LIR_OpCall {
1397  friend class LIR_OpVisitState;
1398 
1399  private:
1400   LIR_Opr _tmp;
1401  public:
1402   LIR_OpRTCall(address addr, LIR_Opr tmp,
1403                LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1404     : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1405     , _tmp(tmp) {}
1406 
1407   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1408   virtual void emit_code(LIR_Assembler* masm);
1409   virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1410 
1411   LIR_Opr tmp() const                            { return _tmp; }
1412 
1413   virtual void verify() const;
1414 };
1415 
1416 
1417 class LIR_OpBranch: public LIR_Op {
1418  friend class LIR_OpVisitState;
1419 
1420  private:
1421   LIR_Condition _cond;
1422   BasicType     _type;
1423   Label*        _label;
1424   BlockBegin*   _block;  // if this is a branch to a block, this is the block
1425   BlockBegin*   _ublock; // if this is a float-branch, this is the unorderd block
1426   CodeStub*     _stub;   // if this is a branch to a stub, this is the stub
1427 
1428  public:
1429   LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1430     : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1431     , _cond(cond)
1432     , _type(type)
1433     , _label(lbl)
1434     , _block(NULL)
1435     , _ublock(NULL)
1436     , _stub(NULL) { }
1437 
1438   LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1439   LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1440 
1441   // for unordered comparisons
1442   LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1443 
1444   LIR_Condition cond()        const              { return _cond;        }
1445   BasicType     type()        const              { return _type;        }
1446   Label*        label()       const              { return _label;       }
1447   BlockBegin*   block()       const              { return _block;       }
1448   BlockBegin*   ublock()      const              { return _ublock;      }
1449   CodeStub*     stub()        const              { return _stub;       }
1450 
1451   void          change_block(BlockBegin* b);
1452   void          change_ublock(BlockBegin* b);
1453   void          negate_cond();
1454 
1455   virtual void emit_code(LIR_Assembler* masm);
1456   virtual LIR_OpBranch* as_OpBranch() { return this; }
1457   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1458 };
1459 
1460 
1461 class ConversionStub;
1462 
1463 class LIR_OpConvert: public LIR_Op1 {
1464  friend class LIR_OpVisitState;
1465 
1466  private:
1467    Bytecodes::Code _bytecode;
1468    ConversionStub* _stub;
1469 #ifdef PPC32
1470   LIR_Opr _tmp1;
1471   LIR_Opr _tmp2;
1472 #endif
1473 
1474  public:
1475    LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1476      : LIR_Op1(lir_convert, opr, result)
1477      , _stub(stub)
1478 #ifdef PPC32
1479      , _tmp1(LIR_OprDesc::illegalOpr())
1480      , _tmp2(LIR_OprDesc::illegalOpr())
1481 #endif
1482      , _bytecode(code)                           {}
1483 
1484 #ifdef PPC32
1485    LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1486                  ,LIR_Opr tmp1, LIR_Opr tmp2)
1487      : LIR_Op1(lir_convert, opr, result)
1488      , _stub(stub)
1489      , _tmp1(tmp1)
1490      , _tmp2(tmp2)
1491      , _bytecode(code)                           {}
1492 #endif
1493 
1494   Bytecodes::Code bytecode() const               { return _bytecode; }
1495   ConversionStub* stub() const                   { return _stub; }
1496 #ifdef PPC32
1497   LIR_Opr tmp1() const                           { return _tmp1; }
1498   LIR_Opr tmp2() const                           { return _tmp2; }
1499 #endif
1500 
1501   virtual void emit_code(LIR_Assembler* masm);
1502   virtual LIR_OpConvert* as_OpConvert() { return this; }
1503   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1504 
1505   static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1506 };
1507 
1508 
1509 // LIR_OpAllocObj
1510 class LIR_OpAllocObj : public LIR_Op1 {
1511  friend class LIR_OpVisitState;
1512 
1513  private:
1514   LIR_Opr _tmp1;
1515   LIR_Opr _tmp2;
1516   LIR_Opr _tmp3;
1517   LIR_Opr _tmp4;
1518   int     _hdr_size;
1519   int     _obj_size;
1520   CodeStub* _stub;
1521   bool    _init_check;
1522 
1523  public:
1524   LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1525                  LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1526                  int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1527     : LIR_Op1(lir_alloc_object, klass, result)
1528     , _tmp1(t1)
1529     , _tmp2(t2)
1530     , _tmp3(t3)
1531     , _tmp4(t4)
1532     , _hdr_size(hdr_size)
1533     , _obj_size(obj_size)
1534     , _init_check(init_check)
1535     , _stub(stub)                                { }
1536 
1537   LIR_Opr klass()        const                   { return in_opr();     }
1538   LIR_Opr obj()          const                   { return result_opr(); }
1539   LIR_Opr tmp1()         const                   { return _tmp1;        }
1540   LIR_Opr tmp2()         const                   { return _tmp2;        }
1541   LIR_Opr tmp3()         const                   { return _tmp3;        }
1542   LIR_Opr tmp4()         const                   { return _tmp4;        }
1543   int     header_size()  const                   { return _hdr_size;    }
1544   int     object_size()  const                   { return _obj_size;    }
1545   bool    init_check()   const                   { return _init_check;  }
1546   CodeStub* stub()       const                   { return _stub;        }
1547 
1548   virtual void emit_code(LIR_Assembler* masm);
1549   virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1550   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1551 };
1552 
1553 
1554 // LIR_OpRoundFP
1555 class LIR_OpRoundFP : public LIR_Op1 {
1556  friend class LIR_OpVisitState;
1557 
1558  private:
1559   LIR_Opr _tmp;
1560 
1561  public:
1562   LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1563     : LIR_Op1(lir_roundfp, reg, result)
1564     , _tmp(stack_loc_temp) {}
1565 
1566   LIR_Opr tmp() const                            { return _tmp; }
1567   virtual LIR_OpRoundFP* as_OpRoundFP()          { return this; }
1568   void print_instr(outputStream* out) const PRODUCT_RETURN;
1569 };
1570 
1571 // LIR_OpTypeCheck
1572 class LIR_OpTypeCheck: public LIR_Op {
1573  friend class LIR_OpVisitState;
1574 
1575  private:
1576   LIR_Opr       _object;
1577   LIR_Opr       _array;
1578   ciKlass*      _klass;
1579   LIR_Opr       _tmp1;
1580   LIR_Opr       _tmp2;
1581   LIR_Opr       _tmp3;
1582   bool          _fast_check;
1583   CodeEmitInfo* _info_for_patch;
1584   CodeEmitInfo* _info_for_exception;
1585   CodeStub*     _stub;
1586   ciMethod*     _profiled_method;
1587   int           _profiled_bci;
1588   bool          _should_profile;
1589 
1590 public:
1591   LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1592                   LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1593                   CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1594   LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1595                   LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1596 
1597   LIR_Opr object() const                         { return _object;         }
1598   LIR_Opr array() const                          { assert(code() == lir_store_check, "not valid"); return _array;         }
1599   LIR_Opr tmp1() const                           { return _tmp1;           }
1600   LIR_Opr tmp2() const                           { return _tmp2;           }
1601   LIR_Opr tmp3() const                           { return _tmp3;           }
1602   ciKlass* klass() const                         { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass;          }
1603   bool fast_check() const                        { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check;     }
1604   CodeEmitInfo* info_for_patch() const           { return _info_for_patch;  }
1605   CodeEmitInfo* info_for_exception() const       { return _info_for_exception; }
1606   CodeStub* stub() const                         { return _stub;           }
1607 
1608   // MethodData* profiling
1609   void set_profiled_method(ciMethod *method)     { _profiled_method = method; }
1610   void set_profiled_bci(int bci)                 { _profiled_bci = bci;       }
1611   void set_should_profile(bool b)                { _should_profile = b;       }
1612   ciMethod* profiled_method() const              { return _profiled_method;   }
1613   int       profiled_bci() const                 { return _profiled_bci;      }
1614   bool      should_profile() const               { return _should_profile;    }
1615 
1616   virtual bool is_patching() { return _info_for_patch != NULL; }
1617   virtual void emit_code(LIR_Assembler* masm);
1618   virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1619   void print_instr(outputStream* out) const PRODUCT_RETURN;
1620 };
1621 
1622 // LIR_Op2
1623 class LIR_Op2: public LIR_Op {
1624  friend class LIR_OpVisitState;
1625 
1626   int  _fpu_stack_size; // for sin/cos implementation on Intel
1627 
1628  protected:
1629   LIR_Opr   _opr1;
1630   LIR_Opr   _opr2;
1631   BasicType _type;
1632   LIR_Opr   _tmp1;
1633   LIR_Opr   _tmp2;
1634   LIR_Opr   _tmp3;
1635   LIR_Opr   _tmp4;
1636   LIR_Opr   _tmp5;
1637   LIR_Condition _condition;
1638 
1639   void verify() const;
1640 
1641  public:
1642   LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1643     : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1644     , _opr1(opr1)
1645     , _opr2(opr2)
1646     , _type(T_ILLEGAL)
1647     , _condition(condition)
1648     , _fpu_stack_size(0)
1649     , _tmp1(LIR_OprFact::illegalOpr)
1650     , _tmp2(LIR_OprFact::illegalOpr)
1651     , _tmp3(LIR_OprFact::illegalOpr)
1652     , _tmp4(LIR_OprFact::illegalOpr)
1653     , _tmp5(LIR_OprFact::illegalOpr) {
1654     assert(code == lir_cmp || code == lir_assert, "code check");
1655   }
1656 
1657   LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1658     : LIR_Op(code, result, NULL)
1659     , _opr1(opr1)
1660     , _opr2(opr2)
1661     , _type(type)
1662     , _condition(condition)
1663     , _fpu_stack_size(0)
1664     , _tmp1(LIR_OprFact::illegalOpr)
1665     , _tmp2(LIR_OprFact::illegalOpr)
1666     , _tmp3(LIR_OprFact::illegalOpr)
1667     , _tmp4(LIR_OprFact::illegalOpr)
1668     , _tmp5(LIR_OprFact::illegalOpr) {
1669     assert(code == lir_cmove, "code check");
1670     assert(type != T_ILLEGAL, "cmove should have type");
1671   }
1672 
1673   LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1674           CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1675     : LIR_Op(code, result, info)
1676     , _opr1(opr1)
1677     , _opr2(opr2)
1678     , _type(type)
1679     , _condition(lir_cond_unknown)
1680     , _fpu_stack_size(0)
1681     , _tmp1(LIR_OprFact::illegalOpr)
1682     , _tmp2(LIR_OprFact::illegalOpr)
1683     , _tmp3(LIR_OprFact::illegalOpr)
1684     , _tmp4(LIR_OprFact::illegalOpr)
1685     , _tmp5(LIR_OprFact::illegalOpr) {
1686     assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1687   }
1688 
1689   LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr,
1690           LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr)
1691     : LIR_Op(code, result, NULL)
1692     , _opr1(opr1)
1693     , _opr2(opr2)
1694     , _type(T_ILLEGAL)
1695     , _condition(lir_cond_unknown)
1696     , _fpu_stack_size(0)
1697     , _tmp1(tmp1)
1698     , _tmp2(tmp2)
1699     , _tmp3(tmp3)
1700     , _tmp4(tmp4)
1701     , _tmp5(tmp5) {
1702     assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1703   }
1704 
1705   LIR_Opr in_opr1() const                        { return _opr1; }
1706   LIR_Opr in_opr2() const                        { return _opr2; }
1707   BasicType type()  const                        { return _type; }
1708   LIR_Opr tmp1_opr() const                       { return _tmp1; }
1709   LIR_Opr tmp2_opr() const                       { return _tmp2; }
1710   LIR_Opr tmp3_opr() const                       { return _tmp3; }
1711   LIR_Opr tmp4_opr() const                       { return _tmp4; }
1712   LIR_Opr tmp5_opr() const                       { return _tmp5; }
1713   LIR_Condition condition() const  {
1714     assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition;
1715   }
1716   void set_condition(LIR_Condition condition) {
1717     assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove");  _condition = condition;
1718   }
1719 
1720   void set_fpu_stack_size(int size)              { _fpu_stack_size = size; }
1721   int  fpu_stack_size() const                    { return _fpu_stack_size; }
1722 
1723   void set_in_opr1(LIR_Opr opr)                  { _opr1 = opr; }
1724   void set_in_opr2(LIR_Opr opr)                  { _opr2 = opr; }
1725 
1726   virtual void emit_code(LIR_Assembler* masm);
1727   virtual LIR_Op2* as_Op2() { return this; }
1728   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1729 };
1730 
1731 class LIR_OpAllocArray : public LIR_Op {
1732  friend class LIR_OpVisitState;
1733 
1734  private:
1735   LIR_Opr   _klass;
1736   LIR_Opr   _len;
1737   LIR_Opr   _tmp1;
1738   LIR_Opr   _tmp2;
1739   LIR_Opr   _tmp3;
1740   LIR_Opr   _tmp4;
1741   BasicType _type;
1742   CodeStub* _stub;
1743 
1744  public:
1745   LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1746     : LIR_Op(lir_alloc_array, result, NULL)
1747     , _klass(klass)
1748     , _len(len)
1749     , _tmp1(t1)
1750     , _tmp2(t2)
1751     , _tmp3(t3)
1752     , _tmp4(t4)
1753     , _type(type)
1754     , _stub(stub) {}
1755 
1756   LIR_Opr   klass()   const                      { return _klass;       }
1757   LIR_Opr   len()     const                      { return _len;         }
1758   LIR_Opr   obj()     const                      { return result_opr(); }
1759   LIR_Opr   tmp1()    const                      { return _tmp1;        }
1760   LIR_Opr   tmp2()    const                      { return _tmp2;        }
1761   LIR_Opr   tmp3()    const                      { return _tmp3;        }
1762   LIR_Opr   tmp4()    const                      { return _tmp4;        }
1763   BasicType type()    const                      { return _type;        }
1764   CodeStub* stub()    const                      { return _stub;        }
1765 
1766   virtual void emit_code(LIR_Assembler* masm);
1767   virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1768   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1769 };
1770 
1771 
1772 class LIR_Op3: public LIR_Op {
1773  friend class LIR_OpVisitState;
1774 
1775  private:
1776   LIR_Opr _opr1;
1777   LIR_Opr _opr2;
1778   LIR_Opr _opr3;
1779  public:
1780   LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1781     : LIR_Op(code, result, info)
1782     , _opr1(opr1)
1783     , _opr2(opr2)
1784     , _opr3(opr3)                                { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1785   LIR_Opr in_opr1() const                        { return _opr1; }
1786   LIR_Opr in_opr2() const                        { return _opr2; }
1787   LIR_Opr in_opr3() const                        { return _opr3; }
1788 
1789   virtual void emit_code(LIR_Assembler* masm);
1790   virtual LIR_Op3* as_Op3() { return this; }
1791   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1792 };
1793 
1794 
1795 //--------------------------------
1796 class LabelObj: public CompilationResourceObj {
1797  private:
1798   Label _label;
1799  public:
1800   LabelObj()                                     {}
1801   Label* label()                                 { return &_label; }
1802 };
1803 
1804 
1805 class LIR_OpLock: public LIR_Op {
1806  friend class LIR_OpVisitState;
1807 
1808  private:
1809   LIR_Opr _hdr;
1810   LIR_Opr _obj;
1811   LIR_Opr _lock;
1812   LIR_Opr _scratch;
1813   CodeStub* _stub;
1814  public:
1815   LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1816     : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1817     , _hdr(hdr)
1818     , _obj(obj)
1819     , _lock(lock)
1820     , _scratch(scratch)
1821     , _stub(stub)                      {}
1822 
1823   LIR_Opr hdr_opr() const                        { return _hdr; }
1824   LIR_Opr obj_opr() const                        { return _obj; }
1825   LIR_Opr lock_opr() const                       { return _lock; }
1826   LIR_Opr scratch_opr() const                    { return _scratch; }
1827   CodeStub* stub() const                         { return _stub; }
1828 
1829   virtual void emit_code(LIR_Assembler* masm);
1830   virtual LIR_OpLock* as_OpLock() { return this; }
1831   void print_instr(outputStream* out) const PRODUCT_RETURN;
1832 };
1833 
1834 
1835 class LIR_OpDelay: public LIR_Op {
1836  friend class LIR_OpVisitState;
1837 
1838  private:
1839   LIR_Op* _op;
1840 
1841  public:
1842   LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1843     LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1844     _op(op) {
1845     assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1846   }
1847   virtual void emit_code(LIR_Assembler* masm);
1848   virtual LIR_OpDelay* as_OpDelay() { return this; }
1849   void print_instr(outputStream* out) const PRODUCT_RETURN;
1850   LIR_Op* delay_op() const { return _op; }
1851   CodeEmitInfo* call_info() const { return info(); }
1852 };
1853 
1854 #ifdef ASSERT
1855 // LIR_OpAssert
1856 class LIR_OpAssert : public LIR_Op2 {
1857  friend class LIR_OpVisitState;
1858 
1859  private:
1860   const char* _msg;
1861   bool        _halt;
1862 
1863  public:
1864   LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt)
1865     : LIR_Op2(lir_assert, condition, opr1, opr2)
1866     , _halt(halt)
1867     , _msg(msg) {
1868   }
1869 
1870   const char* msg() const                        { return _msg; }
1871   bool        halt() const                       { return _halt; }
1872 
1873   virtual void emit_code(LIR_Assembler* masm);
1874   virtual LIR_OpAssert* as_OpAssert()            { return this; }
1875   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1876 };
1877 #endif
1878 
1879 // LIR_OpCompareAndSwap
1880 class LIR_OpCompareAndSwap : public LIR_Op {
1881  friend class LIR_OpVisitState;
1882 
1883  private:
1884   LIR_Opr _addr;
1885   LIR_Opr _cmp_value;
1886   LIR_Opr _new_value;
1887   LIR_Opr _tmp1;
1888   LIR_Opr _tmp2;
1889 
1890  public:
1891   LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1892                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1893     : LIR_Op(code, result, NULL)  // no result, no info
1894     , _addr(addr)
1895     , _cmp_value(cmp_value)
1896     , _new_value(new_value)
1897     , _tmp1(t1)
1898     , _tmp2(t2)                                  { }
1899 
1900   LIR_Opr addr()        const                    { return _addr;  }
1901   LIR_Opr cmp_value()   const                    { return _cmp_value; }
1902   LIR_Opr new_value()   const                    { return _new_value; }
1903   LIR_Opr tmp1()        const                    { return _tmp1;      }
1904   LIR_Opr tmp2()        const                    { return _tmp2;      }
1905 
1906   virtual void emit_code(LIR_Assembler* masm);
1907   virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1908   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1909 };
1910 
1911 // LIR_OpProfileCall
1912 class LIR_OpProfileCall : public LIR_Op {
1913  friend class LIR_OpVisitState;
1914 
1915  private:
1916   ciMethod* _profiled_method;
1917   int       _profiled_bci;
1918   ciMethod* _profiled_callee;
1919   LIR_Opr   _mdo;
1920   LIR_Opr   _recv;
1921   LIR_Opr   _tmp1;
1922   ciKlass*  _known_holder;
1923 
1924  public:
1925   // Destroys recv
1926   LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1927     : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL)  // no result, no info
1928     , _profiled_method(profiled_method)
1929     , _profiled_bci(profiled_bci)
1930     , _profiled_callee(profiled_callee)
1931     , _mdo(mdo)
1932     , _recv(recv)
1933     , _tmp1(t1)
1934     , _known_holder(known_holder)                { }
1935 
1936   ciMethod* profiled_method() const              { return _profiled_method;  }
1937   int       profiled_bci()    const              { return _profiled_bci;     }
1938   ciMethod* profiled_callee() const              { return _profiled_callee;  }
1939   LIR_Opr   mdo()             const              { return _mdo;              }
1940   LIR_Opr   recv()            const              { return _recv;             }
1941   LIR_Opr   tmp1()            const              { return _tmp1;             }
1942   ciKlass*  known_holder()    const              { return _known_holder;     }
1943 
1944   virtual void emit_code(LIR_Assembler* masm);
1945   virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1946   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1947 };
1948 
1949 // LIR_OpProfileType
1950 class LIR_OpProfileType : public LIR_Op {
1951  friend class LIR_OpVisitState;
1952 
1953  private:
1954   LIR_Opr      _mdp;
1955   LIR_Opr      _obj;
1956   LIR_Opr      _tmp;
1957   ciKlass*     _exact_klass;   // non NULL if we know the klass statically (no need to load it from _obj)
1958   intptr_t     _current_klass; // what the profiling currently reports
1959   bool         _not_null;      // true if we know statically that _obj cannot be null
1960   bool         _no_conflict;   // true if we're profling parameters, _exact_klass is not NULL and we know
1961                                // _exact_klass it the only possible type for this parameter in any context.
1962 
1963  public:
1964   // Destroys recv
1965   LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict)
1966     : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL)  // no result, no info
1967     , _mdp(mdp)
1968     , _obj(obj)
1969     , _exact_klass(exact_klass)
1970     , _current_klass(current_klass)
1971     , _tmp(tmp)
1972     , _not_null(not_null)
1973     , _no_conflict(no_conflict) { }
1974 
1975   LIR_Opr      mdp()              const             { return _mdp;              }
1976   LIR_Opr      obj()              const             { return _obj;              }
1977   LIR_Opr      tmp()              const             { return _tmp;              }
1978   ciKlass*     exact_klass()      const             { return _exact_klass;      }
1979   intptr_t     current_klass()    const             { return _current_klass;    }
1980   bool         not_null()         const             { return _not_null;         }
1981   bool         no_conflict()      const             { return _no_conflict;      }
1982 
1983   virtual void emit_code(LIR_Assembler* masm);
1984   virtual LIR_OpProfileType* as_OpProfileType() { return this; }
1985   virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1986 };
1987 
1988 class LIR_InsertionBuffer;
1989 
1990 //--------------------------------LIR_List---------------------------------------------------
1991 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1992 // The LIR instructions are appended by the LIR_List class itself;
1993 //
1994 // Notes:
1995 // - all offsets are(should be) in bytes
1996 // - local positions are specified with an offset, with offset 0 being local 0
1997 
1998 class LIR_List: public CompilationResourceObj {
1999  private:
2000   LIR_OpList  _operations;
2001 
2002   Compilation*  _compilation;
2003 #ifndef PRODUCT
2004   BlockBegin*   _block;
2005 #endif
2006 #ifdef ASSERT
2007   const char *  _file;
2008   int           _line;
2009 #endif
2010 
2011   void append(LIR_Op* op) {
2012     if (op->source() == NULL)
2013       op->set_source(_compilation->current_instruction());
2014 #ifndef PRODUCT
2015     if (PrintIRWithLIR) {
2016       _compilation->maybe_print_current_instruction();
2017       op->print(); tty->cr();
2018     }
2019 #endif // PRODUCT
2020 
2021     _operations.append(op);
2022 
2023 #ifdef ASSERT
2024     op->verify();
2025     op->set_file_and_line(_file, _line);
2026     _file = NULL;
2027     _line = 0;
2028 #endif
2029   }
2030 
2031  public:
2032   LIR_List(Compilation* compilation, BlockBegin* block = NULL);
2033 
2034 #ifdef ASSERT
2035   void set_file_and_line(const char * file, int line);
2036 #endif
2037 
2038   //---------- accessors ---------------
2039   LIR_OpList* instructions_list()                { return &_operations; }
2040   int         length() const                     { return _operations.length(); }
2041   LIR_Op*     at(int i) const                    { return _operations.at(i); }
2042 
2043   NOT_PRODUCT(BlockBegin* block() const          { return _block; });
2044 
2045   // insert LIR_Ops in buffer to right places in LIR_List
2046   void append(LIR_InsertionBuffer* buffer);
2047 
2048   //---------- mutators ---------------
2049   void insert_before(int i, LIR_List* op_list)   { _operations.insert_before(i, op_list->instructions_list()); }
2050   void insert_before(int i, LIR_Op* op)          { _operations.insert_before(i, op); }
2051   void remove_at(int i)                          { _operations.remove_at(i); }
2052 
2053   //---------- printing -------------
2054   void print_instructions() PRODUCT_RETURN;
2055 
2056 
2057   //---------- instructions -------------
2058   void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2059                         address dest, LIR_OprList* arguments,
2060                         CodeEmitInfo* info) {
2061     append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
2062   }
2063   void call_static(ciMethod* method, LIR_Opr result,
2064                    address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2065     append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
2066   }
2067   void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2068                       address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2069     append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
2070   }
2071   void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2072                     intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
2073     append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
2074   }
2075   void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
2076                     address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
2077     append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
2078   }
2079 
2080   void get_thread(LIR_Opr result)                { append(new LIR_Op0(lir_get_thread, result)); }
2081   void word_align()                              { append(new LIR_Op0(lir_word_align)); }
2082   void membar()                                  { append(new LIR_Op0(lir_membar)); }
2083   void membar_acquire()                          { append(new LIR_Op0(lir_membar_acquire)); }
2084   void membar_release()                          { append(new LIR_Op0(lir_membar_release)); }
2085   void membar_loadload()                         { append(new LIR_Op0(lir_membar_loadload)); }
2086   void membar_storestore()                       { append(new LIR_Op0(lir_membar_storestore)); }
2087   void membar_loadstore()                        { append(new LIR_Op0(lir_membar_loadstore)); }
2088   void membar_storeload()                        { append(new LIR_Op0(lir_membar_storeload)); }
2089 
2090   void nop()                                     { append(new LIR_Op0(lir_nop)); }
2091   void build_frame()                             { append(new LIR_Op0(lir_build_frame)); }
2092 
2093   void std_entry(LIR_Opr receiver)               { append(new LIR_Op0(lir_std_entry, receiver)); }
2094   void osr_entry(LIR_Opr osrPointer)             { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
2095 
2096   void branch_destination(Label* lbl)            { append(new LIR_OpLabel(lbl)); }
2097 
2098   void negate(LIR_Opr from, LIR_Opr to)          { append(new LIR_Op1(lir_neg, from, to)); }
2099   void leal(LIR_Opr from, LIR_Opr result_reg)    { append(new LIR_Op1(lir_leal, from, result_reg)); }
2100 
2101   // result is a stack location for old backend and vreg for UseLinearScan
2102   // stack_loc_temp is an illegal register for old backend
2103   void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
2104   void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2105   void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2106   void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
2107   void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2108   void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
2109   void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
2110   void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
2111     if (UseCompressedOops) {
2112       append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
2113     } else {
2114       move(src, dst, info);
2115     }
2116   }
2117   void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
2118     if (UseCompressedOops) {
2119       append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
2120     } else {
2121       move(src, dst, info);
2122     }
2123   }
2124   void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
2125 
2126   void oop2reg  (jobject o, LIR_Opr reg)         { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),    reg));   }
2127   void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
2128 
2129   void metadata2reg  (Metadata* o, LIR_Opr reg)  { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg));   }
2130   void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info);
2131 
2132   void return_op(LIR_Opr result)                 { append(new LIR_Op1(lir_return, result)); }
2133 
2134   void safepoint(LIR_Opr tmp, CodeEmitInfo* info)  { append(new LIR_Op1(lir_safepoint, tmp, info)); }
2135 
2136 #ifdef PPC32
2137   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
2138 #endif
2139   void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
2140 
2141   void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and,  left, right, dst)); }
2142   void logical_or  (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or,   left, right, dst)); }
2143   void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor,  left, right, dst)); }
2144 
2145   void   pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64,   src, dst, T_LONG, lir_patch_none, NULL)); }
2146   void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
2147 
2148   void null_check(LIR_Opr opr, CodeEmitInfo* info)         { append(new LIR_Op1(lir_null_check, opr, info)); }
2149   void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
2150     append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
2151   }
2152   void unwind_exception(LIR_Opr exceptionOop) {
2153     append(new LIR_Op1(lir_unwind, exceptionOop));
2154   }
2155 
2156   void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
2157     append(new LIR_Op2(lir_compare_to,  left, right, dst));
2158   }
2159 
2160   void push(LIR_Opr opr)                                   { append(new LIR_Op1(lir_push, opr)); }
2161   void pop(LIR_Opr reg)                                    { append(new LIR_Op1(lir_pop,  reg)); }
2162 
2163   void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2164     append(new LIR_Op2(lir_cmp, condition, left, right, info));
2165   }
2166   void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2167     cmp(condition, left, LIR_OprFact::intConst(right), info);
2168   }
2169 
2170   void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2171   void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2172 
2173   void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2174     append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2175   }
2176 
2177   void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2178                 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2179   void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2180                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2181   void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2182                LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2183 
2184   void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2185   void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp)                { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2186   void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp)              { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2187   void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2188 
2189   void add (LIR_Opr left, LIR_Opr right, LIR_Opr res)      { append(new LIR_Op2(lir_add, left, right, res)); }
2190   void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2191   void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2192   void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2193   void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL)      { append(new LIR_Op2(lir_div, left, right, res, info)); }
2194   void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2195   void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL)      { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2196 
2197   void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2198   void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2199 
2200   void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2201 
2202   void store_mem_int(jint v,    LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2203   void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2204   void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2205   void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2206   void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2207 
2208   void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2209   void idiv(LIR_Opr left, int   right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2210   void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2211   void irem(LIR_Opr left, int   right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2212 
2213   void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2214   void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2215 
2216   // jump is an unconditional branch
2217   void jump(BlockBegin* block) {
2218     append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2219   }
2220   void jump(CodeStub* stub) {
2221     append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2222   }
2223   void branch(LIR_Condition cond, BasicType type, Label* lbl)        { append(new LIR_OpBranch(cond, type, lbl)); }
2224   void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2225     assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2226     append(new LIR_OpBranch(cond, type, block));
2227   }
2228   void branch(LIR_Condition cond, BasicType type, CodeStub* stub)    {
2229     assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2230     append(new LIR_OpBranch(cond, type, stub));
2231   }
2232   void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2233     assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2234     append(new LIR_OpBranch(cond, type, block, unordered));
2235   }
2236 
2237   void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2238   void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2239   void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2240 
2241   void shift_left(LIR_Opr value, int count, LIR_Opr dst)       { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2242   void shift_right(LIR_Opr value, int count, LIR_Opr dst)      { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2243   void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2244 
2245   void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst)        { append(new LIR_Op2(lir_cmp_l2i,  left, right, dst)); }
2246   void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2247 
2248   void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2249     append(new LIR_OpRTCall(routine, tmp, result, arguments));
2250   }
2251 
2252   void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2253                     LIR_OprList* arguments, CodeEmitInfo* info) {
2254     append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2255   }
2256 
2257   void load_stack_address_monitor(int monitor_ix, LIR_Opr dst)  { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2258   void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2259   void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2260 
2261   void set_24bit_fpu()                                               { append(new LIR_Op0(lir_24bit_FPU )); }
2262   void restore_fpu()                                                 { append(new LIR_Op0(lir_reset_FPU )); }
2263   void breakpoint()                                                  { append(new LIR_Op0(lir_breakpoint)); }
2264 
2265   void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2266 
2267   void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)  { append(new LIR_OpUpdateCRC32(crc, val, res)); }
2268 
2269   void fpop_raw()                                { append(new LIR_Op0(lir_fpop_raw)); }
2270 
2271   void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2272   void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2273 
2274   void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2275                   LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2276                   CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2277                   ciMethod* profiled_method, int profiled_bci);
2278   // MethodData* profiling
2279   void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2280     append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass));
2281   }
2282   void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) {
2283     append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict));
2284   }
2285 
2286   void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); }
2287   void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); }
2288 #ifdef ASSERT
2289   void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); }
2290 #endif
2291 };
2292 
2293 void print_LIR(BlockList* blocks);
2294 
2295 class LIR_InsertionBuffer : public CompilationResourceObj {
2296  private:
2297   LIR_List*   _lir;   // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2298 
2299   // list of insertion points. index and count are stored alternately:
2300   // _index_and_count[i * 2]:     the index into lir list where "count" ops should be inserted
2301   // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2302   intStack    _index_and_count;
2303 
2304   // the LIR_Ops to be inserted
2305   LIR_OpList  _ops;
2306 
2307   void append_new(int index, int count)  { _index_and_count.append(index); _index_and_count.append(count); }
2308   void set_index_at(int i, int value)    { _index_and_count.at_put((i << 1),     value); }
2309   void set_count_at(int i, int value)    { _index_and_count.at_put((i << 1) + 1, value); }
2310 
2311 #ifdef ASSERT
2312   void verify();
2313 #endif
2314  public:
2315   LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2316 
2317   // must be called before using the insertion buffer
2318   void init(LIR_List* lir)  { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2319   bool initialized() const  { return _lir != NULL; }
2320   // called automatically when the buffer is appended to the LIR_List
2321   void finish()             { _lir = NULL; }
2322 
2323   // accessors
2324   LIR_List*  lir_list() const             { return _lir; }
2325   int number_of_insertion_points() const  { return _index_and_count.length() >> 1; }
2326   int index_at(int i) const               { return _index_and_count.at((i << 1));     }
2327   int count_at(int i) const               { return _index_and_count.at((i << 1) + 1); }
2328 
2329   int number_of_ops() const               { return _ops.length(); }
2330   LIR_Op* op_at(int i) const              { return _ops.at(i); }
2331 
2332   // append an instruction to the buffer
2333   void append(int index, LIR_Op* op);
2334 
2335   // instruction
2336   void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2337 };
2338 
2339 
2340 //
2341 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2342 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2343 // information about the input, output and temporaries used by the
2344 // op to be recorded.  It also records whether the op has call semantics
2345 // and also records all the CodeEmitInfos used by this op.
2346 //
2347 
2348 
2349 class LIR_OpVisitState: public StackObj {
2350  public:
2351   typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2352 
2353   enum {
2354     maxNumberOfOperands = 20,
2355     maxNumberOfInfos = 4
2356   };
2357 
2358  private:
2359   LIR_Op*          _op;
2360 
2361   // optimization: the operands and infos are not stored in a variable-length
2362   //               list, but in a fixed-size array to save time of size checks and resizing
2363   int              _oprs_len[numModes];
2364   LIR_Opr*         _oprs_new[numModes][maxNumberOfOperands];
2365   int _info_len;
2366   CodeEmitInfo*    _info_new[maxNumberOfInfos];
2367 
2368   bool             _has_call;
2369   bool             _has_slow_case;
2370 
2371 
2372   // only include register operands
2373   // addresses are decomposed to the base and index registers
2374   // constants and stack operands are ignored
2375   void append(LIR_Opr& opr, OprMode mode) {
2376     assert(opr->is_valid(), "should not call this otherwise");
2377     assert(mode >= 0 && mode < numModes, "bad mode");
2378 
2379     if (opr->is_register()) {
2380        assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2381       _oprs_new[mode][_oprs_len[mode]++] = &opr;
2382 
2383     } else if (opr->is_pointer()) {
2384       LIR_Address* address = opr->as_address_ptr();
2385       if (address != NULL) {
2386         // special handling for addresses: add base and index register of the address
2387         // both are always input operands or temp if we want to extend
2388         // their liveness!
2389         if (mode == outputMode) {
2390           mode = inputMode;
2391         }
2392         assert (mode == inputMode || mode == tempMode, "input or temp only for addresses");
2393         if (address->_base->is_valid()) {
2394           assert(address->_base->is_register(), "must be");
2395           assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2396           _oprs_new[mode][_oprs_len[mode]++] = &address->_base;
2397         }
2398         if (address->_index->is_valid()) {
2399           assert(address->_index->is_register(), "must be");
2400           assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2401           _oprs_new[mode][_oprs_len[mode]++] = &address->_index;
2402         }
2403 
2404       } else {
2405         assert(opr->is_constant(), "constant operands are not processed");
2406       }
2407     } else {
2408       assert(opr->is_stack(), "stack operands are not processed");
2409     }
2410   }
2411 
2412   void append(CodeEmitInfo* info) {
2413     assert(info != NULL, "should not call this otherwise");
2414     assert(_info_len < maxNumberOfInfos, "array overflow");
2415     _info_new[_info_len++] = info;
2416   }
2417 
2418  public:
2419   LIR_OpVisitState()         { reset(); }
2420 
2421   LIR_Op* op() const         { return _op; }
2422   void set_op(LIR_Op* op)    { reset(); _op = op; }
2423 
2424   bool has_call() const      { return _has_call; }
2425   bool has_slow_case() const { return _has_slow_case; }
2426 
2427   void reset() {
2428     _op = NULL;
2429     _has_call = false;
2430     _has_slow_case = false;
2431 
2432     _oprs_len[inputMode] = 0;
2433     _oprs_len[tempMode] = 0;
2434     _oprs_len[outputMode] = 0;
2435     _info_len = 0;
2436   }
2437 
2438 
2439   int opr_count(OprMode mode) const {
2440     assert(mode >= 0 && mode < numModes, "bad mode");
2441     return _oprs_len[mode];
2442   }
2443 
2444   LIR_Opr opr_at(OprMode mode, int index) const {
2445     assert(mode >= 0 && mode < numModes, "bad mode");
2446     assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2447     return *_oprs_new[mode][index];
2448   }
2449 
2450   void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2451     assert(mode >= 0 && mode < numModes, "bad mode");
2452     assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2453     *_oprs_new[mode][index] = opr;
2454   }
2455 
2456   int info_count() const {
2457     return _info_len;
2458   }
2459 
2460   CodeEmitInfo* info_at(int index) const {
2461     assert(index < _info_len, "index out of bounds");
2462     return _info_new[index];
2463   }
2464 
2465   XHandlers* all_xhandler();
2466 
2467   // collects all register operands of the instruction
2468   void visit(LIR_Op* op);
2469 
2470 #ifdef ASSERT
2471   // check that an operation has no operands
2472   bool no_operands(LIR_Op* op);
2473 #endif
2474 
2475   // LIR_Op visitor functions use these to fill in the state
2476   void do_input(LIR_Opr& opr)             { append(opr, LIR_OpVisitState::inputMode); }
2477   void do_output(LIR_Opr& opr)            { append(opr, LIR_OpVisitState::outputMode); }
2478   void do_temp(LIR_Opr& opr)              { append(opr, LIR_OpVisitState::tempMode); }
2479   void do_info(CodeEmitInfo* info)        { append(info); }
2480 
2481   void do_stub(CodeStub* stub);
2482   void do_call()                          { _has_call = true; }
2483   void do_slow_case()                     { _has_slow_case = true; }
2484   void do_slow_case(CodeEmitInfo* info) {
2485     _has_slow_case = true;
2486     append(info);
2487   }
2488 };
2489 
2490 
2491 inline LIR_Opr LIR_OprDesc::illegalOpr()   { return LIR_OprFact::illegalOpr; };
2492 
2493 #endif // SHARE_VM_C1_C1_LIR_HPP