1 /*
2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/assembler.inline.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_InstructionPrinter.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_MacroAssembler.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciInstance.hpp"
34 #include "gc/shared/barrierSet.hpp"
35 #include "runtime/os.hpp"
36
37 void LIR_Assembler::patching_epilog(PatchingStub* patch, LIR_PatchCode patch_code, Register obj, CodeEmitInfo* info) {
38 // We must have enough patching space so that call can be inserted.
39 // We cannot use fat nops here, since the concurrent code rewrite may transiently
40 // create the illegal instruction sequence.
41 while ((intx) _masm->pc() - (intx) patch->pc_start() < NativeGeneralJump::instruction_size) {
42 _masm->nop();
43 }
44 patch->install(_masm, patch_code, obj, info);
45 append_code_stub(patch);
46
47 #ifdef ASSERT
48 Bytecodes::Code code = info->scope()->method()->java_code_at_bci(info->stack()->bci());
49 if (patch->id() == PatchingStub::access_field_id) {
50 switch (code) {
51 case Bytecodes::_putstatic:
52 case Bytecodes::_getstatic:
53 case Bytecodes::_putfield:
54 case Bytecodes::_getfield:
55 break;
56 default:
57 ShouldNotReachHere();
58 }
59 } else if (patch->id() == PatchingStub::load_klass_id) {
60 switch (code) {
61 case Bytecodes::_new:
62 case Bytecodes::_anewarray:
63 case Bytecodes::_multianewarray:
64 case Bytecodes::_instanceof:
65 case Bytecodes::_checkcast:
66 break;
67 default:
68 ShouldNotReachHere();
69 }
70 } else if (patch->id() == PatchingStub::load_mirror_id) {
71 switch (code) {
72 case Bytecodes::_putstatic:
73 case Bytecodes::_getstatic:
74 case Bytecodes::_ldc:
75 case Bytecodes::_ldc_w:
76 break;
77 default:
78 ShouldNotReachHere();
79 }
80 } else if (patch->id() == PatchingStub::load_appendix_id) {
81 Bytecodes::Code bc_raw = info->scope()->method()->raw_code_at_bci(info->stack()->bci());
82 assert(Bytecodes::has_optional_appendix(bc_raw), "unexpected appendix resolution");
83 } else {
84 ShouldNotReachHere();
85 }
86 #endif
87 }
88
89 PatchingStub::PatchID LIR_Assembler::patching_id(CodeEmitInfo* info) {
90 IRScope* scope = info->scope();
91 Bytecodes::Code bc_raw = scope->method()->raw_code_at_bci(info->stack()->bci());
92 if (Bytecodes::has_optional_appendix(bc_raw)) {
93 return PatchingStub::load_appendix_id;
94 }
95 return PatchingStub::load_mirror_id;
96 }
97
98 //---------------------------------------------------------------
99
100
101 LIR_Assembler::LIR_Assembler(Compilation* c):
102 _masm(c->masm())
103 , _bs(BarrierSet::barrier_set())
104 , _compilation(c)
105 , _frame_map(c->frame_map())
106 , _current_block(NULL)
107 , _pending_non_safepoint(NULL)
108 , _pending_non_safepoint_offset(0)
109 {
110 _slow_case_stubs = new CodeStubList();
111 }
112
113
114 LIR_Assembler::~LIR_Assembler() {
115 }
116
117
118 void LIR_Assembler::check_codespace() {
119 CodeSection* cs = _masm->code_section();
120 if (cs->remaining() < (int)(NOT_LP64(1*K)LP64_ONLY(2*K))) {
121 BAILOUT("CodeBuffer overflow");
122 }
123 }
124
125
126 void LIR_Assembler::append_code_stub(CodeStub* stub) {
127 _slow_case_stubs->append(stub);
128 }
129
130 void LIR_Assembler::emit_stubs(CodeStubList* stub_list) {
131 for (int m = 0; m < stub_list->length(); m++) {
132 CodeStub* s = stub_list->at(m);
133
134 check_codespace();
135 CHECK_BAILOUT();
136
137 #ifndef PRODUCT
138 if (CommentedAssembly) {
139 stringStream st;
140 s->print_name(&st);
141 st.print(" slow case");
142 _masm->block_comment(st.as_string());
143 }
144 #endif
145 s->emit_code(this);
146 #ifdef ASSERT
147 s->assert_no_unbound_labels();
148 #endif
149 }
150 }
151
152
153 void LIR_Assembler::emit_slow_case_stubs() {
154 emit_stubs(_slow_case_stubs);
155 }
156
157
158 bool LIR_Assembler::needs_icache(ciMethod* method) const {
159 return !method->is_static();
160 }
161
162
163 int LIR_Assembler::code_offset() const {
164 return _masm->offset();
165 }
166
167
168 address LIR_Assembler::pc() const {
169 return _masm->pc();
170 }
171
172 // To bang the stack of this compiled method we use the stack size
173 // that the interpreter would need in case of a deoptimization. This
174 // removes the need to bang the stack in the deoptimization blob which
175 // in turn simplifies stack overflow handling.
176 int LIR_Assembler::bang_size_in_bytes() const {
177 return MAX2(initial_frame_size_in_bytes() + os::extra_bang_size_in_bytes(), _compilation->interpreter_frame_size());
178 }
179
180 void LIR_Assembler::emit_exception_entries(ExceptionInfoList* info_list) {
181 for (int i = 0; i < info_list->length(); i++) {
182 XHandlers* handlers = info_list->at(i)->exception_handlers();
183
184 for (int j = 0; j < handlers->length(); j++) {
185 XHandler* handler = handlers->handler_at(j);
186 assert(handler->lir_op_id() != -1, "handler not processed by LinearScan");
187 assert(handler->entry_code() == NULL ||
188 handler->entry_code()->instructions_list()->last()->code() == lir_branch ||
189 handler->entry_code()->instructions_list()->last()->code() == lir_delay_slot, "last operation must be branch");
190
191 if (handler->entry_pco() == -1) {
192 // entry code not emitted yet
193 if (handler->entry_code() != NULL && handler->entry_code()->instructions_list()->length() > 1) {
194 handler->set_entry_pco(code_offset());
195 if (CommentedAssembly) {
196 _masm->block_comment("Exception adapter block");
197 }
198 emit_lir_list(handler->entry_code());
199 } else {
200 handler->set_entry_pco(handler->entry_block()->exception_handler_pco());
201 }
202
203 assert(handler->entry_pco() != -1, "must be set now");
204 }
205 }
206 }
207 }
208
209
210 void LIR_Assembler::emit_code(BlockList* hir) {
211 if (PrintLIR) {
212 print_LIR(hir);
213 }
214
215 int n = hir->length();
216 for (int i = 0; i < n; i++) {
217 emit_block(hir->at(i));
218 CHECK_BAILOUT();
219 }
220
221 flush_debug_info(code_offset());
222
223 DEBUG_ONLY(check_no_unbound_labels());
224 }
225
226
227 void LIR_Assembler::emit_block(BlockBegin* block) {
228 if (block->is_set(BlockBegin::backward_branch_target_flag)) {
229 align_backward_branch_target();
230 }
231
232 // if this block is the start of an exception handler, record the
233 // PC offset of the first instruction for later construction of
234 // the ExceptionHandlerTable
235 if (block->is_set(BlockBegin::exception_entry_flag)) {
236 block->set_exception_handler_pco(code_offset());
237 }
238
239 #ifndef PRODUCT
240 if (PrintLIRWithAssembly) {
241 // don't print Phi's
242 InstructionPrinter ip(false);
243 block->print(ip);
244 }
245 #endif /* PRODUCT */
246
247 assert(block->lir() != NULL, "must have LIR");
248 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
249
250 #ifndef PRODUCT
251 if (CommentedAssembly) {
252 stringStream st;
253 st.print_cr(" block B%d [%d, %d]", block->block_id(), block->bci(), block->end()->printable_bci());
254 _masm->block_comment(st.as_string());
255 }
256 #endif
257
258 emit_lir_list(block->lir());
259
260 X86_ONLY(assert(_masm->rsp_offset() == 0, "frame size should be fixed"));
261 }
262
263
264 void LIR_Assembler::emit_lir_list(LIR_List* list) {
265 peephole(list);
266
267 int n = list->length();
268 for (int i = 0; i < n; i++) {
269 LIR_Op* op = list->at(i);
270
271 check_codespace();
272 CHECK_BAILOUT();
273
274 #ifndef PRODUCT
275 if (CommentedAssembly) {
276 // Don't record out every op since that's too verbose. Print
277 // branches since they include block and stub names. Also print
278 // patching moves since they generate funny looking code.
279 if (op->code() == lir_branch ||
280 (op->code() == lir_move && op->as_Op1()->patch_code() != lir_patch_none) ||
281 (op->code() == lir_leal && op->as_Op1()->patch_code() != lir_patch_none)) {
282 stringStream st;
283 op->print_on(&st);
284 _masm->block_comment(st.as_string());
285 }
286 }
287 if (PrintLIRWithAssembly) {
288 // print out the LIR operation followed by the resulting assembly
289 list->at(i)->print(); tty->cr();
290 }
291 #endif /* PRODUCT */
292
293 op->emit_code(this);
294
295 if (compilation()->debug_info_recorder()->recording_non_safepoints()) {
296 process_debug_info(op);
297 }
298
299 #ifndef PRODUCT
300 if (PrintLIRWithAssembly) {
301 _masm->code()->decode();
302 }
303 #endif /* PRODUCT */
304 }
305 }
306
307 #ifdef ASSERT
308 void LIR_Assembler::check_no_unbound_labels() {
309 CHECK_BAILOUT();
310
311 for (int i = 0; i < _branch_target_blocks.length() - 1; i++) {
312 if (!_branch_target_blocks.at(i)->label()->is_bound()) {
313 tty->print_cr("label of block B%d is not bound", _branch_target_blocks.at(i)->block_id());
314 assert(false, "unbound label");
315 }
316 }
317 }
318 #endif
319
320 //----------------------------------debug info--------------------------------
321
322
323 void LIR_Assembler::add_debug_info_for_branch(CodeEmitInfo* info) {
324 int pc_offset = code_offset();
325 flush_debug_info(pc_offset);
326 info->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
327 if (info->exception_handlers() != NULL) {
328 compilation()->add_exception_handlers_for_pco(pc_offset, info->exception_handlers());
329 }
330 }
331
332
333 void LIR_Assembler::add_call_info(int pc_offset, CodeEmitInfo* cinfo) {
334 flush_debug_info(pc_offset);
335 cinfo->record_debug_info(compilation()->debug_info_recorder(), pc_offset);
336 if (cinfo->exception_handlers() != NULL) {
337 compilation()->add_exception_handlers_for_pco(pc_offset, cinfo->exception_handlers());
338 }
339 }
340
341 static ValueStack* debug_info(Instruction* ins) {
342 StateSplit* ss = ins->as_StateSplit();
343 if (ss != NULL) return ss->state();
344 return ins->state_before();
345 }
346
347 void LIR_Assembler::process_debug_info(LIR_Op* op) {
348 Instruction* src = op->source();
349 if (src == NULL) return;
350 int pc_offset = code_offset();
351 if (_pending_non_safepoint == src) {
352 _pending_non_safepoint_offset = pc_offset;
353 return;
354 }
355 ValueStack* vstack = debug_info(src);
356 if (vstack == NULL) return;
357 if (_pending_non_safepoint != NULL) {
358 // Got some old debug info. Get rid of it.
359 if (debug_info(_pending_non_safepoint) == vstack) {
360 _pending_non_safepoint_offset = pc_offset;
361 return;
362 }
363 if (_pending_non_safepoint_offset < pc_offset) {
364 record_non_safepoint_debug_info();
365 }
366 _pending_non_safepoint = NULL;
367 }
368 // Remember the debug info.
369 if (pc_offset > compilation()->debug_info_recorder()->last_pc_offset()) {
370 _pending_non_safepoint = src;
371 _pending_non_safepoint_offset = pc_offset;
372 }
373 }
374
375 // Index caller states in s, where 0 is the oldest, 1 its callee, etc.
376 // Return NULL if n is too large.
377 // Returns the caller_bci for the next-younger state, also.
378 static ValueStack* nth_oldest(ValueStack* s, int n, int& bci_result) {
379 ValueStack* t = s;
380 for (int i = 0; i < n; i++) {
381 if (t == NULL) break;
382 t = t->caller_state();
383 }
384 if (t == NULL) return NULL;
385 for (;;) {
386 ValueStack* tc = t->caller_state();
387 if (tc == NULL) return s;
388 t = tc;
389 bci_result = tc->bci();
390 s = s->caller_state();
391 }
392 }
393
394 void LIR_Assembler::record_non_safepoint_debug_info() {
395 int pc_offset = _pending_non_safepoint_offset;
396 ValueStack* vstack = debug_info(_pending_non_safepoint);
397 int bci = vstack->bci();
398
399 DebugInformationRecorder* debug_info = compilation()->debug_info_recorder();
400 assert(debug_info->recording_non_safepoints(), "sanity");
401
402 debug_info->add_non_safepoint(pc_offset);
403
404 // Visit scopes from oldest to youngest.
405 for (int n = 0; ; n++) {
406 int s_bci = bci;
407 ValueStack* s = nth_oldest(vstack, n, s_bci);
408 if (s == NULL) break;
409 IRScope* scope = s->scope();
410 //Always pass false for reexecute since these ScopeDescs are never used for deopt
411 methodHandle null_mh;
412 debug_info->describe_scope(pc_offset, null_mh, scope->method(), s->bci(), false/*reexecute*/);
413 }
414
415 debug_info->end_non_safepoint(pc_offset);
416 }
417
418
419 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check_here(CodeEmitInfo* cinfo) {
420 return add_debug_info_for_null_check(code_offset(), cinfo);
421 }
422
423 ImplicitNullCheckStub* LIR_Assembler::add_debug_info_for_null_check(int pc_offset, CodeEmitInfo* cinfo) {
424 ImplicitNullCheckStub* stub = new ImplicitNullCheckStub(pc_offset, cinfo);
425 append_code_stub(stub);
426 return stub;
427 }
428
429 void LIR_Assembler::add_debug_info_for_div0_here(CodeEmitInfo* info) {
430 add_debug_info_for_div0(code_offset(), info);
431 }
432
433 void LIR_Assembler::add_debug_info_for_div0(int pc_offset, CodeEmitInfo* cinfo) {
434 DivByZeroStub* stub = new DivByZeroStub(pc_offset, cinfo);
435 append_code_stub(stub);
436 }
437
438 void LIR_Assembler::emit_rtcall(LIR_OpRTCall* op) {
439 rt_call(op->result_opr(), op->addr(), op->arguments(), op->tmp(), op->info());
440 }
441
442
443 void LIR_Assembler::emit_call(LIR_OpJavaCall* op) {
444 verify_oop_map(op->info());
445
446 if (os::is_MP()) {
447 // must align calls sites, otherwise they can't be updated atomically on MP hardware
448 align_call(op->code());
449 }
450
451 // emit the static call stub stuff out of line
452 emit_static_call_stub();
453 CHECK_BAILOUT();
454
455 switch (op->code()) {
456 case lir_static_call:
457 case lir_dynamic_call:
458 call(op, relocInfo::static_call_type);
459 break;
460 case lir_optvirtual_call:
461 call(op, relocInfo::opt_virtual_call_type);
462 break;
463 case lir_icvirtual_call:
464 ic_call(op);
465 break;
466 case lir_virtual_call:
467 vtable_call(op);
468 break;
469 default:
470 fatal("unexpected op code: %s", op->name());
471 break;
472 }
473
474 // JSR 292
475 // Record if this method has MethodHandle invokes.
476 if (op->is_method_handle_invoke()) {
477 compilation()->set_has_method_handle_invokes(true);
478 }
479
480 #if defined(X86) && defined(TIERED)
481 // C2 leave fpu stack dirty clean it
482 if (UseSSE < 2) {
483 int i;
484 for ( i = 1; i <= 7 ; i++ ) {
485 ffree(i);
486 }
487 if (!op->result_opr()->is_float_kind()) {
488 ffree(0);
489 }
490 }
491 #endif // X86 && TIERED
492 }
493
494
495 void LIR_Assembler::emit_opLabel(LIR_OpLabel* op) {
496 _masm->bind (*(op->label()));
497 }
498
499
500 void LIR_Assembler::emit_op1(LIR_Op1* op) {
501 switch (op->code()) {
502 case lir_move:
503 if (op->move_kind() == lir_move_volatile) {
504 assert(op->patch_code() == lir_patch_none, "can't patch volatiles");
505 volatile_move_op(op->in_opr(), op->result_opr(), op->type(), op->info());
506 } else {
507 move_op(op->in_opr(), op->result_opr(), op->type(),
508 op->patch_code(), op->info(), op->pop_fpu_stack(),
509 op->move_kind() == lir_move_unaligned,
510 op->move_kind() == lir_move_wide);
511 }
512 break;
513
514 case lir_roundfp: {
515 LIR_OpRoundFP* round_op = op->as_OpRoundFP();
516 roundfp_op(round_op->in_opr(), round_op->tmp(), round_op->result_opr(), round_op->pop_fpu_stack());
517 break;
518 }
519
520 case lir_return:
521 return_op(op->in_opr());
522 break;
523
524 case lir_safepoint:
525 if (compilation()->debug_info_recorder()->last_pc_offset() == code_offset()) {
526 _masm->nop();
527 }
528 safepoint_poll(op->in_opr(), op->info());
529 break;
530
531 case lir_fxch:
532 fxch(op->in_opr()->as_jint());
533 break;
534
535 case lir_fld:
536 fld(op->in_opr()->as_jint());
537 break;
538
539 case lir_ffree:
540 ffree(op->in_opr()->as_jint());
541 break;
542
543 case lir_branch:
544 break;
545
546 case lir_push:
547 push(op->in_opr());
548 break;
549
550 case lir_pop:
551 pop(op->in_opr());
552 break;
553
554 case lir_neg:
555 negate(op->in_opr(), op->result_opr());
556 break;
557
558 case lir_leal:
559 leal(op->in_opr(), op->result_opr(), op->patch_code(), op->info());
560 break;
561
562 case lir_null_check: {
563 ImplicitNullCheckStub* stub = add_debug_info_for_null_check_here(op->info());
564
565 if (op->in_opr()->is_single_cpu()) {
566 _masm->null_check(op->in_opr()->as_register(), stub->entry());
567 } else {
568 Unimplemented();
569 }
570 break;
571 }
572
573 case lir_monaddr:
574 monitor_address(op->in_opr()->as_constant_ptr()->as_jint(), op->result_opr());
575 break;
576
577 #ifdef SPARC
578 case lir_pack64:
579 pack64(op->in_opr(), op->result_opr());
580 break;
581
582 case lir_unpack64:
583 unpack64(op->in_opr(), op->result_opr());
584 break;
585 #endif
586
587 case lir_unwind:
588 unwind_op(op->in_opr());
589 break;
590
591 default:
592 Unimplemented();
593 break;
594 }
595 }
596
597
598 void LIR_Assembler::emit_op0(LIR_Op0* op) {
599 switch (op->code()) {
600 case lir_word_align: {
601 _masm->align(BytesPerWord);
602 break;
603 }
604
605 case lir_nop:
606 assert(op->info() == NULL, "not supported");
607 _masm->nop();
608 break;
609
610 case lir_label:
611 Unimplemented();
612 break;
613
614 case lir_build_frame:
615 build_frame();
616 break;
617
618 case lir_std_entry:
619 // init offsets
620 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
621 _masm->align(CodeEntryAlignment);
622 if (needs_icache(compilation()->method())) {
623 check_icache();
624 }
625 offsets()->set_value(CodeOffsets::Verified_Entry, _masm->offset());
626 _masm->verified_entry();
627 build_frame();
628 offsets()->set_value(CodeOffsets::Frame_Complete, _masm->offset());
629 break;
630
631 case lir_osr_entry:
632 offsets()->set_value(CodeOffsets::OSR_Entry, _masm->offset());
633 osr_entry();
634 break;
635
636 case lir_24bit_FPU:
637 set_24bit_FPU();
638 break;
639
640 case lir_reset_FPU:
641 reset_FPU();
642 break;
643
644 case lir_breakpoint:
645 breakpoint();
646 break;
647
648 case lir_fpop_raw:
649 fpop();
650 break;
651
652 case lir_membar:
653 membar();
654 break;
655
656 case lir_membar_acquire:
657 membar_acquire();
658 break;
659
660 case lir_membar_release:
661 membar_release();
662 break;
663
664 case lir_membar_loadload:
665 membar_loadload();
666 break;
667
668 case lir_membar_storestore:
669 membar_storestore();
670 break;
671
672 case lir_membar_loadstore:
673 membar_loadstore();
674 break;
675
676 case lir_membar_storeload:
677 membar_storeload();
678 break;
679
680 case lir_get_thread:
681 get_thread(op->result_opr());
682 break;
683
684 case lir_on_spin_wait:
685 on_spin_wait();
686 break;
687
688 default:
689 ShouldNotReachHere();
690 break;
691 }
692 }
693
694
695 void LIR_Assembler::emit_op2(LIR_Op2* op) {
696 switch (op->code()) {
697 case lir_cmp:
698 if (op->info() != NULL) {
699 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
700 "shouldn't be codeemitinfo for non-address operands");
701 add_debug_info_for_null_check_here(op->info()); // exception possible
702 }
703 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
704 break;
705
706 case lir_cmp_l2i:
707 case lir_cmp_fd2i:
708 case lir_ucmp_fd2i:
709 comp_fl2i(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
710 break;
711
712 case lir_cmove:
713 cmove(op->condition(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->type());
714 break;
715
716 case lir_shl:
717 case lir_shr:
718 case lir_ushr:
719 if (op->in_opr2()->is_constant()) {
720 shift_op(op->code(), op->in_opr1(), op->in_opr2()->as_constant_ptr()->as_jint(), op->result_opr());
721 } else {
722 shift_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
723 }
724 break;
725
726 case lir_add:
727 case lir_sub:
728 case lir_mul:
729 case lir_mul_strictfp:
730 case lir_div:
731 case lir_div_strictfp:
732 case lir_rem:
733 assert(op->fpu_pop_count() < 2, "");
734 arith_op(
735 op->code(),
736 op->in_opr1(),
737 op->in_opr2(),
738 op->result_opr(),
739 op->info(),
740 op->fpu_pop_count() == 1);
741 break;
742
743 case lir_abs:
744 case lir_sqrt:
745 case lir_tan:
746 case lir_log10:
747 intrinsic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op);
748 break;
749
750 case lir_logic_and:
751 case lir_logic_or:
752 case lir_logic_xor:
753 logic_op(
754 op->code(),
755 op->in_opr1(),
756 op->in_opr2(),
757 op->result_opr());
758 break;
759
760 case lir_throw:
761 throw_op(op->in_opr1(), op->in_opr2(), op->info());
762 break;
763
764 case lir_xadd:
765 case lir_xchg:
766 atomic_op(op->code(), op->in_opr1(), op->in_opr2(), op->result_opr(), op->tmp1_opr());
767 break;
768
769 default:
770 Unimplemented();
771 break;
772 }
773 }
774
775
776 void LIR_Assembler::build_frame() {
777 _masm->build_frame(initial_frame_size_in_bytes(), bang_size_in_bytes());
778 }
779
780
781 void LIR_Assembler::roundfp_op(LIR_Opr src, LIR_Opr tmp, LIR_Opr dest, bool pop_fpu_stack) {
782 assert((src->is_single_fpu() && dest->is_single_stack()) ||
783 (src->is_double_fpu() && dest->is_double_stack()),
784 "round_fp: rounds register -> stack location");
785
786 reg2stack (src, dest, src->type(), pop_fpu_stack);
787 }
788
789
790 void LIR_Assembler::move_op(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool pop_fpu_stack, bool unaligned, bool wide) {
791 if (src->is_register()) {
792 if (dest->is_register()) {
793 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
794 reg2reg(src, dest);
795 } else if (dest->is_stack()) {
796 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
797 reg2stack(src, dest, type, pop_fpu_stack);
798 } else if (dest->is_address()) {
799 reg2mem(src, dest, type, patch_code, info, pop_fpu_stack, wide, unaligned);
800 } else {
801 ShouldNotReachHere();
802 }
803
804 } else if (src->is_stack()) {
805 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
806 if (dest->is_register()) {
807 stack2reg(src, dest, type);
808 } else if (dest->is_stack()) {
809 stack2stack(src, dest, type);
810 } else {
811 ShouldNotReachHere();
812 }
813
814 } else if (src->is_constant()) {
815 if (dest->is_register()) {
816 const2reg(src, dest, patch_code, info); // patching is possible
817 } else if (dest->is_stack()) {
818 assert(patch_code == lir_patch_none && info == NULL, "no patching and info allowed here");
819 const2stack(src, dest);
820 } else if (dest->is_address()) {
821 assert(patch_code == lir_patch_none, "no patching allowed here");
822 const2mem(src, dest, type, info, wide);
823 } else {
824 ShouldNotReachHere();
825 }
826
827 } else if (src->is_address()) {
828 mem2reg(src, dest, type, patch_code, info, wide, unaligned);
829
830 } else {
831 ShouldNotReachHere();
832 }
833 }
834
835
836 void LIR_Assembler::verify_oop_map(CodeEmitInfo* info) {
837 #ifndef PRODUCT
838 if (VerifyOops) {
839 OopMapStream s(info->oop_map());
840 while (!s.is_done()) {
841 OopMapValue v = s.current();
842 if (v.is_oop()) {
843 VMReg r = v.reg();
844 if (!r->is_stack()) {
845 stringStream st;
846 st.print("bad oop %s at %d", r->as_Register()->name(), _masm->offset());
847 #ifdef SPARC
848 _masm->_verify_oop(r->as_Register(), os::strdup(st.as_string(), mtCompiler), __FILE__, __LINE__);
849 #else
850 _masm->verify_oop(r->as_Register());
851 #endif
852 } else {
853 _masm->verify_stack_oop(r->reg2stack() * VMRegImpl::stack_slot_size);
854 }
855 }
856 check_codespace();
857 CHECK_BAILOUT();
858
859 s.next();
860 }
861 }
862 #endif
863 }