1 /*
2 * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "oops/compiledICHolder.hpp"
33 #include "prims/jvmtiRedefineClassesTrace.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/vframeArray.hpp"
36 #include "vmreg_x86.inline.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_Runtime1.hpp"
39 #endif
40 #ifdef COMPILER2
41 #include "opto/runtime.hpp"
42 #endif
43
44 #define __ masm->
45
46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
47
48 class RegisterSaver {
49 // Capture info about frame layout
50 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
51 enum layout {
52 fpu_state_off = 0,
53 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
54 st0_off, st0H_off,
55 st1_off, st1H_off,
56 st2_off, st2H_off,
57 st3_off, st3H_off,
58 st4_off, st4H_off,
59 st5_off, st5H_off,
60 st6_off, st6H_off,
61 st7_off, st7H_off,
62 xmm_off,
63 DEF_XMM_OFFS(0),
64 DEF_XMM_OFFS(1),
65 DEF_XMM_OFFS(2),
66 DEF_XMM_OFFS(3),
67 DEF_XMM_OFFS(4),
68 DEF_XMM_OFFS(5),
69 DEF_XMM_OFFS(6),
70 DEF_XMM_OFFS(7),
71 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
72 rdi_off,
73 rsi_off,
74 ignore_off, // extra copy of rbp,
75 rsp_off,
76 rbx_off,
77 rdx_off,
78 rcx_off,
79 rax_off,
80 // The frame sender code expects that rbp will be in the "natural" place and
81 // will override any oopMap setting for it. We must therefore force the layout
82 // so that it agrees with the frame sender code.
83 rbp_off,
84 return_off, // slot for return address
85 reg_save_size };
86 enum { FPU_regs_live = flags_off - fpu_state_end };
87
88 public:
89
90 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
91 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
92 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
93
94 static int rax_offset() { return rax_off; }
95 static int rbx_offset() { return rbx_off; }
96
97 // Offsets into the register save area
98 // Used by deoptimization when it is managing result register
99 // values on its own
100
101 static int raxOffset(void) { return rax_off; }
102 static int rdxOffset(void) { return rdx_off; }
103 static int rbxOffset(void) { return rbx_off; }
104 static int xmm0Offset(void) { return xmm0_off; }
105 // This really returns a slot in the fp save area, which one is not important
106 static int fpResultOffset(void) { return st0_off; }
107
108 // During deoptimization only the result register need to be restored
109 // all the other values have already been extracted.
110
111 static void restore_result_registers(MacroAssembler* masm);
112
113 };
114
115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
116 int* total_frame_words, bool verify_fpu, bool save_vectors) {
117 int vect_words = 0;
118 #ifdef COMPILER2
119 if (save_vectors) {
120 assert(UseAVX > 0, "256bit vectors are supported only with AVX");
121 assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
122 // Save upper half of YMM registes
123 vect_words = 8 * 16 / wordSize;
124 additional_frame_words += vect_words;
125 }
126 #else
127 assert(!save_vectors, "vectors are generated only by C2");
128 #endif
129 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
130 int frame_words = frame_size_in_bytes / wordSize;
131 *total_frame_words = frame_words;
132
133 assert(FPUStateSizeInWords == 27, "update stack layout");
134
135 // save registers, fpu state, and flags
136 // We assume caller has already has return address slot on the stack
137 // We push epb twice in this sequence because we want the real rbp,
138 // to be under the return like a normal enter and we want to use pusha
139 // We push by hand instead of pusing push
140 __ enter();
141 __ pusha();
142 __ pushf();
143 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
144 __ push_FPU_state(); // Save FPU state & init
145
146 if (verify_fpu) {
147 // Some stubs may have non standard FPU control word settings so
148 // only check and reset the value when it required to be the
149 // standard value. The safepoint blob in particular can be used
150 // in methods which are using the 24 bit control word for
151 // optimized float math.
152
153 #ifdef ASSERT
154 // Make sure the control word has the expected value
155 Label ok;
156 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
157 __ jccb(Assembler::equal, ok);
158 __ stop("corrupted control word detected");
159 __ bind(ok);
160 #endif
161
162 // Reset the control word to guard against exceptions being unmasked
163 // since fstp_d can cause FPU stack underflow exceptions. Write it
164 // into the on stack copy and then reload that to make sure that the
165 // current and future values are correct.
166 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
167 }
168
169 __ frstor(Address(rsp, 0));
170 if (!verify_fpu) {
171 // Set the control word so that exceptions are masked for the
172 // following code.
173 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
174 }
175
176 // Save the FPU registers in de-opt-able form
177
178 __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0)
179 __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1)
180 __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2)
181 __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3)
182 __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4)
183 __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5)
184 __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6)
185 __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7)
186
187 if( UseSSE == 1 ) { // Save the XMM state
188 __ movflt(Address(rsp,xmm0_off*wordSize),xmm0);
189 __ movflt(Address(rsp,xmm1_off*wordSize),xmm1);
190 __ movflt(Address(rsp,xmm2_off*wordSize),xmm2);
191 __ movflt(Address(rsp,xmm3_off*wordSize),xmm3);
192 __ movflt(Address(rsp,xmm4_off*wordSize),xmm4);
193 __ movflt(Address(rsp,xmm5_off*wordSize),xmm5);
194 __ movflt(Address(rsp,xmm6_off*wordSize),xmm6);
195 __ movflt(Address(rsp,xmm7_off*wordSize),xmm7);
196 } else if( UseSSE >= 2 ) {
197 // Save whole 128bit (16 bytes) XMM regiters
198 __ movdqu(Address(rsp,xmm0_off*wordSize),xmm0);
199 __ movdqu(Address(rsp,xmm1_off*wordSize),xmm1);
200 __ movdqu(Address(rsp,xmm2_off*wordSize),xmm2);
201 __ movdqu(Address(rsp,xmm3_off*wordSize),xmm3);
202 __ movdqu(Address(rsp,xmm4_off*wordSize),xmm4);
203 __ movdqu(Address(rsp,xmm5_off*wordSize),xmm5);
204 __ movdqu(Address(rsp,xmm6_off*wordSize),xmm6);
205 __ movdqu(Address(rsp,xmm7_off*wordSize),xmm7);
206 }
207
208 if (vect_words > 0) {
209 assert(vect_words*wordSize == 128, "");
210 __ subptr(rsp, 128); // Save upper half of YMM registes
211 __ vextractf128h(Address(rsp, 0),xmm0);
212 __ vextractf128h(Address(rsp, 16),xmm1);
213 __ vextractf128h(Address(rsp, 32),xmm2);
214 __ vextractf128h(Address(rsp, 48),xmm3);
215 __ vextractf128h(Address(rsp, 64),xmm4);
216 __ vextractf128h(Address(rsp, 80),xmm5);
217 __ vextractf128h(Address(rsp, 96),xmm6);
218 __ vextractf128h(Address(rsp,112),xmm7);
219 }
220
221 // Set an oopmap for the call site. This oopmap will map all
222 // oop-registers and debug-info registers as callee-saved. This
223 // will allow deoptimization at this safepoint to find all possible
224 // debug-info recordings, as well as let GC find all oops.
225
226 OopMapSet *oop_maps = new OopMapSet();
227 OopMap* map = new OopMap( frame_words, 0 );
228
229 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
230
231 map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg());
232 map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg());
233 map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg());
234 map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg());
235 // rbp, location is known implicitly, no oopMap
236 map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg());
237 map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg());
238 map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg());
240 map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg());
241 map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg());
242 map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg());
243 map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg());
244 map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg());
245 map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg());
246 map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg());
247 map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg());
248 map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg());
249 map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg());
250 map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg());
251 map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg());
252 map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg());
253 map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg());
254 // %%% This is really a waste but we'll keep things as they were for now
255 if (true) {
256 #define NEXTREG(x) (x)->as_VMReg()->next()
257 map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0)));
258 map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1)));
259 map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2)));
260 map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3)));
261 map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4)));
262 map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5)));
263 map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6)));
264 map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7)));
265 map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0));
266 map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1));
267 map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2));
268 map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3));
269 map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4));
270 map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5));
271 map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6));
272 map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7));
273 #undef NEXTREG
274 #undef STACK_OFFSET
275 }
276
277 return map;
278
279 }
280
281 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
282 // Recover XMM & FPU state
283 int additional_frame_bytes = 0;
284 #ifdef COMPILER2
285 if (restore_vectors) {
286 assert(UseAVX > 0, "256bit vectors are supported only with AVX");
287 assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
288 additional_frame_bytes = 128;
289 }
290 #else
291 assert(!restore_vectors, "vectors are generated only by C2");
292 #endif
293 if (UseSSE == 1) {
294 assert(additional_frame_bytes == 0, "");
295 __ movflt(xmm0,Address(rsp,xmm0_off*wordSize));
296 __ movflt(xmm1,Address(rsp,xmm1_off*wordSize));
297 __ movflt(xmm2,Address(rsp,xmm2_off*wordSize));
298 __ movflt(xmm3,Address(rsp,xmm3_off*wordSize));
299 __ movflt(xmm4,Address(rsp,xmm4_off*wordSize));
300 __ movflt(xmm5,Address(rsp,xmm5_off*wordSize));
301 __ movflt(xmm6,Address(rsp,xmm6_off*wordSize));
302 __ movflt(xmm7,Address(rsp,xmm7_off*wordSize));
303 } else if (UseSSE >= 2) {
304 #define STACK_ADDRESS(x) Address(rsp,(x)*wordSize + additional_frame_bytes)
305 __ movdqu(xmm0,STACK_ADDRESS(xmm0_off));
306 __ movdqu(xmm1,STACK_ADDRESS(xmm1_off));
307 __ movdqu(xmm2,STACK_ADDRESS(xmm2_off));
308 __ movdqu(xmm3,STACK_ADDRESS(xmm3_off));
309 __ movdqu(xmm4,STACK_ADDRESS(xmm4_off));
310 __ movdqu(xmm5,STACK_ADDRESS(xmm5_off));
311 __ movdqu(xmm6,STACK_ADDRESS(xmm6_off));
312 __ movdqu(xmm7,STACK_ADDRESS(xmm7_off));
313 #undef STACK_ADDRESS
314 }
315 if (restore_vectors) {
316 // Restore upper half of YMM registes.
317 assert(additional_frame_bytes == 128, "");
318 __ vinsertf128h(xmm0, Address(rsp, 0));
319 __ vinsertf128h(xmm1, Address(rsp, 16));
320 __ vinsertf128h(xmm2, Address(rsp, 32));
321 __ vinsertf128h(xmm3, Address(rsp, 48));
322 __ vinsertf128h(xmm4, Address(rsp, 64));
323 __ vinsertf128h(xmm5, Address(rsp, 80));
324 __ vinsertf128h(xmm6, Address(rsp, 96));
325 __ vinsertf128h(xmm7, Address(rsp,112));
326 __ addptr(rsp, additional_frame_bytes);
327 }
328 __ pop_FPU_state();
329 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
330
331 __ popf();
332 __ popa();
333 // Get the rbp, described implicitly by the frame sender code (no oopMap)
334 __ pop(rbp);
335
336 }
337
338 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
339
340 // Just restore result register. Only used by deoptimization. By
341 // now any callee save register that needs to be restore to a c2
342 // caller of the deoptee has been extracted into the vframeArray
343 // and will be stuffed into the c2i adapter we create for later
344 // restoration so only result registers need to be restored here.
345 //
346
347 __ frstor(Address(rsp, 0)); // Restore fpu state
348
349 // Recover XMM & FPU state
350 if( UseSSE == 1 ) {
351 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
352 } else if( UseSSE >= 2 ) {
353 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
354 }
355 __ movptr(rax, Address(rsp, rax_off*wordSize));
356 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
357 // Pop all of the register save are off the stack except the return address
358 __ addptr(rsp, return_off * wordSize);
359 }
360
361 // Is vector's size (in bytes) bigger than a size saved by default?
362 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
363 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
364 bool SharedRuntime::is_wide_vector(int size) {
365 return size > 16;
366 }
367
368 // The java_calling_convention describes stack locations as ideal slots on
369 // a frame with no abi restrictions. Since we must observe abi restrictions
370 // (like the placement of the register window) the slots must be biased by
371 // the following value.
372 static int reg2offset_in(VMReg r) {
373 // Account for saved rbp, and return address
374 // This should really be in_preserve_stack_slots
375 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
376 }
377
378 static int reg2offset_out(VMReg r) {
379 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
380 }
381
382 // ---------------------------------------------------------------------------
383 // Read the array of BasicTypes from a signature, and compute where the
384 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
385 // quantities. Values less than SharedInfo::stack0 are registers, those above
386 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
387 // as framesizes are fixed.
388 // VMRegImpl::stack0 refers to the first slot 0(sp).
389 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
390 // up to RegisterImpl::number_of_registers) are the 32-bit
391 // integer registers.
392
393 // Pass first two oop/int args in registers ECX and EDX.
394 // Pass first two float/double args in registers XMM0 and XMM1.
395 // Doubles have precedence, so if you pass a mix of floats and doubles
396 // the doubles will grab the registers before the floats will.
397
398 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
399 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
400 // units regardless of build. Of course for i486 there is no 64 bit build
401
402
403 // ---------------------------------------------------------------------------
404 // The compiled Java calling convention.
405 // Pass first two oop/int args in registers ECX and EDX.
406 // Pass first two float/double args in registers XMM0 and XMM1.
407 // Doubles have precedence, so if you pass a mix of floats and doubles
408 // the doubles will grab the registers before the floats will.
409 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
410 VMRegPair *regs,
411 int total_args_passed,
412 int is_outgoing) {
413 uint stack = 0; // Starting stack position for args on stack
414
415
416 // Pass first two oop/int args in registers ECX and EDX.
417 uint reg_arg0 = 9999;
418 uint reg_arg1 = 9999;
419
420 // Pass first two float/double args in registers XMM0 and XMM1.
421 // Doubles have precedence, so if you pass a mix of floats and doubles
422 // the doubles will grab the registers before the floats will.
423 // CNC - TURNED OFF FOR non-SSE.
424 // On Intel we have to round all doubles (and most floats) at
425 // call sites by storing to the stack in any case.
426 // UseSSE=0 ==> Don't Use ==> 9999+0
427 // UseSSE=1 ==> Floats only ==> 9999+1
428 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
429 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
430 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
431 uint freg_arg0 = 9999+fargs;
432 uint freg_arg1 = 9999+fargs;
433
434 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
435 int i;
436 for( i = 0; i < total_args_passed; i++) {
437 if( sig_bt[i] == T_DOUBLE ) {
438 // first 2 doubles go in registers
439 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
440 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
441 else // Else double is passed low on the stack to be aligned.
442 stack += 2;
443 } else if( sig_bt[i] == T_LONG ) {
444 stack += 2;
445 }
446 }
447 int dstack = 0; // Separate counter for placing doubles
448
449 // Now pick where all else goes.
450 for( i = 0; i < total_args_passed; i++) {
451 // From the type and the argument number (count) compute the location
452 switch( sig_bt[i] ) {
453 case T_SHORT:
454 case T_CHAR:
455 case T_BYTE:
456 case T_BOOLEAN:
457 case T_INT:
458 case T_ARRAY:
459 case T_OBJECT:
460 case T_ADDRESS:
461 if( reg_arg0 == 9999 ) {
462 reg_arg0 = i;
463 regs[i].set1(rcx->as_VMReg());
464 } else if( reg_arg1 == 9999 ) {
465 reg_arg1 = i;
466 regs[i].set1(rdx->as_VMReg());
467 } else {
468 regs[i].set1(VMRegImpl::stack2reg(stack++));
469 }
470 break;
471 case T_FLOAT:
472 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
473 freg_arg0 = i;
474 regs[i].set1(xmm0->as_VMReg());
475 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
476 freg_arg1 = i;
477 regs[i].set1(xmm1->as_VMReg());
478 } else {
479 regs[i].set1(VMRegImpl::stack2reg(stack++));
480 }
481 break;
482 case T_LONG:
483 assert(sig_bt[i+1] == T_VOID, "missing Half" );
484 regs[i].set2(VMRegImpl::stack2reg(dstack));
485 dstack += 2;
486 break;
487 case T_DOUBLE:
488 assert(sig_bt[i+1] == T_VOID, "missing Half" );
489 if( freg_arg0 == (uint)i ) {
490 regs[i].set2(xmm0->as_VMReg());
491 } else if( freg_arg1 == (uint)i ) {
492 regs[i].set2(xmm1->as_VMReg());
493 } else {
494 regs[i].set2(VMRegImpl::stack2reg(dstack));
495 dstack += 2;
496 }
497 break;
498 case T_VOID: regs[i].set_bad(); break;
499 break;
500 default:
501 ShouldNotReachHere();
502 break;
503 }
504 }
505
506 // return value can be odd number of VMRegImpl stack slots make multiple of 2
507 return round_to(stack, 2);
508 }
509
510 // Patch the callers callsite with entry to compiled code if it exists.
511 static void patch_callers_callsite(MacroAssembler *masm) {
512 Label L;
513 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
514 __ jcc(Assembler::equal, L);
515 // Schedule the branch target address early.
516 // Call into the VM to patch the caller, then jump to compiled callee
517 // rax, isn't live so capture return address while we easily can
518 __ movptr(rax, Address(rsp, 0));
519 __ pusha();
520 __ pushf();
521
522 if (UseSSE == 1) {
523 __ subptr(rsp, 2*wordSize);
524 __ movflt(Address(rsp, 0), xmm0);
525 __ movflt(Address(rsp, wordSize), xmm1);
526 }
527 if (UseSSE >= 2) {
528 __ subptr(rsp, 4*wordSize);
529 __ movdbl(Address(rsp, 0), xmm0);
530 __ movdbl(Address(rsp, 2*wordSize), xmm1);
531 }
532 #ifdef COMPILER2
533 // C2 may leave the stack dirty if not in SSE2+ mode
534 if (UseSSE >= 2) {
535 __ verify_FPU(0, "c2i transition should have clean FPU stack");
536 } else {
537 __ empty_FPU_stack();
538 }
539 #endif /* COMPILER2 */
540
541 // VM needs caller's callsite
542 __ push(rax);
543 // VM needs target method
544 __ push(rbx);
545 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
546 __ addptr(rsp, 2*wordSize);
547
548 if (UseSSE == 1) {
549 __ movflt(xmm0, Address(rsp, 0));
550 __ movflt(xmm1, Address(rsp, wordSize));
551 __ addptr(rsp, 2*wordSize);
552 }
553 if (UseSSE >= 2) {
554 __ movdbl(xmm0, Address(rsp, 0));
555 __ movdbl(xmm1, Address(rsp, 2*wordSize));
556 __ addptr(rsp, 4*wordSize);
557 }
558
559 __ popf();
560 __ popa();
561 __ bind(L);
562 }
563
564
565 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
566 int next_off = st_off - Interpreter::stackElementSize;
567 __ movdbl(Address(rsp, next_off), r);
568 }
569
570 static void gen_c2i_adapter(MacroAssembler *masm,
571 int total_args_passed,
572 int comp_args_on_stack,
573 const BasicType *sig_bt,
574 const VMRegPair *regs,
575 Label& skip_fixup) {
576 // Before we get into the guts of the C2I adapter, see if we should be here
577 // at all. We've come from compiled code and are attempting to jump to the
578 // interpreter, which means the caller made a static call to get here
579 // (vcalls always get a compiled target if there is one). Check for a
580 // compiled target. If there is one, we need to patch the caller's call.
581 patch_callers_callsite(masm);
582
583 __ bind(skip_fixup);
584
585 #ifdef COMPILER2
586 // C2 may leave the stack dirty if not in SSE2+ mode
587 if (UseSSE >= 2) {
588 __ verify_FPU(0, "c2i transition should have clean FPU stack");
589 } else {
590 __ empty_FPU_stack();
591 }
592 #endif /* COMPILER2 */
593
594 // Since all args are passed on the stack, total_args_passed * interpreter_
595 // stack_element_size is the
596 // space we need.
597 int extraspace = total_args_passed * Interpreter::stackElementSize;
598
599 // Get return address
600 __ pop(rax);
601
602 // set senderSP value
603 __ movptr(rsi, rsp);
604
605 __ subptr(rsp, extraspace);
606
607 // Now write the args into the outgoing interpreter space
608 for (int i = 0; i < total_args_passed; i++) {
609 if (sig_bt[i] == T_VOID) {
610 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
611 continue;
612 }
613
614 // st_off points to lowest address on stack.
615 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
616 int next_off = st_off - Interpreter::stackElementSize;
617
618 // Say 4 args:
619 // i st_off
620 // 0 12 T_LONG
621 // 1 8 T_VOID
622 // 2 4 T_OBJECT
623 // 3 0 T_BOOL
624 VMReg r_1 = regs[i].first();
625 VMReg r_2 = regs[i].second();
626 if (!r_1->is_valid()) {
627 assert(!r_2->is_valid(), "");
628 continue;
629 }
630
631 if (r_1->is_stack()) {
632 // memory to memory use fpu stack top
633 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
634
635 if (!r_2->is_valid()) {
636 __ movl(rdi, Address(rsp, ld_off));
637 __ movptr(Address(rsp, st_off), rdi);
638 } else {
639
640 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
641 // st_off == MSW, st_off-wordSize == LSW
642
643 __ movptr(rdi, Address(rsp, ld_off));
644 __ movptr(Address(rsp, next_off), rdi);
645 #ifndef _LP64
646 __ movptr(rdi, Address(rsp, ld_off + wordSize));
647 __ movptr(Address(rsp, st_off), rdi);
648 #else
649 #ifdef ASSERT
650 // Overwrite the unused slot with known junk
651 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
652 __ movptr(Address(rsp, st_off), rax);
653 #endif /* ASSERT */
654 #endif // _LP64
655 }
656 } else if (r_1->is_Register()) {
657 Register r = r_1->as_Register();
658 if (!r_2->is_valid()) {
659 __ movl(Address(rsp, st_off), r);
660 } else {
661 // long/double in gpr
662 NOT_LP64(ShouldNotReachHere());
663 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
664 // T_DOUBLE and T_LONG use two slots in the interpreter
665 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
666 // long/double in gpr
667 #ifdef ASSERT
668 // Overwrite the unused slot with known junk
669 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
670 __ movptr(Address(rsp, st_off), rax);
671 #endif /* ASSERT */
672 __ movptr(Address(rsp, next_off), r);
673 } else {
674 __ movptr(Address(rsp, st_off), r);
675 }
676 }
677 } else {
678 assert(r_1->is_XMMRegister(), "");
679 if (!r_2->is_valid()) {
680 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
681 } else {
682 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
683 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
684 }
685 }
686 }
687
688 // Schedule the branch target address early.
689 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
690 // And repush original return address
691 __ push(rax);
692 __ jmp(rcx);
693 }
694
695
696 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
697 int next_val_off = ld_off - Interpreter::stackElementSize;
698 __ movdbl(r, Address(saved_sp, next_val_off));
699 }
700
701 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
702 address code_start, address code_end,
703 Label& L_ok) {
704 Label L_fail;
705 __ lea(temp_reg, ExternalAddress(code_start));
706 __ cmpptr(pc_reg, temp_reg);
707 __ jcc(Assembler::belowEqual, L_fail);
708 __ lea(temp_reg, ExternalAddress(code_end));
709 __ cmpptr(pc_reg, temp_reg);
710 __ jcc(Assembler::below, L_ok);
711 __ bind(L_fail);
712 }
713
714 static void gen_i2c_adapter(MacroAssembler *masm,
715 int total_args_passed,
716 int comp_args_on_stack,
717 const BasicType *sig_bt,
718 const VMRegPair *regs) {
719
720 // Note: rsi contains the senderSP on entry. We must preserve it since
721 // we may do a i2c -> c2i transition if we lose a race where compiled
722 // code goes non-entrant while we get args ready.
723
724 // Adapters can be frameless because they do not require the caller
725 // to perform additional cleanup work, such as correcting the stack pointer.
726 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
727 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
728 // even if a callee has modified the stack pointer.
729 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
730 // routinely repairs its caller's stack pointer (from sender_sp, which is set
731 // up via the senderSP register).
732 // In other words, if *either* the caller or callee is interpreted, we can
733 // get the stack pointer repaired after a call.
734 // This is why c2i and i2c adapters cannot be indefinitely composed.
735 // In particular, if a c2i adapter were to somehow call an i2c adapter,
736 // both caller and callee would be compiled methods, and neither would
737 // clean up the stack pointer changes performed by the two adapters.
738 // If this happens, control eventually transfers back to the compiled
739 // caller, but with an uncorrected stack, causing delayed havoc.
740
741 // Pick up the return address
742 __ movptr(rax, Address(rsp, 0));
743
744 if (VerifyAdapterCalls &&
745 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
746 // So, let's test for cascading c2i/i2c adapters right now.
747 // assert(Interpreter::contains($return_addr) ||
748 // StubRoutines::contains($return_addr),
749 // "i2c adapter must return to an interpreter frame");
750 __ block_comment("verify_i2c { ");
751 Label L_ok;
752 if (Interpreter::code() != NULL)
753 range_check(masm, rax, rdi,
754 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
755 L_ok);
756 if (StubRoutines::code1() != NULL)
757 range_check(masm, rax, rdi,
758 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
759 L_ok);
760 if (StubRoutines::code2() != NULL)
761 range_check(masm, rax, rdi,
762 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
763 L_ok);
764 const char* msg = "i2c adapter must return to an interpreter frame";
765 __ block_comment(msg);
766 __ stop(msg);
767 __ bind(L_ok);
768 __ block_comment("} verify_i2ce ");
769 }
770
771 // Must preserve original SP for loading incoming arguments because
772 // we need to align the outgoing SP for compiled code.
773 __ movptr(rdi, rsp);
774
775 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
776 // in registers, we will occasionally have no stack args.
777 int comp_words_on_stack = 0;
778 if (comp_args_on_stack) {
779 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
780 // registers are below. By subtracting stack0, we either get a negative
781 // number (all values in registers) or the maximum stack slot accessed.
782 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
783 // Convert 4-byte stack slots to words.
784 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
785 // Round up to miminum stack alignment, in wordSize
786 comp_words_on_stack = round_to(comp_words_on_stack, 2);
787 __ subptr(rsp, comp_words_on_stack * wordSize);
788 }
789
790 // Align the outgoing SP
791 __ andptr(rsp, -(StackAlignmentInBytes));
792
793 // push the return address on the stack (note that pushing, rather
794 // than storing it, yields the correct frame alignment for the callee)
795 __ push(rax);
796
797 // Put saved SP in another register
798 const Register saved_sp = rax;
799 __ movptr(saved_sp, rdi);
800
801
802 // Will jump to the compiled code just as if compiled code was doing it.
803 // Pre-load the register-jump target early, to schedule it better.
804 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
805
806 // Now generate the shuffle code. Pick up all register args and move the
807 // rest through the floating point stack top.
808 for (int i = 0; i < total_args_passed; i++) {
809 if (sig_bt[i] == T_VOID) {
810 // Longs and doubles are passed in native word order, but misaligned
811 // in the 32-bit build.
812 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
813 continue;
814 }
815
816 // Pick up 0, 1 or 2 words from SP+offset.
817
818 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
819 "scrambled load targets?");
820 // Load in argument order going down.
821 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
822 // Point to interpreter value (vs. tag)
823 int next_off = ld_off - Interpreter::stackElementSize;
824 //
825 //
826 //
827 VMReg r_1 = regs[i].first();
828 VMReg r_2 = regs[i].second();
829 if (!r_1->is_valid()) {
830 assert(!r_2->is_valid(), "");
831 continue;
832 }
833 if (r_1->is_stack()) {
834 // Convert stack slot to an SP offset (+ wordSize to account for return address )
835 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
836
837 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
838 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
839 // we be generated.
840 if (!r_2->is_valid()) {
841 // __ fld_s(Address(saved_sp, ld_off));
842 // __ fstp_s(Address(rsp, st_off));
843 __ movl(rsi, Address(saved_sp, ld_off));
844 __ movptr(Address(rsp, st_off), rsi);
845 } else {
846 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
847 // are accessed as negative so LSW is at LOW address
848
849 // ld_off is MSW so get LSW
850 // st_off is LSW (i.e. reg.first())
851 // __ fld_d(Address(saved_sp, next_off));
852 // __ fstp_d(Address(rsp, st_off));
853 //
854 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
855 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
856 // So we must adjust where to pick up the data to match the interpreter.
857 //
858 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
859 // are accessed as negative so LSW is at LOW address
860
861 // ld_off is MSW so get LSW
862 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
863 next_off : ld_off;
864 __ movptr(rsi, Address(saved_sp, offset));
865 __ movptr(Address(rsp, st_off), rsi);
866 #ifndef _LP64
867 __ movptr(rsi, Address(saved_sp, ld_off));
868 __ movptr(Address(rsp, st_off + wordSize), rsi);
869 #endif // _LP64
870 }
871 } else if (r_1->is_Register()) { // Register argument
872 Register r = r_1->as_Register();
873 assert(r != rax, "must be different");
874 if (r_2->is_valid()) {
875 //
876 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
877 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
878 // So we must adjust where to pick up the data to match the interpreter.
879
880 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
881 next_off : ld_off;
882
883 // this can be a misaligned move
884 __ movptr(r, Address(saved_sp, offset));
885 #ifndef _LP64
886 assert(r_2->as_Register() != rax, "need another temporary register");
887 // Remember r_1 is low address (and LSB on x86)
888 // So r_2 gets loaded from high address regardless of the platform
889 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
890 #endif // _LP64
891 } else {
892 __ movl(r, Address(saved_sp, ld_off));
893 }
894 } else {
895 assert(r_1->is_XMMRegister(), "");
896 if (!r_2->is_valid()) {
897 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
898 } else {
899 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
900 }
901 }
902 }
903
904 // 6243940 We might end up in handle_wrong_method if
905 // the callee is deoptimized as we race thru here. If that
906 // happens we don't want to take a safepoint because the
907 // caller frame will look interpreted and arguments are now
908 // "compiled" so it is much better to make this transition
909 // invisible to the stack walking code. Unfortunately if
910 // we try and find the callee by normal means a safepoint
911 // is possible. So we stash the desired callee in the thread
912 // and the vm will find there should this case occur.
913
914 __ get_thread(rax);
915 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
916
917 // move Method* to rax, in case we end up in an c2i adapter.
918 // the c2i adapters expect Method* in rax, (c2) because c2's
919 // resolve stubs return the result (the method) in rax,.
920 // I'd love to fix this.
921 __ mov(rax, rbx);
922
923 __ jmp(rdi);
924 }
925
926 // ---------------------------------------------------------------
927 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
928 int total_args_passed,
929 int comp_args_on_stack,
930 const BasicType *sig_bt,
931 const VMRegPair *regs,
932 AdapterFingerPrint* fingerprint) {
933 address i2c_entry = __ pc();
934
935 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
936
937 // -------------------------------------------------------------------------
938 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
939 // to the interpreter. The args start out packed in the compiled layout. They
940 // need to be unpacked into the interpreter layout. This will almost always
941 // require some stack space. We grow the current (compiled) stack, then repack
942 // the args. We finally end in a jump to the generic interpreter entry point.
943 // On exit from the interpreter, the interpreter will restore our SP (lest the
944 // compiled code, which relys solely on SP and not EBP, get sick).
945
946 address c2i_unverified_entry = __ pc();
947 Label skip_fixup;
948
949 Register holder = rax;
950 Register receiver = rcx;
951 Register temp = rbx;
952
953 {
954
955 Label missed;
956 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
957 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
958 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
959 __ jcc(Assembler::notEqual, missed);
960 // Method might have been compiled since the call site was patched to
961 // interpreted if that is the case treat it as a miss so we can get
962 // the call site corrected.
963 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
964 __ jcc(Assembler::equal, skip_fixup);
965
966 __ bind(missed);
967 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
968 }
969
970 address c2i_entry = __ pc();
971
972 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
973
974 __ flush();
975 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
976 }
977
978 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
979 VMRegPair *regs,
980 int total_args_passed) {
981 // We return the amount of VMRegImpl stack slots we need to reserve for all
982 // the arguments NOT counting out_preserve_stack_slots.
983
984 uint stack = 0; // All arguments on stack
985
986 for( int i = 0; i < total_args_passed; i++) {
987 // From the type and the argument number (count) compute the location
988 switch( sig_bt[i] ) {
989 case T_BOOLEAN:
990 case T_CHAR:
991 case T_FLOAT:
992 case T_BYTE:
993 case T_SHORT:
994 case T_INT:
995 case T_OBJECT:
996 case T_ARRAY:
997 case T_ADDRESS:
998 case T_METADATA:
999 regs[i].set1(VMRegImpl::stack2reg(stack++));
1000 break;
1001 case T_LONG:
1002 case T_DOUBLE: // The stack numbering is reversed from Java
1003 // Since C arguments do not get reversed, the ordering for
1004 // doubles on the stack must be opposite the Java convention
1005 assert(sig_bt[i+1] == T_VOID, "missing Half" );
1006 regs[i].set2(VMRegImpl::stack2reg(stack));
1007 stack += 2;
1008 break;
1009 case T_VOID: regs[i].set_bad(); break;
1010 default:
1011 ShouldNotReachHere();
1012 break;
1013 }
1014 }
1015 return stack;
1016 }
1017
1018 // Do we need to convert ints to longs for c calls?
1019 bool SharedRuntime::c_calling_convention_requires_ints_as_longs() {
1020 return false;
1021 }
1022
1023 // A simple move of integer like type
1024 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1025 if (src.first()->is_stack()) {
1026 if (dst.first()->is_stack()) {
1027 // stack to stack
1028 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1029 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1030 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1031 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1032 } else {
1033 // stack to reg
1034 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1035 }
1036 } else if (dst.first()->is_stack()) {
1037 // reg to stack
1038 // no need to sign extend on 64bit
1039 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1040 } else {
1041 if (dst.first() != src.first()) {
1042 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1043 }
1044 }
1045 }
1046
1047 // An oop arg. Must pass a handle not the oop itself
1048 static void object_move(MacroAssembler* masm,
1049 OopMap* map,
1050 int oop_handle_offset,
1051 int framesize_in_slots,
1052 VMRegPair src,
1053 VMRegPair dst,
1054 bool is_receiver,
1055 int* receiver_offset) {
1056
1057 // Because of the calling conventions we know that src can be a
1058 // register or a stack location. dst can only be a stack location.
1059
1060 assert(dst.first()->is_stack(), "must be stack");
1061 // must pass a handle. First figure out the location we use as a handle
1062
1063 if (src.first()->is_stack()) {
1064 // Oop is already on the stack as an argument
1065 Register rHandle = rax;
1066 Label nil;
1067 __ xorptr(rHandle, rHandle);
1068 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1069 __ jcc(Assembler::equal, nil);
1070 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1071 __ bind(nil);
1072 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1073
1074 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1075 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1076 if (is_receiver) {
1077 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1078 }
1079 } else {
1080 // Oop is in an a register we must store it to the space we reserve
1081 // on the stack for oop_handles
1082 const Register rOop = src.first()->as_Register();
1083 const Register rHandle = rax;
1084 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1085 int offset = oop_slot*VMRegImpl::stack_slot_size;
1086 Label skip;
1087 __ movptr(Address(rsp, offset), rOop);
1088 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1089 __ xorptr(rHandle, rHandle);
1090 __ cmpptr(rOop, (int32_t)NULL_WORD);
1091 __ jcc(Assembler::equal, skip);
1092 __ lea(rHandle, Address(rsp, offset));
1093 __ bind(skip);
1094 // Store the handle parameter
1095 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1096 if (is_receiver) {
1097 *receiver_offset = offset;
1098 }
1099 }
1100 }
1101
1102 // A float arg may have to do float reg int reg conversion
1103 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1104 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1105
1106 // Because of the calling convention we know that src is either a stack location
1107 // or an xmm register. dst can only be a stack location.
1108
1109 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1110
1111 if (src.first()->is_stack()) {
1112 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1113 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1114 } else {
1115 // reg to stack
1116 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1117 }
1118 }
1119
1120 // A long move
1121 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1122
1123 // The only legal possibility for a long_move VMRegPair is:
1124 // 1: two stack slots (possibly unaligned)
1125 // as neither the java or C calling convention will use registers
1126 // for longs.
1127
1128 if (src.first()->is_stack() && dst.first()->is_stack()) {
1129 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1130 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1131 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1132 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1133 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1134 } else {
1135 ShouldNotReachHere();
1136 }
1137 }
1138
1139 // A double move
1140 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1141
1142 // The only legal possibilities for a double_move VMRegPair are:
1143 // The painful thing here is that like long_move a VMRegPair might be
1144
1145 // Because of the calling convention we know that src is either
1146 // 1: a single physical register (xmm registers only)
1147 // 2: two stack slots (possibly unaligned)
1148 // dst can only be a pair of stack slots.
1149
1150 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1151
1152 if (src.first()->is_stack()) {
1153 // source is all stack
1154 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1155 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1156 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1157 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1158 } else {
1159 // reg to stack
1160 // No worries about stack alignment
1161 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1162 }
1163 }
1164
1165
1166 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1167 // We always ignore the frame_slots arg and just use the space just below frame pointer
1168 // which by this time is free to use
1169 switch (ret_type) {
1170 case T_FLOAT:
1171 __ fstp_s(Address(rbp, -wordSize));
1172 break;
1173 case T_DOUBLE:
1174 __ fstp_d(Address(rbp, -2*wordSize));
1175 break;
1176 case T_VOID: break;
1177 case T_LONG:
1178 __ movptr(Address(rbp, -wordSize), rax);
1179 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1180 break;
1181 default: {
1182 __ movptr(Address(rbp, -wordSize), rax);
1183 }
1184 }
1185 }
1186
1187 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1188 // We always ignore the frame_slots arg and just use the space just below frame pointer
1189 // which by this time is free to use
1190 switch (ret_type) {
1191 case T_FLOAT:
1192 __ fld_s(Address(rbp, -wordSize));
1193 break;
1194 case T_DOUBLE:
1195 __ fld_d(Address(rbp, -2*wordSize));
1196 break;
1197 case T_LONG:
1198 __ movptr(rax, Address(rbp, -wordSize));
1199 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1200 break;
1201 case T_VOID: break;
1202 default: {
1203 __ movptr(rax, Address(rbp, -wordSize));
1204 }
1205 }
1206 }
1207
1208
1209 static void save_or_restore_arguments(MacroAssembler* masm,
1210 const int stack_slots,
1211 const int total_in_args,
1212 const int arg_save_area,
1213 OopMap* map,
1214 VMRegPair* in_regs,
1215 BasicType* in_sig_bt) {
1216 // if map is non-NULL then the code should store the values,
1217 // otherwise it should load them.
1218 int handle_index = 0;
1219 // Save down double word first
1220 for ( int i = 0; i < total_in_args; i++) {
1221 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1222 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1223 int offset = slot * VMRegImpl::stack_slot_size;
1224 handle_index += 2;
1225 assert(handle_index <= stack_slots, "overflow");
1226 if (map != NULL) {
1227 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1228 } else {
1229 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1230 }
1231 }
1232 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1233 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1234 int offset = slot * VMRegImpl::stack_slot_size;
1235 handle_index += 2;
1236 assert(handle_index <= stack_slots, "overflow");
1237 if (map != NULL) {
1238 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1239 if (in_regs[i].second()->is_Register()) {
1240 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1241 }
1242 } else {
1243 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1244 if (in_regs[i].second()->is_Register()) {
1245 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1246 }
1247 }
1248 }
1249 }
1250 // Save or restore single word registers
1251 for ( int i = 0; i < total_in_args; i++) {
1252 if (in_regs[i].first()->is_Register()) {
1253 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1254 int offset = slot * VMRegImpl::stack_slot_size;
1255 assert(handle_index <= stack_slots, "overflow");
1256 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1257 map->set_oop(VMRegImpl::stack2reg(slot));;
1258 }
1259
1260 // Value is in an input register pass we must flush it to the stack
1261 const Register reg = in_regs[i].first()->as_Register();
1262 switch (in_sig_bt[i]) {
1263 case T_ARRAY:
1264 if (map != NULL) {
1265 __ movptr(Address(rsp, offset), reg);
1266 } else {
1267 __ movptr(reg, Address(rsp, offset));
1268 }
1269 break;
1270 case T_BOOLEAN:
1271 case T_CHAR:
1272 case T_BYTE:
1273 case T_SHORT:
1274 case T_INT:
1275 if (map != NULL) {
1276 __ movl(Address(rsp, offset), reg);
1277 } else {
1278 __ movl(reg, Address(rsp, offset));
1279 }
1280 break;
1281 case T_OBJECT:
1282 default: ShouldNotReachHere();
1283 }
1284 } else if (in_regs[i].first()->is_XMMRegister()) {
1285 if (in_sig_bt[i] == T_FLOAT) {
1286 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1287 int offset = slot * VMRegImpl::stack_slot_size;
1288 assert(handle_index <= stack_slots, "overflow");
1289 if (map != NULL) {
1290 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1291 } else {
1292 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1293 }
1294 }
1295 } else if (in_regs[i].first()->is_stack()) {
1296 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1297 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1298 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1299 }
1300 }
1301 }
1302 }
1303
1304 // Check GC_locker::needs_gc and enter the runtime if it's true. This
1305 // keeps a new JNI critical region from starting until a GC has been
1306 // forced. Save down any oops in registers and describe them in an
1307 // OopMap.
1308 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1309 Register thread,
1310 int stack_slots,
1311 int total_c_args,
1312 int total_in_args,
1313 int arg_save_area,
1314 OopMapSet* oop_maps,
1315 VMRegPair* in_regs,
1316 BasicType* in_sig_bt) {
1317 __ block_comment("check GC_locker::needs_gc");
1318 Label cont;
1319 __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false);
1320 __ jcc(Assembler::equal, cont);
1321
1322 // Save down any incoming oops and call into the runtime to halt for a GC
1323
1324 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1325
1326 save_or_restore_arguments(masm, stack_slots, total_in_args,
1327 arg_save_area, map, in_regs, in_sig_bt);
1328
1329 address the_pc = __ pc();
1330 oop_maps->add_gc_map( __ offset(), map);
1331 __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1332
1333 __ block_comment("block_for_jni_critical");
1334 __ push(thread);
1335 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1336 __ increment(rsp, wordSize);
1337
1338 __ get_thread(thread);
1339 __ reset_last_Java_frame(thread, false, true);
1340
1341 save_or_restore_arguments(masm, stack_slots, total_in_args,
1342 arg_save_area, NULL, in_regs, in_sig_bt);
1343
1344 __ bind(cont);
1345 #ifdef ASSERT
1346 if (StressCriticalJNINatives) {
1347 // Stress register saving
1348 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1349 save_or_restore_arguments(masm, stack_slots, total_in_args,
1350 arg_save_area, map, in_regs, in_sig_bt);
1351 // Destroy argument registers
1352 for (int i = 0; i < total_in_args - 1; i++) {
1353 if (in_regs[i].first()->is_Register()) {
1354 const Register reg = in_regs[i].first()->as_Register();
1355 __ xorptr(reg, reg);
1356 } else if (in_regs[i].first()->is_XMMRegister()) {
1357 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1358 } else if (in_regs[i].first()->is_FloatRegister()) {
1359 ShouldNotReachHere();
1360 } else if (in_regs[i].first()->is_stack()) {
1361 // Nothing to do
1362 } else {
1363 ShouldNotReachHere();
1364 }
1365 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1366 i++;
1367 }
1368 }
1369
1370 save_or_restore_arguments(masm, stack_slots, total_in_args,
1371 arg_save_area, NULL, in_regs, in_sig_bt);
1372 }
1373 #endif
1374 }
1375
1376 // Unpack an array argument into a pointer to the body and the length
1377 // if the array is non-null, otherwise pass 0 for both.
1378 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1379 Register tmp_reg = rax;
1380 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1381 "possible collision");
1382 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1383 "possible collision");
1384
1385 // Pass the length, ptr pair
1386 Label is_null, done;
1387 VMRegPair tmp(tmp_reg->as_VMReg());
1388 if (reg.first()->is_stack()) {
1389 // Load the arg up from the stack
1390 simple_move32(masm, reg, tmp);
1391 reg = tmp;
1392 }
1393 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1394 __ jccb(Assembler::equal, is_null);
1395 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1396 simple_move32(masm, tmp, body_arg);
1397 // load the length relative to the body.
1398 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1399 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1400 simple_move32(masm, tmp, length_arg);
1401 __ jmpb(done);
1402 __ bind(is_null);
1403 // Pass zeros
1404 __ xorptr(tmp_reg, tmp_reg);
1405 simple_move32(masm, tmp, body_arg);
1406 simple_move32(masm, tmp, length_arg);
1407 __ bind(done);
1408 }
1409
1410 static void verify_oop_args(MacroAssembler* masm,
1411 methodHandle method,
1412 const BasicType* sig_bt,
1413 const VMRegPair* regs) {
1414 Register temp_reg = rbx; // not part of any compiled calling seq
1415 if (VerifyOops) {
1416 for (int i = 0; i < method->size_of_parameters(); i++) {
1417 if (sig_bt[i] == T_OBJECT ||
1418 sig_bt[i] == T_ARRAY) {
1419 VMReg r = regs[i].first();
1420 assert(r->is_valid(), "bad oop arg");
1421 if (r->is_stack()) {
1422 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1423 __ verify_oop(temp_reg);
1424 } else {
1425 __ verify_oop(r->as_Register());
1426 }
1427 }
1428 }
1429 }
1430 }
1431
1432 static void gen_special_dispatch(MacroAssembler* masm,
1433 methodHandle method,
1434 const BasicType* sig_bt,
1435 const VMRegPair* regs) {
1436 verify_oop_args(masm, method, sig_bt, regs);
1437 vmIntrinsics::ID iid = method->intrinsic_id();
1438
1439 // Now write the args into the outgoing interpreter space
1440 bool has_receiver = false;
1441 Register receiver_reg = noreg;
1442 int member_arg_pos = -1;
1443 Register member_reg = noreg;
1444 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1445 if (ref_kind != 0) {
1446 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1447 member_reg = rbx; // known to be free at this point
1448 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1449 } else if (iid == vmIntrinsics::_invokeBasic) {
1450 has_receiver = true;
1451 } else {
1452 fatal(err_msg_res("unexpected intrinsic id %d", iid));
1453 }
1454
1455 if (member_reg != noreg) {
1456 // Load the member_arg into register, if necessary.
1457 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1458 VMReg r = regs[member_arg_pos].first();
1459 if (r->is_stack()) {
1460 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1461 } else {
1462 // no data motion is needed
1463 member_reg = r->as_Register();
1464 }
1465 }
1466
1467 if (has_receiver) {
1468 // Make sure the receiver is loaded into a register.
1469 assert(method->size_of_parameters() > 0, "oob");
1470 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1471 VMReg r = regs[0].first();
1472 assert(r->is_valid(), "bad receiver arg");
1473 if (r->is_stack()) {
1474 // Porting note: This assumes that compiled calling conventions always
1475 // pass the receiver oop in a register. If this is not true on some
1476 // platform, pick a temp and load the receiver from stack.
1477 fatal("receiver always in a register");
1478 receiver_reg = rcx; // known to be free at this point
1479 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1480 } else {
1481 // no data motion is needed
1482 receiver_reg = r->as_Register();
1483 }
1484 }
1485
1486 // Figure out which address we are really jumping to:
1487 MethodHandles::generate_method_handle_dispatch(masm, iid,
1488 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1489 }
1490
1491 // ---------------------------------------------------------------------------
1492 // Generate a native wrapper for a given method. The method takes arguments
1493 // in the Java compiled code convention, marshals them to the native
1494 // convention (handlizes oops, etc), transitions to native, makes the call,
1495 // returns to java state (possibly blocking), unhandlizes any result and
1496 // returns.
1497 //
1498 // Critical native functions are a shorthand for the use of
1499 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1500 // functions. The wrapper is expected to unpack the arguments before
1501 // passing them to the callee and perform checks before and after the
1502 // native call to ensure that they GC_locker
1503 // lock_critical/unlock_critical semantics are followed. Some other
1504 // parts of JNI setup are skipped like the tear down of the JNI handle
1505 // block and the check for pending exceptions it's impossible for them
1506 // to be thrown.
1507 //
1508 // They are roughly structured like this:
1509 // if (GC_locker::needs_gc())
1510 // SharedRuntime::block_for_jni_critical();
1511 // tranistion to thread_in_native
1512 // unpack arrray arguments and call native entry point
1513 // check for safepoint in progress
1514 // check if any thread suspend flags are set
1515 // call into JVM and possible unlock the JNI critical
1516 // if a GC was suppressed while in the critical native.
1517 // transition back to thread_in_Java
1518 // return to caller
1519 //
1520 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1521 methodHandle method,
1522 int compile_id,
1523 BasicType* in_sig_bt,
1524 VMRegPair* in_regs,
1525 BasicType ret_type) {
1526 if (method->is_method_handle_intrinsic()) {
1527 vmIntrinsics::ID iid = method->intrinsic_id();
1528 intptr_t start = (intptr_t)__ pc();
1529 int vep_offset = ((intptr_t)__ pc()) - start;
1530 gen_special_dispatch(masm,
1531 method,
1532 in_sig_bt,
1533 in_regs);
1534 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1535 __ flush();
1536 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1537 return nmethod::new_native_nmethod(method,
1538 compile_id,
1539 masm->code(),
1540 vep_offset,
1541 frame_complete,
1542 stack_slots / VMRegImpl::slots_per_word,
1543 in_ByteSize(-1),
1544 in_ByteSize(-1),
1545 (OopMapSet*)NULL);
1546 }
1547 bool is_critical_native = true;
1548 address native_func = method->critical_native_function();
1549 if (native_func == NULL) {
1550 native_func = method->native_function();
1551 is_critical_native = false;
1552 }
1553 assert(native_func != NULL, "must have function");
1554
1555 // An OopMap for lock (and class if static)
1556 OopMapSet *oop_maps = new OopMapSet();
1557
1558 // We have received a description of where all the java arg are located
1559 // on entry to the wrapper. We need to convert these args to where
1560 // the jni function will expect them. To figure out where they go
1561 // we convert the java signature to a C signature by inserting
1562 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1563
1564 const int total_in_args = method->size_of_parameters();
1565 int total_c_args = total_in_args;
1566 if (!is_critical_native) {
1567 total_c_args += 1;
1568 if (method->is_static()) {
1569 total_c_args++;
1570 }
1571 } else {
1572 for (int i = 0; i < total_in_args; i++) {
1573 if (in_sig_bt[i] == T_ARRAY) {
1574 total_c_args++;
1575 }
1576 }
1577 }
1578
1579 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1580 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1581 BasicType* in_elem_bt = NULL;
1582
1583 int argc = 0;
1584 if (!is_critical_native) {
1585 out_sig_bt[argc++] = T_ADDRESS;
1586 if (method->is_static()) {
1587 out_sig_bt[argc++] = T_OBJECT;
1588 }
1589
1590 for (int i = 0; i < total_in_args ; i++ ) {
1591 out_sig_bt[argc++] = in_sig_bt[i];
1592 }
1593 } else {
1594 Thread* THREAD = Thread::current();
1595 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1596 SignatureStream ss(method->signature());
1597 for (int i = 0; i < total_in_args ; i++ ) {
1598 if (in_sig_bt[i] == T_ARRAY) {
1599 // Arrays are passed as int, elem* pair
1600 out_sig_bt[argc++] = T_INT;
1601 out_sig_bt[argc++] = T_ADDRESS;
1602 Symbol* atype = ss.as_symbol(CHECK_NULL);
1603 const char* at = atype->as_C_string();
1604 if (strlen(at) == 2) {
1605 assert(at[0] == '[', "must be");
1606 switch (at[1]) {
1607 case 'B': in_elem_bt[i] = T_BYTE; break;
1608 case 'C': in_elem_bt[i] = T_CHAR; break;
1609 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1610 case 'F': in_elem_bt[i] = T_FLOAT; break;
1611 case 'I': in_elem_bt[i] = T_INT; break;
1612 case 'J': in_elem_bt[i] = T_LONG; break;
1613 case 'S': in_elem_bt[i] = T_SHORT; break;
1614 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1615 default: ShouldNotReachHere();
1616 }
1617 }
1618 } else {
1619 out_sig_bt[argc++] = in_sig_bt[i];
1620 in_elem_bt[i] = T_VOID;
1621 }
1622 if (in_sig_bt[i] != T_VOID) {
1623 assert(in_sig_bt[i] == ss.type(), "must match");
1624 ss.next();
1625 }
1626 }
1627 }
1628
1629 // Now figure out where the args must be stored and how much stack space
1630 // they require.
1631 int out_arg_slots;
1632 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
1633
1634 // Compute framesize for the wrapper. We need to handlize all oops in
1635 // registers a max of 2 on x86.
1636
1637 // Calculate the total number of stack slots we will need.
1638
1639 // First count the abi requirement plus all of the outgoing args
1640 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1641
1642 // Now the space for the inbound oop handle area
1643 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1644 if (is_critical_native) {
1645 // Critical natives may have to call out so they need a save area
1646 // for register arguments.
1647 int double_slots = 0;
1648 int single_slots = 0;
1649 for ( int i = 0; i < total_in_args; i++) {
1650 if (in_regs[i].first()->is_Register()) {
1651 const Register reg = in_regs[i].first()->as_Register();
1652 switch (in_sig_bt[i]) {
1653 case T_ARRAY: // critical array (uses 2 slots on LP64)
1654 case T_BOOLEAN:
1655 case T_BYTE:
1656 case T_SHORT:
1657 case T_CHAR:
1658 case T_INT: single_slots++; break;
1659 case T_LONG: double_slots++; break;
1660 default: ShouldNotReachHere();
1661 }
1662 } else if (in_regs[i].first()->is_XMMRegister()) {
1663 switch (in_sig_bt[i]) {
1664 case T_FLOAT: single_slots++; break;
1665 case T_DOUBLE: double_slots++; break;
1666 default: ShouldNotReachHere();
1667 }
1668 } else if (in_regs[i].first()->is_FloatRegister()) {
1669 ShouldNotReachHere();
1670 }
1671 }
1672 total_save_slots = double_slots * 2 + single_slots;
1673 // align the save area
1674 if (double_slots != 0) {
1675 stack_slots = round_to(stack_slots, 2);
1676 }
1677 }
1678
1679 int oop_handle_offset = stack_slots;
1680 stack_slots += total_save_slots;
1681
1682 // Now any space we need for handlizing a klass if static method
1683
1684 int klass_slot_offset = 0;
1685 int klass_offset = -1;
1686 int lock_slot_offset = 0;
1687 bool is_static = false;
1688
1689 if (method->is_static()) {
1690 klass_slot_offset = stack_slots;
1691 stack_slots += VMRegImpl::slots_per_word;
1692 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1693 is_static = true;
1694 }
1695
1696 // Plus a lock if needed
1697
1698 if (method->is_synchronized()) {
1699 lock_slot_offset = stack_slots;
1700 stack_slots += VMRegImpl::slots_per_word;
1701 }
1702
1703 // Now a place (+2) to save return values or temp during shuffling
1704 // + 2 for return address (which we own) and saved rbp,
1705 stack_slots += 4;
1706
1707 // Ok The space we have allocated will look like:
1708 //
1709 //
1710 // FP-> | |
1711 // |---------------------|
1712 // | 2 slots for moves |
1713 // |---------------------|
1714 // | lock box (if sync) |
1715 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1716 // | klass (if static) |
1717 // |---------------------| <- klass_slot_offset
1718 // | oopHandle area |
1719 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1720 // | outbound memory |
1721 // | based arguments |
1722 // | |
1723 // |---------------------|
1724 // | |
1725 // SP-> | out_preserved_slots |
1726 //
1727 //
1728 // ****************************************************************************
1729 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1730 // arguments off of the stack after the jni call. Before the call we can use
1731 // instructions that are SP relative. After the jni call we switch to FP
1732 // relative instructions instead of re-adjusting the stack on windows.
1733 // ****************************************************************************
1734
1735
1736 // Now compute actual number of stack words we need rounding to make
1737 // stack properly aligned.
1738 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1739
1740 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1741
1742 intptr_t start = (intptr_t)__ pc();
1743
1744 // First thing make an ic check to see if we should even be here
1745
1746 // We are free to use all registers as temps without saving them and
1747 // restoring them except rbp. rbp is the only callee save register
1748 // as far as the interpreter and the compiler(s) are concerned.
1749
1750
1751 const Register ic_reg = rax;
1752 const Register receiver = rcx;
1753 Label hit;
1754 Label exception_pending;
1755
1756 __ verify_oop(receiver);
1757 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1758 __ jcc(Assembler::equal, hit);
1759
1760 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1761
1762 // verified entry must be aligned for code patching.
1763 // and the first 5 bytes must be in the same cache line
1764 // if we align at 8 then we will be sure 5 bytes are in the same line
1765 __ align(8);
1766
1767 __ bind(hit);
1768
1769 int vep_offset = ((intptr_t)__ pc()) - start;
1770
1771 #ifdef COMPILER1
1772 if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1773 // Object.hashCode can pull the hashCode from the header word
1774 // instead of doing a full VM transition once it's been computed.
1775 // Since hashCode is usually polymorphic at call sites we can't do
1776 // this optimization at the call site without a lot of work.
1777 Label slowCase;
1778 Register receiver = rcx;
1779 Register result = rax;
1780 __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1781
1782 // check if locked
1783 __ testptr(result, markOopDesc::unlocked_value);
1784 __ jcc (Assembler::zero, slowCase);
1785
1786 if (UseBiasedLocking) {
1787 // Check if biased and fall through to runtime if so
1788 __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1789 __ jcc (Assembler::notZero, slowCase);
1790 }
1791
1792 // get hash
1793 __ andptr(result, markOopDesc::hash_mask_in_place);
1794 // test if hashCode exists
1795 __ jcc (Assembler::zero, slowCase);
1796 __ shrptr(result, markOopDesc::hash_shift);
1797 __ ret(0);
1798 __ bind (slowCase);
1799 }
1800 #endif // COMPILER1
1801
1802 // The instruction at the verified entry point must be 5 bytes or longer
1803 // because it can be patched on the fly by make_non_entrant. The stack bang
1804 // instruction fits that requirement.
1805
1806 // Generate stack overflow check
1807
1808 if (UseStackBanging) {
1809 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1810 } else {
1811 // need a 5 byte instruction to allow MT safe patching to non-entrant
1812 __ fat_nop();
1813 }
1814
1815 // Generate a new frame for the wrapper.
1816 __ enter();
1817 // -2 because return address is already present and so is saved rbp
1818 __ subptr(rsp, stack_size - 2*wordSize);
1819
1820 // Frame is now completed as far as size and linkage.
1821 int frame_complete = ((intptr_t)__ pc()) - start;
1822
1823 // Calculate the difference between rsp and rbp,. We need to know it
1824 // after the native call because on windows Java Natives will pop
1825 // the arguments and it is painful to do rsp relative addressing
1826 // in a platform independent way. So after the call we switch to
1827 // rbp, relative addressing.
1828
1829 int fp_adjustment = stack_size - 2*wordSize;
1830
1831 #ifdef COMPILER2
1832 // C2 may leave the stack dirty if not in SSE2+ mode
1833 if (UseSSE >= 2) {
1834 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1835 } else {
1836 __ empty_FPU_stack();
1837 }
1838 #endif /* COMPILER2 */
1839
1840 // Compute the rbp, offset for any slots used after the jni call
1841
1842 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1843
1844 // We use rdi as a thread pointer because it is callee save and
1845 // if we load it once it is usable thru the entire wrapper
1846 const Register thread = rdi;
1847
1848 // We use rsi as the oop handle for the receiver/klass
1849 // It is callee save so it survives the call to native
1850
1851 const Register oop_handle_reg = rsi;
1852
1853 __ get_thread(thread);
1854
1855 if (is_critical_native) {
1856 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1857 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1858 }
1859
1860 //
1861 // We immediately shuffle the arguments so that any vm call we have to
1862 // make from here on out (sync slow path, jvmti, etc.) we will have
1863 // captured the oops from our caller and have a valid oopMap for
1864 // them.
1865
1866 // -----------------
1867 // The Grand Shuffle
1868 //
1869 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1870 // and, if static, the class mirror instead of a receiver. This pretty much
1871 // guarantees that register layout will not match (and x86 doesn't use reg
1872 // parms though amd does). Since the native abi doesn't use register args
1873 // and the java conventions does we don't have to worry about collisions.
1874 // All of our moved are reg->stack or stack->stack.
1875 // We ignore the extra arguments during the shuffle and handle them at the
1876 // last moment. The shuffle is described by the two calling convention
1877 // vectors we have in our possession. We simply walk the java vector to
1878 // get the source locations and the c vector to get the destinations.
1879
1880 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1881
1882 // Record rsp-based slot for receiver on stack for non-static methods
1883 int receiver_offset = -1;
1884
1885 // This is a trick. We double the stack slots so we can claim
1886 // the oops in the caller's frame. Since we are sure to have
1887 // more args than the caller doubling is enough to make
1888 // sure we can capture all the incoming oop args from the
1889 // caller.
1890 //
1891 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1892
1893 // Mark location of rbp,
1894 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1895
1896 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1897 // Are free to temporaries if we have to do stack to steck moves.
1898 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1899
1900 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1901 switch (in_sig_bt[i]) {
1902 case T_ARRAY:
1903 if (is_critical_native) {
1904 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1905 c_arg++;
1906 break;
1907 }
1908 case T_OBJECT:
1909 assert(!is_critical_native, "no oop arguments");
1910 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1911 ((i == 0) && (!is_static)),
1912 &receiver_offset);
1913 break;
1914 case T_VOID:
1915 break;
1916
1917 case T_FLOAT:
1918 float_move(masm, in_regs[i], out_regs[c_arg]);
1919 break;
1920
1921 case T_DOUBLE:
1922 assert( i + 1 < total_in_args &&
1923 in_sig_bt[i + 1] == T_VOID &&
1924 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1925 double_move(masm, in_regs[i], out_regs[c_arg]);
1926 break;
1927
1928 case T_LONG :
1929 long_move(masm, in_regs[i], out_regs[c_arg]);
1930 break;
1931
1932 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1933
1934 default:
1935 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1936 }
1937 }
1938
1939 // Pre-load a static method's oop into rsi. Used both by locking code and
1940 // the normal JNI call code.
1941 if (method->is_static() && !is_critical_native) {
1942
1943 // load opp into a register
1944 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1945
1946 // Now handlize the static class mirror it's known not-null.
1947 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1948 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1949
1950 // Now get the handle
1951 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1952 // store the klass handle as second argument
1953 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1954 }
1955
1956 // Change state to native (we save the return address in the thread, since it might not
1957 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1958 // points into the right code segment. It does not have to be the correct return pc.
1959 // We use the same pc/oopMap repeatedly when we call out
1960
1961 intptr_t the_pc = (intptr_t) __ pc();
1962 oop_maps->add_gc_map(the_pc - start, map);
1963
1964 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1965
1966
1967 // We have all of the arguments setup at this point. We must not touch any register
1968 // argument registers at this point (what if we save/restore them there are no oop?
1969
1970 {
1971 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1972 __ mov_metadata(rax, method());
1973 __ call_VM_leaf(
1974 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1975 thread, rax);
1976 }
1977
1978 // RedefineClasses() tracing support for obsolete method entry
1979 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1980 __ mov_metadata(rax, method());
1981 __ call_VM_leaf(
1982 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1983 thread, rax);
1984 }
1985
1986 // These are register definitions we need for locking/unlocking
1987 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1988 const Register obj_reg = rcx; // Will contain the oop
1989 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1990
1991 Label slow_path_lock;
1992 Label lock_done;
1993
1994 // Lock a synchronized method
1995 if (method->is_synchronized()) {
1996 assert(!is_critical_native, "unhandled");
1997
1998
1999 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2000
2001 // Get the handle (the 2nd argument)
2002 __ movptr(oop_handle_reg, Address(rsp, wordSize));
2003
2004 // Get address of the box
2005
2006 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
2007
2008 // Load the oop from the handle
2009 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2010
2011 if (UseBiasedLocking) {
2012 // Note that oop_handle_reg is trashed during this call
2013 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
2014 }
2015
2016 // Load immediate 1 into swap_reg %rax,
2017 __ movptr(swap_reg, 1);
2018
2019 // Load (object->mark() | 1) into swap_reg %rax,
2020 __ orptr(swap_reg, Address(obj_reg, 0));
2021
2022 // Save (object->mark() | 1) into BasicLock's displaced header
2023 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2024
2025 if (os::is_MP()) {
2026 __ lock();
2027 }
2028
2029 // src -> dest iff dest == rax, else rax, <- dest
2030 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
2031 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
2032 __ jcc(Assembler::equal, lock_done);
2033
2034 // Test if the oopMark is an obvious stack pointer, i.e.,
2035 // 1) (mark & 3) == 0, and
2036 // 2) rsp <= mark < mark + os::pagesize()
2037 // These 3 tests can be done by evaluating the following
2038 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2039 // assuming both stack pointer and pagesize have their
2040 // least significant 2 bits clear.
2041 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
2042
2043 __ subptr(swap_reg, rsp);
2044 __ andptr(swap_reg, 3 - os::vm_page_size());
2045
2046 // Save the test result, for recursive case, the result is zero
2047 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2048 __ jcc(Assembler::notEqual, slow_path_lock);
2049 // Slow path will re-enter here
2050 __ bind(lock_done);
2051
2052 if (UseBiasedLocking) {
2053 // Re-fetch oop_handle_reg as we trashed it above
2054 __ movptr(oop_handle_reg, Address(rsp, wordSize));
2055 }
2056 }
2057
2058
2059 // Finally just about ready to make the JNI call
2060
2061
2062 // get JNIEnv* which is first argument to native
2063 if (!is_critical_native) {
2064 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2065 __ movptr(Address(rsp, 0), rdx);
2066 }
2067
2068 // Now set thread in native
2069 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2070
2071 __ call(RuntimeAddress(native_func));
2072
2073 // Verify or restore cpu control state after JNI call
2074 __ restore_cpu_control_state_after_jni();
2075
2076 // WARNING - on Windows Java Natives use pascal calling convention and pop the
2077 // arguments off of the stack. We could just re-adjust the stack pointer here
2078 // and continue to do SP relative addressing but we instead switch to FP
2079 // relative addressing.
2080
2081 // Unpack native results.
2082 switch (ret_type) {
2083 case T_BOOLEAN: __ c2bool(rax); break;
2084 case T_CHAR : __ andptr(rax, 0xFFFF); break;
2085 case T_BYTE : __ sign_extend_byte (rax); break;
2086 case T_SHORT : __ sign_extend_short(rax); break;
2087 case T_INT : /* nothing to do */ break;
2088 case T_DOUBLE :
2089 case T_FLOAT :
2090 // Result is in st0 we'll save as needed
2091 break;
2092 case T_ARRAY: // Really a handle
2093 case T_OBJECT: // Really a handle
2094 break; // can't de-handlize until after safepoint check
2095 case T_VOID: break;
2096 case T_LONG: break;
2097 default : ShouldNotReachHere();
2098 }
2099
2100 // Switch thread to "native transition" state before reading the synchronization state.
2101 // This additional state is necessary because reading and testing the synchronization
2102 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2103 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2104 // VM thread changes sync state to synchronizing and suspends threads for GC.
2105 // Thread A is resumed to finish this native method, but doesn't block here since it
2106 // didn't see any synchronization is progress, and escapes.
2107 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2108
2109 if(os::is_MP()) {
2110 if (UseMembar) {
2111 // Force this write out before the read below
2112 __ membar(Assembler::Membar_mask_bits(
2113 Assembler::LoadLoad | Assembler::LoadStore |
2114 Assembler::StoreLoad | Assembler::StoreStore));
2115 } else {
2116 // Write serialization page so VM thread can do a pseudo remote membar.
2117 // We use the current thread pointer to calculate a thread specific
2118 // offset to write to within the page. This minimizes bus traffic
2119 // due to cache line collision.
2120 __ serialize_memory(thread, rcx);
2121 }
2122 }
2123
2124 if (AlwaysRestoreFPU) {
2125 // Make sure the control word is correct.
2126 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2127 }
2128
2129 Label after_transition;
2130
2131 // check for safepoint operation in progress and/or pending suspend requests
2132 { Label Continue;
2133
2134 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2135 SafepointSynchronize::_not_synchronized);
2136
2137 Label L;
2138 __ jcc(Assembler::notEqual, L);
2139 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2140 __ jcc(Assembler::equal, Continue);
2141 __ bind(L);
2142
2143 // Don't use call_VM as it will see a possible pending exception and forward it
2144 // and never return here preventing us from clearing _last_native_pc down below.
2145 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2146 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2147 // by hand.
2148 //
2149 save_native_result(masm, ret_type, stack_slots);
2150 __ push(thread);
2151 if (!is_critical_native) {
2152 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2153 JavaThread::check_special_condition_for_native_trans)));
2154 } else {
2155 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2156 JavaThread::check_special_condition_for_native_trans_and_transition)));
2157 }
2158 __ increment(rsp, wordSize);
2159 // Restore any method result value
2160 restore_native_result(masm, ret_type, stack_slots);
2161
2162 if (is_critical_native) {
2163 // The call above performed the transition to thread_in_Java so
2164 // skip the transition logic below.
2165 __ jmpb(after_transition);
2166 }
2167
2168 __ bind(Continue);
2169 }
2170
2171 // change thread state
2172 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2173 __ bind(after_transition);
2174
2175 Label reguard;
2176 Label reguard_done;
2177 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
2178 __ jcc(Assembler::equal, reguard);
2179
2180 // slow path reguard re-enters here
2181 __ bind(reguard_done);
2182
2183 // Handle possible exception (will unlock if necessary)
2184
2185 // native result if any is live
2186
2187 // Unlock
2188 Label slow_path_unlock;
2189 Label unlock_done;
2190 if (method->is_synchronized()) {
2191
2192 Label done;
2193
2194 // Get locked oop from the handle we passed to jni
2195 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2196
2197 if (UseBiasedLocking) {
2198 __ biased_locking_exit(obj_reg, rbx, done);
2199 }
2200
2201 // Simple recursive lock?
2202
2203 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2204 __ jcc(Assembler::equal, done);
2205
2206 // Must save rax, if if it is live now because cmpxchg must use it
2207 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2208 save_native_result(masm, ret_type, stack_slots);
2209 }
2210
2211 // get old displaced header
2212 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2213
2214 // get address of the stack lock
2215 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2216
2217 // Atomic swap old header if oop still contains the stack lock
2218 if (os::is_MP()) {
2219 __ lock();
2220 }
2221
2222 // src -> dest iff dest == rax, else rax, <- dest
2223 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2224 __ cmpxchgptr(rbx, Address(obj_reg, 0));
2225 __ jcc(Assembler::notEqual, slow_path_unlock);
2226
2227 // slow path re-enters here
2228 __ bind(unlock_done);
2229 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2230 restore_native_result(masm, ret_type, stack_slots);
2231 }
2232
2233 __ bind(done);
2234
2235 }
2236
2237 {
2238 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2239 // Tell dtrace about this method exit
2240 save_native_result(masm, ret_type, stack_slots);
2241 __ mov_metadata(rax, method());
2242 __ call_VM_leaf(
2243 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2244 thread, rax);
2245 restore_native_result(masm, ret_type, stack_slots);
2246 }
2247
2248 // We can finally stop using that last_Java_frame we setup ages ago
2249
2250 __ reset_last_Java_frame(thread, false, true);
2251
2252 // Unpack oop result
2253 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2254 Label L;
2255 __ cmpptr(rax, (int32_t)NULL_WORD);
2256 __ jcc(Assembler::equal, L);
2257 __ movptr(rax, Address(rax, 0));
2258 __ bind(L);
2259 __ verify_oop(rax);
2260 }
2261
2262 if (!is_critical_native) {
2263 // reset handle block
2264 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2265 __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2266
2267 // Any exception pending?
2268 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2269 __ jcc(Assembler::notEqual, exception_pending);
2270 }
2271
2272 // no exception, we're almost done
2273
2274 // check that only result value is on FPU stack
2275 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2276
2277 // Fixup floating pointer results so that result looks like a return from a compiled method
2278 if (ret_type == T_FLOAT) {
2279 if (UseSSE >= 1) {
2280 // Pop st0 and store as float and reload into xmm register
2281 __ fstp_s(Address(rbp, -4));
2282 __ movflt(xmm0, Address(rbp, -4));
2283 }
2284 } else if (ret_type == T_DOUBLE) {
2285 if (UseSSE >= 2) {
2286 // Pop st0 and store as double and reload into xmm register
2287 __ fstp_d(Address(rbp, -8));
2288 __ movdbl(xmm0, Address(rbp, -8));
2289 }
2290 }
2291
2292 // Return
2293
2294 __ leave();
2295 __ ret(0);
2296
2297 // Unexpected paths are out of line and go here
2298
2299 // Slow path locking & unlocking
2300 if (method->is_synchronized()) {
2301
2302 // BEGIN Slow path lock
2303
2304 __ bind(slow_path_lock);
2305
2306 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2307 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2308 __ push(thread);
2309 __ push(lock_reg);
2310 __ push(obj_reg);
2311 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2312 __ addptr(rsp, 3*wordSize);
2313
2314 #ifdef ASSERT
2315 { Label L;
2316 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2317 __ jcc(Assembler::equal, L);
2318 __ stop("no pending exception allowed on exit from monitorenter");
2319 __ bind(L);
2320 }
2321 #endif
2322 __ jmp(lock_done);
2323
2324 // END Slow path lock
2325
2326 // BEGIN Slow path unlock
2327 __ bind(slow_path_unlock);
2328
2329 // Slow path unlock
2330
2331 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2332 save_native_result(masm, ret_type, stack_slots);
2333 }
2334 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2335
2336 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2337 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2338
2339
2340 // should be a peal
2341 // +wordSize because of the push above
2342 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2343 __ push(rax);
2344
2345 __ push(obj_reg);
2346 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2347 __ addptr(rsp, 2*wordSize);
2348 #ifdef ASSERT
2349 {
2350 Label L;
2351 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2352 __ jcc(Assembler::equal, L);
2353 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2354 __ bind(L);
2355 }
2356 #endif /* ASSERT */
2357
2358 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2359
2360 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2361 restore_native_result(masm, ret_type, stack_slots);
2362 }
2363 __ jmp(unlock_done);
2364 // END Slow path unlock
2365
2366 }
2367
2368 // SLOW PATH Reguard the stack if needed
2369
2370 __ bind(reguard);
2371 save_native_result(masm, ret_type, stack_slots);
2372 {
2373 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2374 }
2375 restore_native_result(masm, ret_type, stack_slots);
2376 __ jmp(reguard_done);
2377
2378
2379 // BEGIN EXCEPTION PROCESSING
2380
2381 if (!is_critical_native) {
2382 // Forward the exception
2383 __ bind(exception_pending);
2384
2385 // remove possible return value from FPU register stack
2386 __ empty_FPU_stack();
2387
2388 // pop our frame
2389 __ leave();
2390 // and forward the exception
2391 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2392 }
2393
2394 __ flush();
2395
2396 nmethod *nm = nmethod::new_native_nmethod(method,
2397 compile_id,
2398 masm->code(),
2399 vep_offset,
2400 frame_complete,
2401 stack_slots / VMRegImpl::slots_per_word,
2402 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2403 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2404 oop_maps);
2405
2406 if (is_critical_native) {
2407 nm->set_lazy_critical_native(true);
2408 }
2409
2410 return nm;
2411
2412 }
2413
2414 #ifdef HAVE_DTRACE_H
2415 // ---------------------------------------------------------------------------
2416 // Generate a dtrace nmethod for a given signature. The method takes arguments
2417 // in the Java compiled code convention, marshals them to the native
2418 // abi and then leaves nops at the position you would expect to call a native
2419 // function. When the probe is enabled the nops are replaced with a trap
2420 // instruction that dtrace inserts and the trace will cause a notification
2421 // to dtrace.
2422 //
2423 // The probes are only able to take primitive types and java/lang/String as
2424 // arguments. No other java types are allowed. Strings are converted to utf8
2425 // strings so that from dtrace point of view java strings are converted to C
2426 // strings. There is an arbitrary fixed limit on the total space that a method
2427 // can use for converting the strings. (256 chars per string in the signature).
2428 // So any java string larger then this is truncated.
2429
2430 nmethod *SharedRuntime::generate_dtrace_nmethod(
2431 MacroAssembler *masm, methodHandle method) {
2432
2433 // generate_dtrace_nmethod is guarded by a mutex so we are sure to
2434 // be single threaded in this method.
2435 assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
2436
2437 // Fill in the signature array, for the calling-convention call.
2438 int total_args_passed = method->size_of_parameters();
2439
2440 BasicType* in_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
2441 VMRegPair *in_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
2442
2443 // The signature we are going to use for the trap that dtrace will see
2444 // java/lang/String is converted. We drop "this" and any other object
2445 // is converted to NULL. (A one-slot java/lang/Long object reference
2446 // is converted to a two-slot long, which is why we double the allocation).
2447 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
2448 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
2449
2450 int i=0;
2451 int total_strings = 0;
2452 int first_arg_to_pass = 0;
2453 int total_c_args = 0;
2454
2455 if( !method->is_static() ) { // Pass in receiver first
2456 in_sig_bt[i++] = T_OBJECT;
2457 first_arg_to_pass = 1;
2458 }
2459
2460 // We need to convert the java args to where a native (non-jni) function
2461 // would expect them. To figure out where they go we convert the java
2462 // signature to a C signature.
2463
2464 SignatureStream ss(method->signature());
2465 for ( ; !ss.at_return_type(); ss.next()) {
2466 BasicType bt = ss.type();
2467 in_sig_bt[i++] = bt; // Collect remaining bits of signature
2468 out_sig_bt[total_c_args++] = bt;
2469 if( bt == T_OBJECT) {
2470 Symbol* s = ss.as_symbol_or_null(); // symbol is created
2471 if (s == vmSymbols::java_lang_String()) {
2472 total_strings++;
2473 out_sig_bt[total_c_args-1] = T_ADDRESS;
2474 } else if (s == vmSymbols::java_lang_Boolean() ||
2475 s == vmSymbols::java_lang_Character() ||
2476 s == vmSymbols::java_lang_Byte() ||
2477 s == vmSymbols::java_lang_Short() ||
2478 s == vmSymbols::java_lang_Integer() ||
2479 s == vmSymbols::java_lang_Float()) {
2480 out_sig_bt[total_c_args-1] = T_INT;
2481 } else if (s == vmSymbols::java_lang_Long() ||
2482 s == vmSymbols::java_lang_Double()) {
2483 out_sig_bt[total_c_args-1] = T_LONG;
2484 out_sig_bt[total_c_args++] = T_VOID;
2485 }
2486 } else if ( bt == T_LONG || bt == T_DOUBLE ) {
2487 in_sig_bt[i++] = T_VOID; // Longs & doubles take 2 Java slots
2488 out_sig_bt[total_c_args++] = T_VOID;
2489 }
2490 }
2491
2492 assert(i==total_args_passed, "validly parsed signature");
2493
2494 // Now get the compiled-Java layout as input arguments
2495 int comp_args_on_stack;
2496 comp_args_on_stack = SharedRuntime::java_calling_convention(
2497 in_sig_bt, in_regs, total_args_passed, false);
2498
2499 // Now figure out where the args must be stored and how much stack space
2500 // they require (neglecting out_preserve_stack_slots).
2501
2502 int out_arg_slots;
2503 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, total_c_args);
2504
2505 // Calculate the total number of stack slots we will need.
2506
2507 // First count the abi requirement plus all of the outgoing args
2508 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2509
2510 // Now space for the string(s) we must convert
2511
2512 int* string_locs = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2513 for (i = 0; i < total_strings ; i++) {
2514 string_locs[i] = stack_slots;
2515 stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2516 }
2517
2518 // + 2 for return address (which we own) and saved rbp,
2519
2520 stack_slots += 2;
2521
2522 // Ok The space we have allocated will look like:
2523 //
2524 //
2525 // FP-> | |
2526 // |---------------------|
2527 // | string[n] |
2528 // |---------------------| <- string_locs[n]
2529 // | string[n-1] |
2530 // |---------------------| <- string_locs[n-1]
2531 // | ... |
2532 // | ... |
2533 // |---------------------| <- string_locs[1]
2534 // | string[0] |
2535 // |---------------------| <- string_locs[0]
2536 // | outbound memory |
2537 // | based arguments |
2538 // | |
2539 // |---------------------|
2540 // | |
2541 // SP-> | out_preserved_slots |
2542 //
2543 //
2544
2545 // Now compute actual number of stack words we need rounding to make
2546 // stack properly aligned.
2547 stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word);
2548
2549 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2550
2551 intptr_t start = (intptr_t)__ pc();
2552
2553 // First thing make an ic check to see if we should even be here
2554
2555 // We are free to use all registers as temps without saving them and
2556 // restoring them except rbp. rbp, is the only callee save register
2557 // as far as the interpreter and the compiler(s) are concerned.
2558
2559 const Register ic_reg = rax;
2560 const Register receiver = rcx;
2561 Label hit;
2562 Label exception_pending;
2563
2564
2565 __ verify_oop(receiver);
2566 __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2567 __ jcc(Assembler::equal, hit);
2568
2569 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2570
2571 // verified entry must be aligned for code patching.
2572 // and the first 5 bytes must be in the same cache line
2573 // if we align at 8 then we will be sure 5 bytes are in the same line
2574 __ align(8);
2575
2576 __ bind(hit);
2577
2578 int vep_offset = ((intptr_t)__ pc()) - start;
2579
2580
2581 // The instruction at the verified entry point must be 5 bytes or longer
2582 // because it can be patched on the fly by make_non_entrant. The stack bang
2583 // instruction fits that requirement.
2584
2585 // Generate stack overflow check
2586
2587
2588 if (UseStackBanging) {
2589 if (stack_size <= StackShadowPages*os::vm_page_size()) {
2590 __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2591 } else {
2592 __ movl(rax, stack_size);
2593 __ bang_stack_size(rax, rbx);
2594 }
2595 } else {
2596 // need a 5 byte instruction to allow MT safe patching to non-entrant
2597 __ fat_nop();
2598 }
2599
2600 assert(((int)__ pc() - start - vep_offset) >= 5,
2601 "valid size for make_non_entrant");
2602
2603 // Generate a new frame for the wrapper.
2604 __ enter();
2605
2606 // -2 because return address is already present and so is saved rbp,
2607 if (stack_size - 2*wordSize != 0) {
2608 __ subl(rsp, stack_size - 2*wordSize);
2609 }
2610
2611 // Frame is now completed as far a size and linkage.
2612
2613 int frame_complete = ((intptr_t)__ pc()) - start;
2614
2615 // First thing we do store all the args as if we are doing the call.
2616 // Since the C calling convention is stack based that ensures that
2617 // all the Java register args are stored before we need to convert any
2618 // string we might have.
2619
2620 int sid = 0;
2621 int c_arg, j_arg;
2622 int string_reg = 0;
2623
2624 for (j_arg = first_arg_to_pass, c_arg = 0 ;
2625 j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2626
2627 VMRegPair src = in_regs[j_arg];
2628 VMRegPair dst = out_regs[c_arg];
2629 assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID,
2630 "stack based abi assumed");
2631
2632 switch (in_sig_bt[j_arg]) {
2633
2634 case T_ARRAY:
2635 case T_OBJECT:
2636 if (out_sig_bt[c_arg] == T_ADDRESS) {
2637 // Any register based arg for a java string after the first
2638 // will be destroyed by the call to get_utf so we store
2639 // the original value in the location the utf string address
2640 // will eventually be stored.
2641 if (src.first()->is_reg()) {
2642 if (string_reg++ != 0) {
2643 simple_move32(masm, src, dst);
2644 }
2645 }
2646 } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2647 // need to unbox a one-word value
2648 Register in_reg = rax;
2649 if ( src.first()->is_reg() ) {
2650 in_reg = src.first()->as_Register();
2651 } else {
2652 simple_move32(masm, src, in_reg->as_VMReg());
2653 }
2654 Label skipUnbox;
2655 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2656 if ( out_sig_bt[c_arg] == T_LONG ) {
2657 __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD);
2658 }
2659 __ testl(in_reg, in_reg);
2660 __ jcc(Assembler::zero, skipUnbox);
2661 assert(dst.first()->is_stack() &&
2662 (!dst.second()->is_valid() || dst.second()->is_stack()),
2663 "value(s) must go into stack slots");
2664
2665 BasicType bt = out_sig_bt[c_arg];
2666 int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2667 if ( bt == T_LONG ) {
2668 __ movl(rbx, Address(in_reg,
2669 box_offset + VMRegImpl::stack_slot_size));
2670 __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
2671 }
2672 __ movl(in_reg, Address(in_reg, box_offset));
2673 __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg);
2674 __ bind(skipUnbox);
2675 } else {
2676 // Convert the arg to NULL
2677 __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2678 }
2679 if (out_sig_bt[c_arg] == T_LONG) {
2680 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2681 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2682 }
2683 break;
2684
2685 case T_VOID:
2686 break;
2687
2688 case T_FLOAT:
2689 float_move(masm, src, dst);
2690 break;
2691
2692 case T_DOUBLE:
2693 assert( j_arg + 1 < total_args_passed &&
2694 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list");
2695 double_move(masm, src, dst);
2696 break;
2697
2698 case T_LONG :
2699 long_move(masm, src, dst);
2700 break;
2701
2702 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2703
2704 default:
2705 simple_move32(masm, src, dst);
2706 }
2707 }
2708
2709 // Now we must convert any string we have to utf8
2710 //
2711
2712 for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ;
2713 sid < total_strings ; j_arg++, c_arg++ ) {
2714
2715 if (out_sig_bt[c_arg] == T_ADDRESS) {
2716
2717 Address utf8_addr = Address(
2718 rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2719 __ leal(rax, utf8_addr);
2720
2721 // The first string we find might still be in the original java arg
2722 // register
2723 VMReg orig_loc = in_regs[j_arg].first();
2724 Register string_oop;
2725
2726 // This is where the argument will eventually reside
2727 Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first()));
2728
2729 if (sid == 1 && orig_loc->is_reg()) {
2730 string_oop = orig_loc->as_Register();
2731 assert(string_oop != rax, "smashed arg");
2732 } else {
2733
2734 if (orig_loc->is_reg()) {
2735 // Get the copy of the jls object
2736 __ movl(rcx, dest);
2737 } else {
2738 // arg is still in the original location
2739 __ movl(rcx, Address(rbp, reg2offset_in(orig_loc)));
2740 }
2741 string_oop = rcx;
2742
2743 }
2744 Label nullString;
2745 __ movl(dest, NULL_WORD);
2746 __ testl(string_oop, string_oop);
2747 __ jcc(Assembler::zero, nullString);
2748
2749 // Now we can store the address of the utf string as the argument
2750 __ movl(dest, rax);
2751
2752 // And do the conversion
2753 __ call_VM_leaf(CAST_FROM_FN_PTR(
2754 address, SharedRuntime::get_utf), string_oop, rax);
2755 __ bind(nullString);
2756 }
2757
2758 if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2759 assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2760 ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2761 }
2762 }
2763
2764
2765 // Ok now we are done. Need to place the nop that dtrace wants in order to
2766 // patch in the trap
2767
2768 int patch_offset = ((intptr_t)__ pc()) - start;
2769
2770 __ nop();
2771
2772
2773 // Return
2774
2775 __ leave();
2776 __ ret(0);
2777
2778 __ flush();
2779
2780 nmethod *nm = nmethod::new_dtrace_nmethod(
2781 method, masm->code(), vep_offset, patch_offset, frame_complete,
2782 stack_slots / VMRegImpl::slots_per_word);
2783 return nm;
2784
2785 }
2786
2787 #endif // HAVE_DTRACE_H
2788
2789 // this function returns the adjust size (in number of words) to a c2i adapter
2790 // activation for use during deoptimization
2791 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2792 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2793 }
2794
2795
2796 uint SharedRuntime::out_preserve_stack_slots() {
2797 return 0;
2798 }
2799
2800 //------------------------------generate_deopt_blob----------------------------
2801 void SharedRuntime::generate_deopt_blob() {
2802 // allocate space for the code
2803 ResourceMark rm;
2804 // setup code generation tools
2805 CodeBuffer buffer("deopt_blob", 1024, 1024);
2806 MacroAssembler* masm = new MacroAssembler(&buffer);
2807 int frame_size_in_words;
2808 OopMap* map = NULL;
2809 // Account for the extra args we place on the stack
2810 // by the time we call fetch_unroll_info
2811 const int additional_words = 2; // deopt kind, thread
2812
2813 OopMapSet *oop_maps = new OopMapSet();
2814
2815 // -------------
2816 // This code enters when returning to a de-optimized nmethod. A return
2817 // address has been pushed on the the stack, and return values are in
2818 // registers.
2819 // If we are doing a normal deopt then we were called from the patched
2820 // nmethod from the point we returned to the nmethod. So the return
2821 // address on the stack is wrong by NativeCall::instruction_size
2822 // We will adjust the value to it looks like we have the original return
2823 // address on the stack (like when we eagerly deoptimized).
2824 // In the case of an exception pending with deoptimized then we enter
2825 // with a return address on the stack that points after the call we patched
2826 // into the exception handler. We have the following register state:
2827 // rax,: exception
2828 // rbx,: exception handler
2829 // rdx: throwing pc
2830 // So in this case we simply jam rdx into the useless return address and
2831 // the stack looks just like we want.
2832 //
2833 // At this point we need to de-opt. We save the argument return
2834 // registers. We call the first C routine, fetch_unroll_info(). This
2835 // routine captures the return values and returns a structure which
2836 // describes the current frame size and the sizes of all replacement frames.
2837 // The current frame is compiled code and may contain many inlined
2838 // functions, each with their own JVM state. We pop the current frame, then
2839 // push all the new frames. Then we call the C routine unpack_frames() to
2840 // populate these frames. Finally unpack_frames() returns us the new target
2841 // address. Notice that callee-save registers are BLOWN here; they have
2842 // already been captured in the vframeArray at the time the return PC was
2843 // patched.
2844 address start = __ pc();
2845 Label cont;
2846
2847 // Prolog for non exception case!
2848
2849 // Save everything in sight.
2850
2851 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2852 // Normal deoptimization
2853 __ push(Deoptimization::Unpack_deopt);
2854 __ jmp(cont);
2855
2856 int reexecute_offset = __ pc() - start;
2857
2858 // Reexecute case
2859 // return address is the pc describes what bci to do re-execute at
2860
2861 // No need to update map as each call to save_live_registers will produce identical oopmap
2862 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2863
2864 __ push(Deoptimization::Unpack_reexecute);
2865 __ jmp(cont);
2866
2867 int exception_offset = __ pc() - start;
2868
2869 // Prolog for exception case
2870
2871 // all registers are dead at this entry point, except for rax, and
2872 // rdx which contain the exception oop and exception pc
2873 // respectively. Set them in TLS and fall thru to the
2874 // unpack_with_exception_in_tls entry point.
2875
2876 __ get_thread(rdi);
2877 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2878 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2879
2880 int exception_in_tls_offset = __ pc() - start;
2881
2882 // new implementation because exception oop is now passed in JavaThread
2883
2884 // Prolog for exception case
2885 // All registers must be preserved because they might be used by LinearScan
2886 // Exceptiop oop and throwing PC are passed in JavaThread
2887 // tos: stack at point of call to method that threw the exception (i.e. only
2888 // args are on the stack, no return address)
2889
2890 // make room on stack for the return address
2891 // It will be patched later with the throwing pc. The correct value is not
2892 // available now because loading it from memory would destroy registers.
2893 __ push(0);
2894
2895 // Save everything in sight.
2896
2897 // No need to update map as each call to save_live_registers will produce identical oopmap
2898 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2899
2900 // Now it is safe to overwrite any register
2901
2902 // store the correct deoptimization type
2903 __ push(Deoptimization::Unpack_exception);
2904
2905 // load throwing pc from JavaThread and patch it as the return address
2906 // of the current frame. Then clear the field in JavaThread
2907 __ get_thread(rdi);
2908 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2909 __ movptr(Address(rbp, wordSize), rdx);
2910 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2911
2912 #ifdef ASSERT
2913 // verify that there is really an exception oop in JavaThread
2914 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2915 __ verify_oop(rax);
2916
2917 // verify that there is no pending exception
2918 Label no_pending_exception;
2919 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2920 __ testptr(rax, rax);
2921 __ jcc(Assembler::zero, no_pending_exception);
2922 __ stop("must not have pending exception here");
2923 __ bind(no_pending_exception);
2924 #endif
2925
2926 __ bind(cont);
2927
2928 // Compiled code leaves the floating point stack dirty, empty it.
2929 __ empty_FPU_stack();
2930
2931
2932 // Call C code. Need thread and this frame, but NOT official VM entry
2933 // crud. We cannot block on this call, no GC can happen.
2934 __ get_thread(rcx);
2935 __ push(rcx);
2936 // fetch_unroll_info needs to call last_java_frame()
2937 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2938
2939 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2940
2941 // Need to have an oopmap that tells fetch_unroll_info where to
2942 // find any register it might need.
2943
2944 oop_maps->add_gc_map( __ pc()-start, map);
2945
2946 // Discard arg to fetch_unroll_info
2947 __ pop(rcx);
2948
2949 __ get_thread(rcx);
2950 __ reset_last_Java_frame(rcx, false, false);
2951
2952 // Load UnrollBlock into EDI
2953 __ mov(rdi, rax);
2954
2955 // Move the unpack kind to a safe place in the UnrollBlock because
2956 // we are very short of registers
2957
2958 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2959 // retrieve the deopt kind from where we left it.
2960 __ pop(rax);
2961 __ movl(unpack_kind, rax); // save the unpack_kind value
2962
2963 Label noException;
2964 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2965 __ jcc(Assembler::notEqual, noException);
2966 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2967 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2968 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2969 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2970
2971 __ verify_oop(rax);
2972
2973 // Overwrite the result registers with the exception results.
2974 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2975 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2976
2977 __ bind(noException);
2978
2979 // Stack is back to only having register save data on the stack.
2980 // Now restore the result registers. Everything else is either dead or captured
2981 // in the vframeArray.
2982
2983 RegisterSaver::restore_result_registers(masm);
2984
2985 // Non standard control word may be leaked out through a safepoint blob, and we can
2986 // deopt at a poll point with the non standard control word. However, we should make
2987 // sure the control word is correct after restore_result_registers.
2988 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2989
2990 // All of the register save area has been popped of the stack. Only the
2991 // return address remains.
2992
2993 // Pop all the frames we must move/replace.
2994 //
2995 // Frame picture (youngest to oldest)
2996 // 1: self-frame (no frame link)
2997 // 2: deopting frame (no frame link)
2998 // 3: caller of deopting frame (could be compiled/interpreted).
2999 //
3000 // Note: by leaving the return address of self-frame on the stack
3001 // and using the size of frame 2 to adjust the stack
3002 // when we are done the return to frame 3 will still be on the stack.
3003
3004 // Pop deoptimized frame
3005 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3006
3007 // sp should be pointing at the return address to the caller (3)
3008
3009 // Stack bang to make sure there's enough room for these interpreter frames.
3010 if (UseStackBanging) {
3011 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3012 __ bang_stack_size(rbx, rcx);
3013 }
3014
3015 // Load array of frame pcs into ECX
3016 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3017
3018 __ pop(rsi); // trash the old pc
3019
3020 // Load array of frame sizes into ESI
3021 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3022
3023 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3024
3025 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3026 __ movl(counter, rbx);
3027
3028 // Pick up the initial fp we should save
3029 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3030
3031 // Now adjust the caller's stack to make up for the extra locals
3032 // but record the original sp so that we can save it in the skeletal interpreter
3033 // frame and the stack walking of interpreter_sender will get the unextended sp
3034 // value and not the "real" sp value.
3035
3036 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3037 __ movptr(sp_temp, rsp);
3038 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3039 __ subptr(rsp, rbx);
3040
3041 // Push interpreter frames in a loop
3042 Label loop;
3043 __ bind(loop);
3044 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3045 #ifdef CC_INTERP
3046 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
3047 #ifdef ASSERT
3048 __ push(0xDEADDEAD); // Make a recognizable pattern
3049 __ push(0xDEADDEAD);
3050 #else /* ASSERT */
3051 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
3052 #endif /* ASSERT */
3053 #else /* CC_INTERP */
3054 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
3055 #endif /* CC_INTERP */
3056 __ pushptr(Address(rcx, 0)); // save return address
3057 __ enter(); // save old & set new rbp,
3058 __ subptr(rsp, rbx); // Prolog!
3059 __ movptr(rbx, sp_temp); // sender's sp
3060 #ifdef CC_INTERP
3061 __ movptr(Address(rbp,
3062 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3063 rbx); // Make it walkable
3064 #else /* CC_INTERP */
3065 // This value is corrected by layout_activation_impl
3066 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
3067 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3068 #endif /* CC_INTERP */
3069 __ movptr(sp_temp, rsp); // pass to next frame
3070 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3071 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3072 __ decrementl(counter); // decrement counter
3073 __ jcc(Assembler::notZero, loop);
3074 __ pushptr(Address(rcx, 0)); // save final return address
3075
3076 // Re-push self-frame
3077 __ enter(); // save old & set new rbp,
3078
3079 // Return address and rbp, are in place
3080 // We'll push additional args later. Just allocate a full sized
3081 // register save area
3082 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
3083
3084 // Restore frame locals after moving the frame
3085 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
3086 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
3087 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
3088 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
3089 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
3090
3091 // Set up the args to unpack_frame
3092
3093 __ pushl(unpack_kind); // get the unpack_kind value
3094 __ get_thread(rcx);
3095 __ push(rcx);
3096
3097 // set last_Java_sp, last_Java_fp
3098 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
3099
3100 // Call C code. Need thread but NOT official VM entry
3101 // crud. We cannot block on this call, no GC can happen. Call should
3102 // restore return values to their stack-slots with the new SP.
3103 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3104 // Set an oopmap for the call site
3105 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
3106
3107 // rax, contains the return result type
3108 __ push(rax);
3109
3110 __ get_thread(rcx);
3111 __ reset_last_Java_frame(rcx, false, false);
3112
3113 // Collect return values
3114 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
3115 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
3116
3117 // Clear floating point stack before returning to interpreter
3118 __ empty_FPU_stack();
3119
3120 // Check if we should push the float or double return value.
3121 Label results_done, yes_double_value;
3122 __ cmpl(Address(rsp, 0), T_DOUBLE);
3123 __ jcc (Assembler::zero, yes_double_value);
3124 __ cmpl(Address(rsp, 0), T_FLOAT);
3125 __ jcc (Assembler::notZero, results_done);
3126
3127 // return float value as expected by interpreter
3128 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
3129 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
3130 __ jmp(results_done);
3131
3132 // return double value as expected by interpreter
3133 __ bind(yes_double_value);
3134 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
3135 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
3136
3137 __ bind(results_done);
3138
3139 // Pop self-frame.
3140 __ leave(); // Epilog!
3141
3142 // Jump to interpreter
3143 __ ret(0);
3144
3145 // -------------
3146 // make sure all code is generated
3147 masm->flush();
3148
3149 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3150 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3151 }
3152
3153
3154 #ifdef COMPILER2
3155 //------------------------------generate_uncommon_trap_blob--------------------
3156 void SharedRuntime::generate_uncommon_trap_blob() {
3157 // allocate space for the code
3158 ResourceMark rm;
3159 // setup code generation tools
3160 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
3161 MacroAssembler* masm = new MacroAssembler(&buffer);
3162
3163 enum frame_layout {
3164 arg0_off, // thread sp + 0 // Arg location for
3165 arg1_off, // unloaded_class_index sp + 1 // calling C
3166 // The frame sender code expects that rbp will be in the "natural" place and
3167 // will override any oopMap setting for it. We must therefore force the layout
3168 // so that it agrees with the frame sender code.
3169 rbp_off, // callee saved register sp + 2
3170 return_off, // slot for return address sp + 3
3171 framesize
3172 };
3173
3174 address start = __ pc();
3175 // Push self-frame.
3176 __ subptr(rsp, return_off*wordSize); // Epilog!
3177
3178 // rbp, is an implicitly saved callee saved register (i.e. the calling
3179 // convention will save restore it in prolog/epilog) Other than that
3180 // there are no callee save registers no that adapter frames are gone.
3181 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
3182
3183 // Clear the floating point exception stack
3184 __ empty_FPU_stack();
3185
3186 // set last_Java_sp
3187 __ get_thread(rdx);
3188 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
3189
3190 // Call C code. Need thread but NOT official VM entry
3191 // crud. We cannot block on this call, no GC can happen. Call should
3192 // capture callee-saved registers as well as return values.
3193 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
3194 // argument already in ECX
3195 __ movl(Address(rsp, arg1_off*wordSize),rcx);
3196 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3197
3198 // Set an oopmap for the call site
3199 OopMapSet *oop_maps = new OopMapSet();
3200 OopMap* map = new OopMap( framesize, 0 );
3201 // No oopMap for rbp, it is known implicitly
3202
3203 oop_maps->add_gc_map( __ pc()-start, map);
3204
3205 __ get_thread(rcx);
3206
3207 __ reset_last_Java_frame(rcx, false, false);
3208
3209 // Load UnrollBlock into EDI
3210 __ movptr(rdi, rax);
3211
3212 // Pop all the frames we must move/replace.
3213 //
3214 // Frame picture (youngest to oldest)
3215 // 1: self-frame (no frame link)
3216 // 2: deopting frame (no frame link)
3217 // 3: caller of deopting frame (could be compiled/interpreted).
3218
3219 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
3220 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
3221
3222 // Pop deoptimized frame
3223 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3224 __ addptr(rsp, rcx);
3225
3226 // sp should be pointing at the return address to the caller (3)
3227
3228 // Stack bang to make sure there's enough room for these interpreter frames.
3229 if (UseStackBanging) {
3230 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3231 __ bang_stack_size(rbx, rcx);
3232 }
3233
3234
3235 // Load array of frame pcs into ECX
3236 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3237
3238 __ pop(rsi); // trash the pc
3239
3240 // Load array of frame sizes into ESI
3241 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3242
3243 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3244
3245 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3246 __ movl(counter, rbx);
3247
3248 // Pick up the initial fp we should save
3249 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3250
3251 // Now adjust the caller's stack to make up for the extra locals
3252 // but record the original sp so that we can save it in the skeletal interpreter
3253 // frame and the stack walking of interpreter_sender will get the unextended sp
3254 // value and not the "real" sp value.
3255
3256 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3257 __ movptr(sp_temp, rsp);
3258 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3259 __ subptr(rsp, rbx);
3260
3261 // Push interpreter frames in a loop
3262 Label loop;
3263 __ bind(loop);
3264 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3265 #ifdef CC_INTERP
3266 __ subptr(rbx, 4*wordSize); // we'll push pc and ebp by hand and
3267 #ifdef ASSERT
3268 __ push(0xDEADDEAD); // Make a recognizable pattern
3269 __ push(0xDEADDEAD); // (parm to RecursiveInterpreter...)
3270 #else /* ASSERT */
3271 __ subptr(rsp, 2*wordSize); // skip the "static long no_param"
3272 #endif /* ASSERT */
3273 #else /* CC_INTERP */
3274 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
3275 #endif /* CC_INTERP */
3276 __ pushptr(Address(rcx, 0)); // save return address
3277 __ enter(); // save old & set new rbp,
3278 __ subptr(rsp, rbx); // Prolog!
3279 __ movptr(rbx, sp_temp); // sender's sp
3280 #ifdef CC_INTERP
3281 __ movptr(Address(rbp,
3282 -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3283 rbx); // Make it walkable
3284 #else /* CC_INTERP */
3285 // This value is corrected by layout_activation_impl
3286 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
3287 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3288 #endif /* CC_INTERP */
3289 __ movptr(sp_temp, rsp); // pass to next frame
3290 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3291 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3292 __ decrementl(counter); // decrement counter
3293 __ jcc(Assembler::notZero, loop);
3294 __ pushptr(Address(rcx, 0)); // save final return address
3295
3296 // Re-push self-frame
3297 __ enter(); // save old & set new rbp,
3298 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
3299
3300
3301 // set last_Java_sp, last_Java_fp
3302 __ get_thread(rdi);
3303 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
3304
3305 // Call C code. Need thread but NOT official VM entry
3306 // crud. We cannot block on this call, no GC can happen. Call should
3307 // restore return values to their stack-slots with the new SP.
3308 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
3309 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
3310 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3311 // Set an oopmap for the call site
3312 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
3313
3314 __ get_thread(rdi);
3315 __ reset_last_Java_frame(rdi, true, false);
3316
3317 // Pop self-frame.
3318 __ leave(); // Epilog!
3319
3320 // Jump to interpreter
3321 __ ret(0);
3322
3323 // -------------
3324 // make sure all code is generated
3325 masm->flush();
3326
3327 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
3328 }
3329 #endif // COMPILER2
3330
3331 //------------------------------generate_handler_blob------
3332 //
3333 // Generate a special Compile2Runtime blob that saves all registers,
3334 // setup oopmap, and calls safepoint code to stop the compiled code for
3335 // a safepoint.
3336 //
3337 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3338
3339 // Account for thread arg in our frame
3340 const int additional_words = 1;
3341 int frame_size_in_words;
3342
3343 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3344
3345 ResourceMark rm;
3346 OopMapSet *oop_maps = new OopMapSet();
3347 OopMap* map;
3348
3349 // allocate space for the code
3350 // setup code generation tools
3351 CodeBuffer buffer("handler_blob", 1024, 512);
3352 MacroAssembler* masm = new MacroAssembler(&buffer);
3353
3354 const Register java_thread = rdi; // callee-saved for VC++
3355 address start = __ pc();
3356 address call_pc = NULL;
3357 bool cause_return = (poll_type == POLL_AT_RETURN);
3358 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3359 // If cause_return is true we are at a poll_return and there is
3360 // the return address on the stack to the caller on the nmethod
3361 // that is safepoint. We can leave this return on the stack and
3362 // effectively complete the return and safepoint in the caller.
3363 // Otherwise we push space for a return address that the safepoint
3364 // handler will install later to make the stack walking sensible.
3365 if (!cause_return)
3366 __ push(rbx); // Make room for return address (or push it again)
3367
3368 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
3369
3370 // The following is basically a call_VM. However, we need the precise
3371 // address of the call in order to generate an oopmap. Hence, we do all the
3372 // work ourselves.
3373
3374 // Push thread argument and setup last_Java_sp
3375 __ get_thread(java_thread);
3376 __ push(java_thread);
3377 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3378
3379 // if this was not a poll_return then we need to correct the return address now.
3380 if (!cause_return) {
3381 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3382 __ movptr(Address(rbp, wordSize), rax);
3383 }
3384
3385 // do the call
3386 __ call(RuntimeAddress(call_ptr));
3387
3388 // Set an oopmap for the call site. This oopmap will map all
3389 // oop-registers and debug-info registers as callee-saved. This
3390 // will allow deoptimization at this safepoint to find all possible
3391 // debug-info recordings, as well as let GC find all oops.
3392
3393 oop_maps->add_gc_map( __ pc() - start, map);
3394
3395 // Discard arg
3396 __ pop(rcx);
3397
3398 Label noException;
3399
3400 // Clear last_Java_sp again
3401 __ get_thread(java_thread);
3402 __ reset_last_Java_frame(java_thread, false, false);
3403
3404 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3405 __ jcc(Assembler::equal, noException);
3406
3407 // Exception pending
3408 RegisterSaver::restore_live_registers(masm, save_vectors);
3409
3410 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3411
3412 __ bind(noException);
3413
3414 // Normal exit, register restoring and exit
3415 RegisterSaver::restore_live_registers(masm, save_vectors);
3416
3417 __ ret(0);
3418
3419 // make sure all code is generated
3420 masm->flush();
3421
3422 // Fill-out other meta info
3423 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3424 }
3425
3426 //
3427 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3428 //
3429 // Generate a stub that calls into vm to find out the proper destination
3430 // of a java call. All the argument registers are live at this point
3431 // but since this is generic code we don't know what they are and the caller
3432 // must do any gc of the args.
3433 //
3434 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3435 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3436
3437 // allocate space for the code
3438 ResourceMark rm;
3439
3440 CodeBuffer buffer(name, 1000, 512);
3441 MacroAssembler* masm = new MacroAssembler(&buffer);
3442
3443 int frame_size_words;
3444 enum frame_layout {
3445 thread_off,
3446 extra_words };
3447
3448 OopMapSet *oop_maps = new OopMapSet();
3449 OopMap* map = NULL;
3450
3451 int start = __ offset();
3452
3453 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3454
3455 int frame_complete = __ offset();
3456
3457 const Register thread = rdi;
3458 __ get_thread(rdi);
3459
3460 __ push(thread);
3461 __ set_last_Java_frame(thread, noreg, rbp, NULL);
3462
3463 __ call(RuntimeAddress(destination));
3464
3465
3466 // Set an oopmap for the call site.
3467 // We need this not only for callee-saved registers, but also for volatile
3468 // registers that the compiler might be keeping live across a safepoint.
3469
3470 oop_maps->add_gc_map( __ offset() - start, map);
3471
3472 // rax, contains the address we are going to jump to assuming no exception got installed
3473
3474 __ addptr(rsp, wordSize);
3475
3476 // clear last_Java_sp
3477 __ reset_last_Java_frame(thread, true, false);
3478 // check for pending exceptions
3479 Label pending;
3480 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3481 __ jcc(Assembler::notEqual, pending);
3482
3483 // get the returned Method*
3484 __ get_vm_result_2(rbx, thread);
3485 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3486
3487 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3488
3489 RegisterSaver::restore_live_registers(masm);
3490
3491 // We are back the the original state on entry and ready to go.
3492
3493 __ jmp(rax);
3494
3495 // Pending exception after the safepoint
3496
3497 __ bind(pending);
3498
3499 RegisterSaver::restore_live_registers(masm);
3500
3501 // exception pending => remove activation and forward to exception handler
3502
3503 __ get_thread(thread);
3504 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3505 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3506 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3507
3508 // -------------
3509 // make sure all code is generated
3510 masm->flush();
3511
3512 // return the blob
3513 // frame_size_words or bytes??
3514 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3515 }