rev 5188 : 8024344: PPC64 (part 112): C argument in register AND stack slot.
Summary: On PPC, the first 13 floating point arguments to C calls are passed in floating point registers. Also, all but the first 8 arguments are passed on the stack. So there can be floating point arguments that are passed on the stack and in a register. We duplicate the regs datastructure in c_calling_convention() to represent this.

   1 /*
   2  * Copyright (c) 2003, 2012, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "asm/macroAssembler.inline.hpp"
  28 #include "code/debugInfoRec.hpp"
  29 #include "code/icBuffer.hpp"
  30 #include "code/vtableStubs.hpp"
  31 #include "interpreter/interpreter.hpp"
  32 #include "oops/compiledICHolder.hpp"
  33 #include "prims/jvmtiRedefineClassesTrace.hpp"
  34 #include "runtime/sharedRuntime.hpp"
  35 #include "runtime/vframeArray.hpp"
  36 #include "vmreg_x86.inline.hpp"
  37 #ifdef COMPILER1
  38 #include "c1/c1_Runtime1.hpp"
  39 #endif
  40 #ifdef COMPILER2
  41 #include "opto/runtime.hpp"
  42 #endif
  43 
  44 #define __ masm->
  45 
  46 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
  47 
  48 class RegisterSaver {
  49   // Capture info about frame layout
  50 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
  51   enum layout {
  52                 fpu_state_off = 0,
  53                 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
  54                 st0_off, st0H_off,
  55                 st1_off, st1H_off,
  56                 st2_off, st2H_off,
  57                 st3_off, st3H_off,
  58                 st4_off, st4H_off,
  59                 st5_off, st5H_off,
  60                 st6_off, st6H_off,
  61                 st7_off, st7H_off,
  62                 xmm_off,
  63                 DEF_XMM_OFFS(0),
  64                 DEF_XMM_OFFS(1),
  65                 DEF_XMM_OFFS(2),
  66                 DEF_XMM_OFFS(3),
  67                 DEF_XMM_OFFS(4),
  68                 DEF_XMM_OFFS(5),
  69                 DEF_XMM_OFFS(6),
  70                 DEF_XMM_OFFS(7),
  71                 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
  72                 rdi_off,
  73                 rsi_off,
  74                 ignore_off,  // extra copy of rbp,
  75                 rsp_off,
  76                 rbx_off,
  77                 rdx_off,
  78                 rcx_off,
  79                 rax_off,
  80                 // The frame sender code expects that rbp will be in the "natural" place and
  81                 // will override any oopMap setting for it. We must therefore force the layout
  82                 // so that it agrees with the frame sender code.
  83                 rbp_off,
  84                 return_off,      // slot for return address
  85                 reg_save_size };
  86   enum { FPU_regs_live = flags_off - fpu_state_end };
  87 
  88   public:
  89 
  90   static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
  91                                      int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
  92   static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
  93 
  94   static int rax_offset() { return rax_off; }
  95   static int rbx_offset() { return rbx_off; }
  96 
  97   // Offsets into the register save area
  98   // Used by deoptimization when it is managing result register
  99   // values on its own
 100 
 101   static int raxOffset(void) { return rax_off; }
 102   static int rdxOffset(void) { return rdx_off; }
 103   static int rbxOffset(void) { return rbx_off; }
 104   static int xmm0Offset(void) { return xmm0_off; }
 105   // This really returns a slot in the fp save area, which one is not important
 106   static int fpResultOffset(void) { return st0_off; }
 107 
 108   // During deoptimization only the result register need to be restored
 109   // all the other values have already been extracted.
 110 
 111   static void restore_result_registers(MacroAssembler* masm);
 112 
 113 };
 114 
 115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
 116                                            int* total_frame_words, bool verify_fpu, bool save_vectors) {
 117   int vect_words = 0;
 118 #ifdef COMPILER2
 119   if (save_vectors) {
 120     assert(UseAVX > 0, "256bit vectors are supported only with AVX");
 121     assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
 122     // Save upper half of YMM registes
 123     vect_words = 8 * 16 / wordSize;
 124     additional_frame_words += vect_words;
 125   }
 126 #else
 127   assert(!save_vectors, "vectors are generated only by C2");
 128 #endif
 129   int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
 130   int frame_words = frame_size_in_bytes / wordSize;
 131   *total_frame_words = frame_words;
 132 
 133   assert(FPUStateSizeInWords == 27, "update stack layout");
 134 
 135   // save registers, fpu state, and flags
 136   // We assume caller has already has return address slot on the stack
 137   // We push epb twice in this sequence because we want the real rbp,
 138   // to be under the return like a normal enter and we want to use pusha
 139   // We push by hand instead of pusing push
 140   __ enter();
 141   __ pusha();
 142   __ pushf();
 143   __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
 144   __ push_FPU_state();          // Save FPU state & init
 145 
 146   if (verify_fpu) {
 147     // Some stubs may have non standard FPU control word settings so
 148     // only check and reset the value when it required to be the
 149     // standard value.  The safepoint blob in particular can be used
 150     // in methods which are using the 24 bit control word for
 151     // optimized float math.
 152 
 153 #ifdef ASSERT
 154     // Make sure the control word has the expected value
 155     Label ok;
 156     __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
 157     __ jccb(Assembler::equal, ok);
 158     __ stop("corrupted control word detected");
 159     __ bind(ok);
 160 #endif
 161 
 162     // Reset the control word to guard against exceptions being unmasked
 163     // since fstp_d can cause FPU stack underflow exceptions.  Write it
 164     // into the on stack copy and then reload that to make sure that the
 165     // current and future values are correct.
 166     __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
 167   }
 168 
 169   __ frstor(Address(rsp, 0));
 170   if (!verify_fpu) {
 171     // Set the control word so that exceptions are masked for the
 172     // following code.
 173     __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
 174   }
 175 
 176   // Save the FPU registers in de-opt-able form
 177 
 178   __ fstp_d(Address(rsp, st0_off*wordSize)); // st(0)
 179   __ fstp_d(Address(rsp, st1_off*wordSize)); // st(1)
 180   __ fstp_d(Address(rsp, st2_off*wordSize)); // st(2)
 181   __ fstp_d(Address(rsp, st3_off*wordSize)); // st(3)
 182   __ fstp_d(Address(rsp, st4_off*wordSize)); // st(4)
 183   __ fstp_d(Address(rsp, st5_off*wordSize)); // st(5)
 184   __ fstp_d(Address(rsp, st6_off*wordSize)); // st(6)
 185   __ fstp_d(Address(rsp, st7_off*wordSize)); // st(7)
 186 
 187   if( UseSSE == 1 ) {           // Save the XMM state
 188     __ movflt(Address(rsp,xmm0_off*wordSize),xmm0);
 189     __ movflt(Address(rsp,xmm1_off*wordSize),xmm1);
 190     __ movflt(Address(rsp,xmm2_off*wordSize),xmm2);
 191     __ movflt(Address(rsp,xmm3_off*wordSize),xmm3);
 192     __ movflt(Address(rsp,xmm4_off*wordSize),xmm4);
 193     __ movflt(Address(rsp,xmm5_off*wordSize),xmm5);
 194     __ movflt(Address(rsp,xmm6_off*wordSize),xmm6);
 195     __ movflt(Address(rsp,xmm7_off*wordSize),xmm7);
 196   } else if( UseSSE >= 2 ) {
 197     // Save whole 128bit (16 bytes) XMM regiters
 198     __ movdqu(Address(rsp,xmm0_off*wordSize),xmm0);
 199     __ movdqu(Address(rsp,xmm1_off*wordSize),xmm1);
 200     __ movdqu(Address(rsp,xmm2_off*wordSize),xmm2);
 201     __ movdqu(Address(rsp,xmm3_off*wordSize),xmm3);
 202     __ movdqu(Address(rsp,xmm4_off*wordSize),xmm4);
 203     __ movdqu(Address(rsp,xmm5_off*wordSize),xmm5);
 204     __ movdqu(Address(rsp,xmm6_off*wordSize),xmm6);
 205     __ movdqu(Address(rsp,xmm7_off*wordSize),xmm7);
 206   }
 207 
 208   if (vect_words > 0) {
 209     assert(vect_words*wordSize == 128, "");
 210     __ subptr(rsp, 128); // Save upper half of YMM registes
 211     __ vextractf128h(Address(rsp,  0),xmm0);
 212     __ vextractf128h(Address(rsp, 16),xmm1);
 213     __ vextractf128h(Address(rsp, 32),xmm2);
 214     __ vextractf128h(Address(rsp, 48),xmm3);
 215     __ vextractf128h(Address(rsp, 64),xmm4);
 216     __ vextractf128h(Address(rsp, 80),xmm5);
 217     __ vextractf128h(Address(rsp, 96),xmm6);
 218     __ vextractf128h(Address(rsp,112),xmm7);
 219   }
 220 
 221   // Set an oopmap for the call site.  This oopmap will map all
 222   // oop-registers and debug-info registers as callee-saved.  This
 223   // will allow deoptimization at this safepoint to find all possible
 224   // debug-info recordings, as well as let GC find all oops.
 225 
 226   OopMapSet *oop_maps = new OopMapSet();
 227   OopMap* map =  new OopMap( frame_words, 0 );
 228 
 229 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
 230 
 231   map->set_callee_saved(STACK_OFFSET( rax_off), rax->as_VMReg());
 232   map->set_callee_saved(STACK_OFFSET( rcx_off), rcx->as_VMReg());
 233   map->set_callee_saved(STACK_OFFSET( rdx_off), rdx->as_VMReg());
 234   map->set_callee_saved(STACK_OFFSET( rbx_off), rbx->as_VMReg());
 235   // rbp, location is known implicitly, no oopMap
 236   map->set_callee_saved(STACK_OFFSET( rsi_off), rsi->as_VMReg());
 237   map->set_callee_saved(STACK_OFFSET( rdi_off), rdi->as_VMReg());
 238   map->set_callee_saved(STACK_OFFSET(st0_off), as_FloatRegister(0)->as_VMReg());
 239   map->set_callee_saved(STACK_OFFSET(st1_off), as_FloatRegister(1)->as_VMReg());
 240   map->set_callee_saved(STACK_OFFSET(st2_off), as_FloatRegister(2)->as_VMReg());
 241   map->set_callee_saved(STACK_OFFSET(st3_off), as_FloatRegister(3)->as_VMReg());
 242   map->set_callee_saved(STACK_OFFSET(st4_off), as_FloatRegister(4)->as_VMReg());
 243   map->set_callee_saved(STACK_OFFSET(st5_off), as_FloatRegister(5)->as_VMReg());
 244   map->set_callee_saved(STACK_OFFSET(st6_off), as_FloatRegister(6)->as_VMReg());
 245   map->set_callee_saved(STACK_OFFSET(st7_off), as_FloatRegister(7)->as_VMReg());
 246   map->set_callee_saved(STACK_OFFSET(xmm0_off), xmm0->as_VMReg());
 247   map->set_callee_saved(STACK_OFFSET(xmm1_off), xmm1->as_VMReg());
 248   map->set_callee_saved(STACK_OFFSET(xmm2_off), xmm2->as_VMReg());
 249   map->set_callee_saved(STACK_OFFSET(xmm3_off), xmm3->as_VMReg());
 250   map->set_callee_saved(STACK_OFFSET(xmm4_off), xmm4->as_VMReg());
 251   map->set_callee_saved(STACK_OFFSET(xmm5_off), xmm5->as_VMReg());
 252   map->set_callee_saved(STACK_OFFSET(xmm6_off), xmm6->as_VMReg());
 253   map->set_callee_saved(STACK_OFFSET(xmm7_off), xmm7->as_VMReg());
 254   // %%% This is really a waste but we'll keep things as they were for now
 255   if (true) {
 256 #define NEXTREG(x) (x)->as_VMReg()->next()
 257     map->set_callee_saved(STACK_OFFSET(st0H_off), NEXTREG(as_FloatRegister(0)));
 258     map->set_callee_saved(STACK_OFFSET(st1H_off), NEXTREG(as_FloatRegister(1)));
 259     map->set_callee_saved(STACK_OFFSET(st2H_off), NEXTREG(as_FloatRegister(2)));
 260     map->set_callee_saved(STACK_OFFSET(st3H_off), NEXTREG(as_FloatRegister(3)));
 261     map->set_callee_saved(STACK_OFFSET(st4H_off), NEXTREG(as_FloatRegister(4)));
 262     map->set_callee_saved(STACK_OFFSET(st5H_off), NEXTREG(as_FloatRegister(5)));
 263     map->set_callee_saved(STACK_OFFSET(st6H_off), NEXTREG(as_FloatRegister(6)));
 264     map->set_callee_saved(STACK_OFFSET(st7H_off), NEXTREG(as_FloatRegister(7)));
 265     map->set_callee_saved(STACK_OFFSET(xmm0H_off), NEXTREG(xmm0));
 266     map->set_callee_saved(STACK_OFFSET(xmm1H_off), NEXTREG(xmm1));
 267     map->set_callee_saved(STACK_OFFSET(xmm2H_off), NEXTREG(xmm2));
 268     map->set_callee_saved(STACK_OFFSET(xmm3H_off), NEXTREG(xmm3));
 269     map->set_callee_saved(STACK_OFFSET(xmm4H_off), NEXTREG(xmm4));
 270     map->set_callee_saved(STACK_OFFSET(xmm5H_off), NEXTREG(xmm5));
 271     map->set_callee_saved(STACK_OFFSET(xmm6H_off), NEXTREG(xmm6));
 272     map->set_callee_saved(STACK_OFFSET(xmm7H_off), NEXTREG(xmm7));
 273 #undef NEXTREG
 274 #undef STACK_OFFSET
 275   }
 276 
 277   return map;
 278 
 279 }
 280 
 281 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
 282   // Recover XMM & FPU state
 283   int additional_frame_bytes = 0;
 284 #ifdef COMPILER2
 285   if (restore_vectors) {
 286     assert(UseAVX > 0, "256bit vectors are supported only with AVX");
 287     assert(MaxVectorSize == 32, "only 256bit vectors are supported now");
 288     additional_frame_bytes = 128;
 289   }
 290 #else
 291   assert(!restore_vectors, "vectors are generated only by C2");
 292 #endif
 293   if (UseSSE == 1) {
 294     assert(additional_frame_bytes == 0, "");
 295     __ movflt(xmm0,Address(rsp,xmm0_off*wordSize));
 296     __ movflt(xmm1,Address(rsp,xmm1_off*wordSize));
 297     __ movflt(xmm2,Address(rsp,xmm2_off*wordSize));
 298     __ movflt(xmm3,Address(rsp,xmm3_off*wordSize));
 299     __ movflt(xmm4,Address(rsp,xmm4_off*wordSize));
 300     __ movflt(xmm5,Address(rsp,xmm5_off*wordSize));
 301     __ movflt(xmm6,Address(rsp,xmm6_off*wordSize));
 302     __ movflt(xmm7,Address(rsp,xmm7_off*wordSize));
 303   } else if (UseSSE >= 2) {
 304 #define STACK_ADDRESS(x) Address(rsp,(x)*wordSize + additional_frame_bytes)
 305     __ movdqu(xmm0,STACK_ADDRESS(xmm0_off));
 306     __ movdqu(xmm1,STACK_ADDRESS(xmm1_off));
 307     __ movdqu(xmm2,STACK_ADDRESS(xmm2_off));
 308     __ movdqu(xmm3,STACK_ADDRESS(xmm3_off));
 309     __ movdqu(xmm4,STACK_ADDRESS(xmm4_off));
 310     __ movdqu(xmm5,STACK_ADDRESS(xmm5_off));
 311     __ movdqu(xmm6,STACK_ADDRESS(xmm6_off));
 312     __ movdqu(xmm7,STACK_ADDRESS(xmm7_off));
 313 #undef STACK_ADDRESS
 314   }
 315   if (restore_vectors) {
 316     // Restore upper half of YMM registes.
 317     assert(additional_frame_bytes == 128, "");
 318     __ vinsertf128h(xmm0, Address(rsp,  0));
 319     __ vinsertf128h(xmm1, Address(rsp, 16));
 320     __ vinsertf128h(xmm2, Address(rsp, 32));
 321     __ vinsertf128h(xmm3, Address(rsp, 48));
 322     __ vinsertf128h(xmm4, Address(rsp, 64));
 323     __ vinsertf128h(xmm5, Address(rsp, 80));
 324     __ vinsertf128h(xmm6, Address(rsp, 96));
 325     __ vinsertf128h(xmm7, Address(rsp,112));
 326     __ addptr(rsp, additional_frame_bytes);
 327   }
 328   __ pop_FPU_state();
 329   __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
 330 
 331   __ popf();
 332   __ popa();
 333   // Get the rbp, described implicitly by the frame sender code (no oopMap)
 334   __ pop(rbp);
 335 
 336 }
 337 
 338 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
 339 
 340   // Just restore result register. Only used by deoptimization. By
 341   // now any callee save register that needs to be restore to a c2
 342   // caller of the deoptee has been extracted into the vframeArray
 343   // and will be stuffed into the c2i adapter we create for later
 344   // restoration so only result registers need to be restored here.
 345   //
 346 
 347   __ frstor(Address(rsp, 0));      // Restore fpu state
 348 
 349   // Recover XMM & FPU state
 350   if( UseSSE == 1 ) {
 351     __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
 352   } else if( UseSSE >= 2 ) {
 353     __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
 354   }
 355   __ movptr(rax, Address(rsp, rax_off*wordSize));
 356   __ movptr(rdx, Address(rsp, rdx_off*wordSize));
 357   // Pop all of the register save are off the stack except the return address
 358   __ addptr(rsp, return_off * wordSize);
 359 }
 360 
 361 // Is vector's size (in bytes) bigger than a size saved by default?
 362 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
 363 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
 364 bool SharedRuntime::is_wide_vector(int size) {
 365   return size > 16;
 366 }
 367 
 368 // The java_calling_convention describes stack locations as ideal slots on
 369 // a frame with no abi restrictions. Since we must observe abi restrictions
 370 // (like the placement of the register window) the slots must be biased by
 371 // the following value.
 372 static int reg2offset_in(VMReg r) {
 373   // Account for saved rbp, and return address
 374   // This should really be in_preserve_stack_slots
 375   return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
 376 }
 377 
 378 static int reg2offset_out(VMReg r) {
 379   return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
 380 }
 381 
 382 // ---------------------------------------------------------------------------
 383 // Read the array of BasicTypes from a signature, and compute where the
 384 // arguments should go.  Values in the VMRegPair regs array refer to 4-byte
 385 // quantities.  Values less than SharedInfo::stack0 are registers, those above
 386 // refer to 4-byte stack slots.  All stack slots are based off of the stack pointer
 387 // as framesizes are fixed.
 388 // VMRegImpl::stack0 refers to the first slot 0(sp).
 389 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher.  Register
 390 // up to RegisterImpl::number_of_registers) are the 32-bit
 391 // integer registers.
 392 
 393 // Pass first two oop/int args in registers ECX and EDX.
 394 // Pass first two float/double args in registers XMM0 and XMM1.
 395 // Doubles have precedence, so if you pass a mix of floats and doubles
 396 // the doubles will grab the registers before the floats will.
 397 
 398 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
 399 // either 32-bit or 64-bit depending on the build.  The OUTPUTS are in 32-bit
 400 // units regardless of build. Of course for i486 there is no 64 bit build
 401 
 402 
 403 // ---------------------------------------------------------------------------
 404 // The compiled Java calling convention.
 405 // Pass first two oop/int args in registers ECX and EDX.
 406 // Pass first two float/double args in registers XMM0 and XMM1.
 407 // Doubles have precedence, so if you pass a mix of floats and doubles
 408 // the doubles will grab the registers before the floats will.
 409 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
 410                                            VMRegPair *regs,
 411                                            int total_args_passed,
 412                                            int is_outgoing) {
 413   uint    stack = 0;          // Starting stack position for args on stack
 414 
 415 
 416   // Pass first two oop/int args in registers ECX and EDX.
 417   uint reg_arg0 = 9999;
 418   uint reg_arg1 = 9999;
 419 
 420   // Pass first two float/double args in registers XMM0 and XMM1.
 421   // Doubles have precedence, so if you pass a mix of floats and doubles
 422   // the doubles will grab the registers before the floats will.
 423   // CNC - TURNED OFF FOR non-SSE.
 424   //       On Intel we have to round all doubles (and most floats) at
 425   //       call sites by storing to the stack in any case.
 426   // UseSSE=0 ==> Don't Use ==> 9999+0
 427   // UseSSE=1 ==> Floats only ==> 9999+1
 428   // UseSSE>=2 ==> Floats or doubles ==> 9999+2
 429   enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
 430   uint fargs = (UseSSE>=2) ? 2 : UseSSE;
 431   uint freg_arg0 = 9999+fargs;
 432   uint freg_arg1 = 9999+fargs;
 433 
 434   // Pass doubles & longs aligned on the stack.  First count stack slots for doubles
 435   int i;
 436   for( i = 0; i < total_args_passed; i++) {
 437     if( sig_bt[i] == T_DOUBLE ) {
 438       // first 2 doubles go in registers
 439       if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
 440       else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
 441       else // Else double is passed low on the stack to be aligned.
 442         stack += 2;
 443     } else if( sig_bt[i] == T_LONG ) {
 444       stack += 2;
 445     }
 446   }
 447   int dstack = 0;             // Separate counter for placing doubles
 448 
 449   // Now pick where all else goes.
 450   for( i = 0; i < total_args_passed; i++) {
 451     // From the type and the argument number (count) compute the location
 452     switch( sig_bt[i] ) {
 453     case T_SHORT:
 454     case T_CHAR:
 455     case T_BYTE:
 456     case T_BOOLEAN:
 457     case T_INT:
 458     case T_ARRAY:
 459     case T_OBJECT:
 460     case T_ADDRESS:
 461       if( reg_arg0 == 9999 )  {
 462         reg_arg0 = i;
 463         regs[i].set1(rcx->as_VMReg());
 464       } else if( reg_arg1 == 9999 )  {
 465         reg_arg1 = i;
 466         regs[i].set1(rdx->as_VMReg());
 467       } else {
 468         regs[i].set1(VMRegImpl::stack2reg(stack++));
 469       }
 470       break;
 471     case T_FLOAT:
 472       if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
 473         freg_arg0 = i;
 474         regs[i].set1(xmm0->as_VMReg());
 475       } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
 476         freg_arg1 = i;
 477         regs[i].set1(xmm1->as_VMReg());
 478       } else {
 479         regs[i].set1(VMRegImpl::stack2reg(stack++));
 480       }
 481       break;
 482     case T_LONG:
 483       assert(sig_bt[i+1] == T_VOID, "missing Half" );
 484       regs[i].set2(VMRegImpl::stack2reg(dstack));
 485       dstack += 2;
 486       break;
 487     case T_DOUBLE:
 488       assert(sig_bt[i+1] == T_VOID, "missing Half" );
 489       if( freg_arg0 == (uint)i ) {
 490         regs[i].set2(xmm0->as_VMReg());
 491       } else if( freg_arg1 == (uint)i ) {
 492         regs[i].set2(xmm1->as_VMReg());
 493       } else {
 494         regs[i].set2(VMRegImpl::stack2reg(dstack));
 495         dstack += 2;
 496       }
 497       break;
 498     case T_VOID: regs[i].set_bad(); break;
 499       break;
 500     default:
 501       ShouldNotReachHere();
 502       break;
 503     }
 504   }
 505 
 506   // return value can be odd number of VMRegImpl stack slots make multiple of 2
 507   return round_to(stack, 2);
 508 }
 509 
 510 // Patch the callers callsite with entry to compiled code if it exists.
 511 static void patch_callers_callsite(MacroAssembler *masm) {
 512   Label L;
 513   __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 514   __ jcc(Assembler::equal, L);
 515   // Schedule the branch target address early.
 516   // Call into the VM to patch the caller, then jump to compiled callee
 517   // rax, isn't live so capture return address while we easily can
 518   __ movptr(rax, Address(rsp, 0));
 519   __ pusha();
 520   __ pushf();
 521 
 522   if (UseSSE == 1) {
 523     __ subptr(rsp, 2*wordSize);
 524     __ movflt(Address(rsp, 0), xmm0);
 525     __ movflt(Address(rsp, wordSize), xmm1);
 526   }
 527   if (UseSSE >= 2) {
 528     __ subptr(rsp, 4*wordSize);
 529     __ movdbl(Address(rsp, 0), xmm0);
 530     __ movdbl(Address(rsp, 2*wordSize), xmm1);
 531   }
 532 #ifdef COMPILER2
 533   // C2 may leave the stack dirty if not in SSE2+ mode
 534   if (UseSSE >= 2) {
 535     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 536   } else {
 537     __ empty_FPU_stack();
 538   }
 539 #endif /* COMPILER2 */
 540 
 541   // VM needs caller's callsite
 542   __ push(rax);
 543   // VM needs target method
 544   __ push(rbx);
 545   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
 546   __ addptr(rsp, 2*wordSize);
 547 
 548   if (UseSSE == 1) {
 549     __ movflt(xmm0, Address(rsp, 0));
 550     __ movflt(xmm1, Address(rsp, wordSize));
 551     __ addptr(rsp, 2*wordSize);
 552   }
 553   if (UseSSE >= 2) {
 554     __ movdbl(xmm0, Address(rsp, 0));
 555     __ movdbl(xmm1, Address(rsp, 2*wordSize));
 556     __ addptr(rsp, 4*wordSize);
 557   }
 558 
 559   __ popf();
 560   __ popa();
 561   __ bind(L);
 562 }
 563 
 564 
 565 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
 566   int next_off = st_off - Interpreter::stackElementSize;
 567   __ movdbl(Address(rsp, next_off), r);
 568 }
 569 
 570 static void gen_c2i_adapter(MacroAssembler *masm,
 571                             int total_args_passed,
 572                             int comp_args_on_stack,
 573                             const BasicType *sig_bt,
 574                             const VMRegPair *regs,
 575                             Label& skip_fixup) {
 576   // Before we get into the guts of the C2I adapter, see if we should be here
 577   // at all.  We've come from compiled code and are attempting to jump to the
 578   // interpreter, which means the caller made a static call to get here
 579   // (vcalls always get a compiled target if there is one).  Check for a
 580   // compiled target.  If there is one, we need to patch the caller's call.
 581   patch_callers_callsite(masm);
 582 
 583   __ bind(skip_fixup);
 584 
 585 #ifdef COMPILER2
 586   // C2 may leave the stack dirty if not in SSE2+ mode
 587   if (UseSSE >= 2) {
 588     __ verify_FPU(0, "c2i transition should have clean FPU stack");
 589   } else {
 590     __ empty_FPU_stack();
 591   }
 592 #endif /* COMPILER2 */
 593 
 594   // Since all args are passed on the stack, total_args_passed * interpreter_
 595   // stack_element_size  is the
 596   // space we need.
 597   int extraspace = total_args_passed * Interpreter::stackElementSize;
 598 
 599   // Get return address
 600   __ pop(rax);
 601 
 602   // set senderSP value
 603   __ movptr(rsi, rsp);
 604 
 605   __ subptr(rsp, extraspace);
 606 
 607   // Now write the args into the outgoing interpreter space
 608   for (int i = 0; i < total_args_passed; i++) {
 609     if (sig_bt[i] == T_VOID) {
 610       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 611       continue;
 612     }
 613 
 614     // st_off points to lowest address on stack.
 615     int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
 616     int next_off = st_off - Interpreter::stackElementSize;
 617 
 618     // Say 4 args:
 619     // i   st_off
 620     // 0   12 T_LONG
 621     // 1    8 T_VOID
 622     // 2    4 T_OBJECT
 623     // 3    0 T_BOOL
 624     VMReg r_1 = regs[i].first();
 625     VMReg r_2 = regs[i].second();
 626     if (!r_1->is_valid()) {
 627       assert(!r_2->is_valid(), "");
 628       continue;
 629     }
 630 
 631     if (r_1->is_stack()) {
 632       // memory to memory use fpu stack top
 633       int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
 634 
 635       if (!r_2->is_valid()) {
 636         __ movl(rdi, Address(rsp, ld_off));
 637         __ movptr(Address(rsp, st_off), rdi);
 638       } else {
 639 
 640         // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
 641         // st_off == MSW, st_off-wordSize == LSW
 642 
 643         __ movptr(rdi, Address(rsp, ld_off));
 644         __ movptr(Address(rsp, next_off), rdi);
 645 #ifndef _LP64
 646         __ movptr(rdi, Address(rsp, ld_off + wordSize));
 647         __ movptr(Address(rsp, st_off), rdi);
 648 #else
 649 #ifdef ASSERT
 650         // Overwrite the unused slot with known junk
 651         __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
 652         __ movptr(Address(rsp, st_off), rax);
 653 #endif /* ASSERT */
 654 #endif // _LP64
 655       }
 656     } else if (r_1->is_Register()) {
 657       Register r = r_1->as_Register();
 658       if (!r_2->is_valid()) {
 659         __ movl(Address(rsp, st_off), r);
 660       } else {
 661         // long/double in gpr
 662         NOT_LP64(ShouldNotReachHere());
 663         // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
 664         // T_DOUBLE and T_LONG use two slots in the interpreter
 665         if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
 666           // long/double in gpr
 667 #ifdef ASSERT
 668           // Overwrite the unused slot with known junk
 669           LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
 670           __ movptr(Address(rsp, st_off), rax);
 671 #endif /* ASSERT */
 672           __ movptr(Address(rsp, next_off), r);
 673         } else {
 674           __ movptr(Address(rsp, st_off), r);
 675         }
 676       }
 677     } else {
 678       assert(r_1->is_XMMRegister(), "");
 679       if (!r_2->is_valid()) {
 680         __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
 681       } else {
 682         assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
 683         move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
 684       }
 685     }
 686   }
 687 
 688   // Schedule the branch target address early.
 689   __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
 690   // And repush original return address
 691   __ push(rax);
 692   __ jmp(rcx);
 693 }
 694 
 695 
 696 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
 697   int next_val_off = ld_off - Interpreter::stackElementSize;
 698   __ movdbl(r, Address(saved_sp, next_val_off));
 699 }
 700 
 701 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
 702                         address code_start, address code_end,
 703                         Label& L_ok) {
 704   Label L_fail;
 705   __ lea(temp_reg, ExternalAddress(code_start));
 706   __ cmpptr(pc_reg, temp_reg);
 707   __ jcc(Assembler::belowEqual, L_fail);
 708   __ lea(temp_reg, ExternalAddress(code_end));
 709   __ cmpptr(pc_reg, temp_reg);
 710   __ jcc(Assembler::below, L_ok);
 711   __ bind(L_fail);
 712 }
 713 
 714 static void gen_i2c_adapter(MacroAssembler *masm,
 715                             int total_args_passed,
 716                             int comp_args_on_stack,
 717                             const BasicType *sig_bt,
 718                             const VMRegPair *regs) {
 719 
 720   // Note: rsi contains the senderSP on entry. We must preserve it since
 721   // we may do a i2c -> c2i transition if we lose a race where compiled
 722   // code goes non-entrant while we get args ready.
 723 
 724   // Adapters can be frameless because they do not require the caller
 725   // to perform additional cleanup work, such as correcting the stack pointer.
 726   // An i2c adapter is frameless because the *caller* frame, which is interpreted,
 727   // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
 728   // even if a callee has modified the stack pointer.
 729   // A c2i adapter is frameless because the *callee* frame, which is interpreted,
 730   // routinely repairs its caller's stack pointer (from sender_sp, which is set
 731   // up via the senderSP register).
 732   // In other words, if *either* the caller or callee is interpreted, we can
 733   // get the stack pointer repaired after a call.
 734   // This is why c2i and i2c adapters cannot be indefinitely composed.
 735   // In particular, if a c2i adapter were to somehow call an i2c adapter,
 736   // both caller and callee would be compiled methods, and neither would
 737   // clean up the stack pointer changes performed by the two adapters.
 738   // If this happens, control eventually transfers back to the compiled
 739   // caller, but with an uncorrected stack, causing delayed havoc.
 740 
 741   // Pick up the return address
 742   __ movptr(rax, Address(rsp, 0));
 743 
 744   if (VerifyAdapterCalls &&
 745       (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
 746     // So, let's test for cascading c2i/i2c adapters right now.
 747     //  assert(Interpreter::contains($return_addr) ||
 748     //         StubRoutines::contains($return_addr),
 749     //         "i2c adapter must return to an interpreter frame");
 750     __ block_comment("verify_i2c { ");
 751     Label L_ok;
 752     if (Interpreter::code() != NULL)
 753       range_check(masm, rax, rdi,
 754                   Interpreter::code()->code_start(), Interpreter::code()->code_end(),
 755                   L_ok);
 756     if (StubRoutines::code1() != NULL)
 757       range_check(masm, rax, rdi,
 758                   StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
 759                   L_ok);
 760     if (StubRoutines::code2() != NULL)
 761       range_check(masm, rax, rdi,
 762                   StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
 763                   L_ok);
 764     const char* msg = "i2c adapter must return to an interpreter frame";
 765     __ block_comment(msg);
 766     __ stop(msg);
 767     __ bind(L_ok);
 768     __ block_comment("} verify_i2ce ");
 769   }
 770 
 771   // Must preserve original SP for loading incoming arguments because
 772   // we need to align the outgoing SP for compiled code.
 773   __ movptr(rdi, rsp);
 774 
 775   // Cut-out for having no stack args.  Since up to 2 int/oop args are passed
 776   // in registers, we will occasionally have no stack args.
 777   int comp_words_on_stack = 0;
 778   if (comp_args_on_stack) {
 779     // Sig words on the stack are greater-than VMRegImpl::stack0.  Those in
 780     // registers are below.  By subtracting stack0, we either get a negative
 781     // number (all values in registers) or the maximum stack slot accessed.
 782     // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
 783     // Convert 4-byte stack slots to words.
 784     comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
 785     // Round up to miminum stack alignment, in wordSize
 786     comp_words_on_stack = round_to(comp_words_on_stack, 2);
 787     __ subptr(rsp, comp_words_on_stack * wordSize);
 788   }
 789 
 790   // Align the outgoing SP
 791   __ andptr(rsp, -(StackAlignmentInBytes));
 792 
 793   // push the return address on the stack (note that pushing, rather
 794   // than storing it, yields the correct frame alignment for the callee)
 795   __ push(rax);
 796 
 797   // Put saved SP in another register
 798   const Register saved_sp = rax;
 799   __ movptr(saved_sp, rdi);
 800 
 801 
 802   // Will jump to the compiled code just as if compiled code was doing it.
 803   // Pre-load the register-jump target early, to schedule it better.
 804   __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
 805 
 806   // Now generate the shuffle code.  Pick up all register args and move the
 807   // rest through the floating point stack top.
 808   for (int i = 0; i < total_args_passed; i++) {
 809     if (sig_bt[i] == T_VOID) {
 810       // Longs and doubles are passed in native word order, but misaligned
 811       // in the 32-bit build.
 812       assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
 813       continue;
 814     }
 815 
 816     // Pick up 0, 1 or 2 words from SP+offset.
 817 
 818     assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
 819             "scrambled load targets?");
 820     // Load in argument order going down.
 821     int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
 822     // Point to interpreter value (vs. tag)
 823     int next_off = ld_off - Interpreter::stackElementSize;
 824     //
 825     //
 826     //
 827     VMReg r_1 = regs[i].first();
 828     VMReg r_2 = regs[i].second();
 829     if (!r_1->is_valid()) {
 830       assert(!r_2->is_valid(), "");
 831       continue;
 832     }
 833     if (r_1->is_stack()) {
 834       // Convert stack slot to an SP offset (+ wordSize to account for return address )
 835       int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
 836 
 837       // We can use rsi as a temp here because compiled code doesn't need rsi as an input
 838       // and if we end up going thru a c2i because of a miss a reasonable value of rsi
 839       // we be generated.
 840       if (!r_2->is_valid()) {
 841         // __ fld_s(Address(saved_sp, ld_off));
 842         // __ fstp_s(Address(rsp, st_off));
 843         __ movl(rsi, Address(saved_sp, ld_off));
 844         __ movptr(Address(rsp, st_off), rsi);
 845       } else {
 846         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 847         // are accessed as negative so LSW is at LOW address
 848 
 849         // ld_off is MSW so get LSW
 850         // st_off is LSW (i.e. reg.first())
 851         // __ fld_d(Address(saved_sp, next_off));
 852         // __ fstp_d(Address(rsp, st_off));
 853         //
 854         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 855         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 856         // So we must adjust where to pick up the data to match the interpreter.
 857         //
 858         // Interpreter local[n] == MSW, local[n+1] == LSW however locals
 859         // are accessed as negative so LSW is at LOW address
 860 
 861         // ld_off is MSW so get LSW
 862         const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 863                            next_off : ld_off;
 864         __ movptr(rsi, Address(saved_sp, offset));
 865         __ movptr(Address(rsp, st_off), rsi);
 866 #ifndef _LP64
 867         __ movptr(rsi, Address(saved_sp, ld_off));
 868         __ movptr(Address(rsp, st_off + wordSize), rsi);
 869 #endif // _LP64
 870       }
 871     } else if (r_1->is_Register()) {  // Register argument
 872       Register r = r_1->as_Register();
 873       assert(r != rax, "must be different");
 874       if (r_2->is_valid()) {
 875         //
 876         // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
 877         // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
 878         // So we must adjust where to pick up the data to match the interpreter.
 879 
 880         const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
 881                            next_off : ld_off;
 882 
 883         // this can be a misaligned move
 884         __ movptr(r, Address(saved_sp, offset));
 885 #ifndef _LP64
 886         assert(r_2->as_Register() != rax, "need another temporary register");
 887         // Remember r_1 is low address (and LSB on x86)
 888         // So r_2 gets loaded from high address regardless of the platform
 889         __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
 890 #endif // _LP64
 891       } else {
 892         __ movl(r, Address(saved_sp, ld_off));
 893       }
 894     } else {
 895       assert(r_1->is_XMMRegister(), "");
 896       if (!r_2->is_valid()) {
 897         __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
 898       } else {
 899         move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
 900       }
 901     }
 902   }
 903 
 904   // 6243940 We might end up in handle_wrong_method if
 905   // the callee is deoptimized as we race thru here. If that
 906   // happens we don't want to take a safepoint because the
 907   // caller frame will look interpreted and arguments are now
 908   // "compiled" so it is much better to make this transition
 909   // invisible to the stack walking code. Unfortunately if
 910   // we try and find the callee by normal means a safepoint
 911   // is possible. So we stash the desired callee in the thread
 912   // and the vm will find there should this case occur.
 913 
 914   __ get_thread(rax);
 915   __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
 916 
 917   // move Method* to rax, in case we end up in an c2i adapter.
 918   // the c2i adapters expect Method* in rax, (c2) because c2's
 919   // resolve stubs return the result (the method) in rax,.
 920   // I'd love to fix this.
 921   __ mov(rax, rbx);
 922 
 923   __ jmp(rdi);
 924 }
 925 
 926 // ---------------------------------------------------------------
 927 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
 928                                                             int total_args_passed,
 929                                                             int comp_args_on_stack,
 930                                                             const BasicType *sig_bt,
 931                                                             const VMRegPair *regs,
 932                                                             AdapterFingerPrint* fingerprint) {
 933   address i2c_entry = __ pc();
 934 
 935   gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
 936 
 937   // -------------------------------------------------------------------------
 938   // Generate a C2I adapter.  On entry we know rbx, holds the Method* during calls
 939   // to the interpreter.  The args start out packed in the compiled layout.  They
 940   // need to be unpacked into the interpreter layout.  This will almost always
 941   // require some stack space.  We grow the current (compiled) stack, then repack
 942   // the args.  We  finally end in a jump to the generic interpreter entry point.
 943   // On exit from the interpreter, the interpreter will restore our SP (lest the
 944   // compiled code, which relys solely on SP and not EBP, get sick).
 945 
 946   address c2i_unverified_entry = __ pc();
 947   Label skip_fixup;
 948 
 949   Register holder = rax;
 950   Register receiver = rcx;
 951   Register temp = rbx;
 952 
 953   {
 954 
 955     Label missed;
 956     __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
 957     __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
 958     __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
 959     __ jcc(Assembler::notEqual, missed);
 960     // Method might have been compiled since the call site was patched to
 961     // interpreted if that is the case treat it as a miss so we can get
 962     // the call site corrected.
 963     __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
 964     __ jcc(Assembler::equal, skip_fixup);
 965 
 966     __ bind(missed);
 967     __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
 968   }
 969 
 970   address c2i_entry = __ pc();
 971 
 972   gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
 973 
 974   __ flush();
 975   return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
 976 }
 977 
 978 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
 979                                          VMRegPair *regs,
 980                                          VMRegPair *regs2,
 981                                          int total_args_passed) {
 982   assert(regs2 == NULL, "not needed on x86");
 983 // We return the amount of VMRegImpl stack slots we need to reserve for all
 984 // the arguments NOT counting out_preserve_stack_slots.
 985 
 986   uint    stack = 0;        // All arguments on stack
 987 
 988   for( int i = 0; i < total_args_passed; i++) {
 989     // From the type and the argument number (count) compute the location
 990     switch( sig_bt[i] ) {
 991     case T_BOOLEAN:
 992     case T_CHAR:
 993     case T_FLOAT:
 994     case T_BYTE:
 995     case T_SHORT:
 996     case T_INT:
 997     case T_OBJECT:
 998     case T_ARRAY:
 999     case T_ADDRESS:
1000     case T_METADATA:
1001       regs[i].set1(VMRegImpl::stack2reg(stack++));
1002       break;
1003     case T_LONG:
1004     case T_DOUBLE: // The stack numbering is reversed from Java
1005       // Since C arguments do not get reversed, the ordering for
1006       // doubles on the stack must be opposite the Java convention
1007       assert(sig_bt[i+1] == T_VOID, "missing Half" );
1008       regs[i].set2(VMRegImpl::stack2reg(stack));
1009       stack += 2;
1010       break;
1011     case T_VOID: regs[i].set_bad(); break;
1012     default:
1013       ShouldNotReachHere();
1014       break;
1015     }
1016   }
1017   return stack;
1018 }
1019 
1020 // A simple move of integer like type
1021 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1022   if (src.first()->is_stack()) {
1023     if (dst.first()->is_stack()) {
1024       // stack to stack
1025       // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1026       // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1027       __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1028       __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1029     } else {
1030       // stack to reg
1031       __ movl2ptr(dst.first()->as_Register(),  Address(rbp, reg2offset_in(src.first())));
1032     }
1033   } else if (dst.first()->is_stack()) {
1034     // reg to stack
1035     // no need to sign extend on 64bit
1036     __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1037   } else {
1038     if (dst.first() != src.first()) {
1039       __ mov(dst.first()->as_Register(), src.first()->as_Register());
1040     }
1041   }
1042 }
1043 
1044 // An oop arg. Must pass a handle not the oop itself
1045 static void object_move(MacroAssembler* masm,
1046                         OopMap* map,
1047                         int oop_handle_offset,
1048                         int framesize_in_slots,
1049                         VMRegPair src,
1050                         VMRegPair dst,
1051                         bool is_receiver,
1052                         int* receiver_offset) {
1053 
1054   // Because of the calling conventions we know that src can be a
1055   // register or a stack location. dst can only be a stack location.
1056 
1057   assert(dst.first()->is_stack(), "must be stack");
1058   // must pass a handle. First figure out the location we use as a handle
1059 
1060   if (src.first()->is_stack()) {
1061     // Oop is already on the stack as an argument
1062     Register rHandle = rax;
1063     Label nil;
1064     __ xorptr(rHandle, rHandle);
1065     __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1066     __ jcc(Assembler::equal, nil);
1067     __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1068     __ bind(nil);
1069     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1070 
1071     int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1072     map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1073     if (is_receiver) {
1074       *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1075     }
1076   } else {
1077     // Oop is in an a register we must store it to the space we reserve
1078     // on the stack for oop_handles
1079     const Register rOop = src.first()->as_Register();
1080     const Register rHandle = rax;
1081     int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1082     int offset = oop_slot*VMRegImpl::stack_slot_size;
1083     Label skip;
1084     __ movptr(Address(rsp, offset), rOop);
1085     map->set_oop(VMRegImpl::stack2reg(oop_slot));
1086     __ xorptr(rHandle, rHandle);
1087     __ cmpptr(rOop, (int32_t)NULL_WORD);
1088     __ jcc(Assembler::equal, skip);
1089     __ lea(rHandle, Address(rsp, offset));
1090     __ bind(skip);
1091     // Store the handle parameter
1092     __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1093     if (is_receiver) {
1094       *receiver_offset = offset;
1095     }
1096   }
1097 }
1098 
1099 // A float arg may have to do float reg int reg conversion
1100 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1101   assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1102 
1103   // Because of the calling convention we know that src is either a stack location
1104   // or an xmm register. dst can only be a stack location.
1105 
1106   assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1107 
1108   if (src.first()->is_stack()) {
1109     __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1110     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1111   } else {
1112     // reg to stack
1113     __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1114   }
1115 }
1116 
1117 // A long move
1118 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1119 
1120   // The only legal possibility for a long_move VMRegPair is:
1121   // 1: two stack slots (possibly unaligned)
1122   // as neither the java  or C calling convention will use registers
1123   // for longs.
1124 
1125   if (src.first()->is_stack() && dst.first()->is_stack()) {
1126     assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1127     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1128     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1129     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1130     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1131   } else {
1132     ShouldNotReachHere();
1133   }
1134 }
1135 
1136 // A double move
1137 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1138 
1139   // The only legal possibilities for a double_move VMRegPair are:
1140   // The painful thing here is that like long_move a VMRegPair might be
1141 
1142   // Because of the calling convention we know that src is either
1143   //   1: a single physical register (xmm registers only)
1144   //   2: two stack slots (possibly unaligned)
1145   // dst can only be a pair of stack slots.
1146 
1147   assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1148 
1149   if (src.first()->is_stack()) {
1150     // source is all stack
1151     __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1152     NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1153     __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1154     NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1155   } else {
1156     // reg to stack
1157     // No worries about stack alignment
1158     __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1159   }
1160 }
1161 
1162 
1163 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1164   // We always ignore the frame_slots arg and just use the space just below frame pointer
1165   // which by this time is free to use
1166   switch (ret_type) {
1167   case T_FLOAT:
1168     __ fstp_s(Address(rbp, -wordSize));
1169     break;
1170   case T_DOUBLE:
1171     __ fstp_d(Address(rbp, -2*wordSize));
1172     break;
1173   case T_VOID:  break;
1174   case T_LONG:
1175     __ movptr(Address(rbp, -wordSize), rax);
1176     NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1177     break;
1178   default: {
1179     __ movptr(Address(rbp, -wordSize), rax);
1180     }
1181   }
1182 }
1183 
1184 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1185   // We always ignore the frame_slots arg and just use the space just below frame pointer
1186   // which by this time is free to use
1187   switch (ret_type) {
1188   case T_FLOAT:
1189     __ fld_s(Address(rbp, -wordSize));
1190     break;
1191   case T_DOUBLE:
1192     __ fld_d(Address(rbp, -2*wordSize));
1193     break;
1194   case T_LONG:
1195     __ movptr(rax, Address(rbp, -wordSize));
1196     NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1197     break;
1198   case T_VOID:  break;
1199   default: {
1200     __ movptr(rax, Address(rbp, -wordSize));
1201     }
1202   }
1203 }
1204 
1205 
1206 static void save_or_restore_arguments(MacroAssembler* masm,
1207                                       const int stack_slots,
1208                                       const int total_in_args,
1209                                       const int arg_save_area,
1210                                       OopMap* map,
1211                                       VMRegPair* in_regs,
1212                                       BasicType* in_sig_bt) {
1213   // if map is non-NULL then the code should store the values,
1214   // otherwise it should load them.
1215   int handle_index = 0;
1216   // Save down double word first
1217   for ( int i = 0; i < total_in_args; i++) {
1218     if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1219       int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1220       int offset = slot * VMRegImpl::stack_slot_size;
1221       handle_index += 2;
1222       assert(handle_index <= stack_slots, "overflow");
1223       if (map != NULL) {
1224         __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1225       } else {
1226         __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1227       }
1228     }
1229     if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1230       int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1231       int offset = slot * VMRegImpl::stack_slot_size;
1232       handle_index += 2;
1233       assert(handle_index <= stack_slots, "overflow");
1234       if (map != NULL) {
1235         __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1236         if (in_regs[i].second()->is_Register()) {
1237           __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1238         }
1239       } else {
1240         __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1241         if (in_regs[i].second()->is_Register()) {
1242           __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1243         }
1244       }
1245     }
1246   }
1247   // Save or restore single word registers
1248   for ( int i = 0; i < total_in_args; i++) {
1249     if (in_regs[i].first()->is_Register()) {
1250       int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1251       int offset = slot * VMRegImpl::stack_slot_size;
1252       assert(handle_index <= stack_slots, "overflow");
1253       if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1254         map->set_oop(VMRegImpl::stack2reg(slot));;
1255       }
1256 
1257       // Value is in an input register pass we must flush it to the stack
1258       const Register reg = in_regs[i].first()->as_Register();
1259       switch (in_sig_bt[i]) {
1260         case T_ARRAY:
1261           if (map != NULL) {
1262             __ movptr(Address(rsp, offset), reg);
1263           } else {
1264             __ movptr(reg, Address(rsp, offset));
1265           }
1266           break;
1267         case T_BOOLEAN:
1268         case T_CHAR:
1269         case T_BYTE:
1270         case T_SHORT:
1271         case T_INT:
1272           if (map != NULL) {
1273             __ movl(Address(rsp, offset), reg);
1274           } else {
1275             __ movl(reg, Address(rsp, offset));
1276           }
1277           break;
1278         case T_OBJECT:
1279         default: ShouldNotReachHere();
1280       }
1281     } else if (in_regs[i].first()->is_XMMRegister()) {
1282       if (in_sig_bt[i] == T_FLOAT) {
1283         int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1284         int offset = slot * VMRegImpl::stack_slot_size;
1285         assert(handle_index <= stack_slots, "overflow");
1286         if (map != NULL) {
1287           __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1288         } else {
1289           __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1290         }
1291       }
1292     } else if (in_regs[i].first()->is_stack()) {
1293       if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1294         int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1295         map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1296       }
1297     }
1298   }
1299 }
1300 
1301 // Check GC_locker::needs_gc and enter the runtime if it's true.  This
1302 // keeps a new JNI critical region from starting until a GC has been
1303 // forced.  Save down any oops in registers and describe them in an
1304 // OopMap.
1305 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1306                                                Register thread,
1307                                                int stack_slots,
1308                                                int total_c_args,
1309                                                int total_in_args,
1310                                                int arg_save_area,
1311                                                OopMapSet* oop_maps,
1312                                                VMRegPair* in_regs,
1313                                                BasicType* in_sig_bt) {
1314   __ block_comment("check GC_locker::needs_gc");
1315   Label cont;
1316   __ cmp8(ExternalAddress((address)GC_locker::needs_gc_address()), false);
1317   __ jcc(Assembler::equal, cont);
1318 
1319   // Save down any incoming oops and call into the runtime to halt for a GC
1320 
1321   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1322 
1323   save_or_restore_arguments(masm, stack_slots, total_in_args,
1324                             arg_save_area, map, in_regs, in_sig_bt);
1325 
1326   address the_pc = __ pc();
1327   oop_maps->add_gc_map( __ offset(), map);
1328   __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1329 
1330   __ block_comment("block_for_jni_critical");
1331   __ push(thread);
1332   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1333   __ increment(rsp, wordSize);
1334 
1335   __ get_thread(thread);
1336   __ reset_last_Java_frame(thread, false, true);
1337 
1338   save_or_restore_arguments(masm, stack_slots, total_in_args,
1339                             arg_save_area, NULL, in_regs, in_sig_bt);
1340 
1341   __ bind(cont);
1342 #ifdef ASSERT
1343   if (StressCriticalJNINatives) {
1344     // Stress register saving
1345     OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1346     save_or_restore_arguments(masm, stack_slots, total_in_args,
1347                               arg_save_area, map, in_regs, in_sig_bt);
1348     // Destroy argument registers
1349     for (int i = 0; i < total_in_args - 1; i++) {
1350       if (in_regs[i].first()->is_Register()) {
1351         const Register reg = in_regs[i].first()->as_Register();
1352         __ xorptr(reg, reg);
1353       } else if (in_regs[i].first()->is_XMMRegister()) {
1354         __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1355       } else if (in_regs[i].first()->is_FloatRegister()) {
1356         ShouldNotReachHere();
1357       } else if (in_regs[i].first()->is_stack()) {
1358         // Nothing to do
1359       } else {
1360         ShouldNotReachHere();
1361       }
1362       if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1363         i++;
1364       }
1365     }
1366 
1367     save_or_restore_arguments(masm, stack_slots, total_in_args,
1368                               arg_save_area, NULL, in_regs, in_sig_bt);
1369   }
1370 #endif
1371 }
1372 
1373 // Unpack an array argument into a pointer to the body and the length
1374 // if the array is non-null, otherwise pass 0 for both.
1375 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1376   Register tmp_reg = rax;
1377   assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1378          "possible collision");
1379   assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1380          "possible collision");
1381 
1382   // Pass the length, ptr pair
1383   Label is_null, done;
1384   VMRegPair tmp(tmp_reg->as_VMReg());
1385   if (reg.first()->is_stack()) {
1386     // Load the arg up from the stack
1387     simple_move32(masm, reg, tmp);
1388     reg = tmp;
1389   }
1390   __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1391   __ jccb(Assembler::equal, is_null);
1392   __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1393   simple_move32(masm, tmp, body_arg);
1394   // load the length relative to the body.
1395   __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1396                            arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1397   simple_move32(masm, tmp, length_arg);
1398   __ jmpb(done);
1399   __ bind(is_null);
1400   // Pass zeros
1401   __ xorptr(tmp_reg, tmp_reg);
1402   simple_move32(masm, tmp, body_arg);
1403   simple_move32(masm, tmp, length_arg);
1404   __ bind(done);
1405 }
1406 
1407 static void verify_oop_args(MacroAssembler* masm,
1408                             methodHandle method,
1409                             const BasicType* sig_bt,
1410                             const VMRegPair* regs) {
1411   Register temp_reg = rbx;  // not part of any compiled calling seq
1412   if (VerifyOops) {
1413     for (int i = 0; i < method->size_of_parameters(); i++) {
1414       if (sig_bt[i] == T_OBJECT ||
1415           sig_bt[i] == T_ARRAY) {
1416         VMReg r = regs[i].first();
1417         assert(r->is_valid(), "bad oop arg");
1418         if (r->is_stack()) {
1419           __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1420           __ verify_oop(temp_reg);
1421         } else {
1422           __ verify_oop(r->as_Register());
1423         }
1424       }
1425     }
1426   }
1427 }
1428 
1429 static void gen_special_dispatch(MacroAssembler* masm,
1430                                  methodHandle method,
1431                                  const BasicType* sig_bt,
1432                                  const VMRegPair* regs) {
1433   verify_oop_args(masm, method, sig_bt, regs);
1434   vmIntrinsics::ID iid = method->intrinsic_id();
1435 
1436   // Now write the args into the outgoing interpreter space
1437   bool     has_receiver   = false;
1438   Register receiver_reg   = noreg;
1439   int      member_arg_pos = -1;
1440   Register member_reg     = noreg;
1441   int      ref_kind       = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1442   if (ref_kind != 0) {
1443     member_arg_pos = method->size_of_parameters() - 1;  // trailing MemberName argument
1444     member_reg = rbx;  // known to be free at this point
1445     has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1446   } else if (iid == vmIntrinsics::_invokeBasic) {
1447     has_receiver = true;
1448   } else {
1449     fatal(err_msg_res("unexpected intrinsic id %d", iid));
1450   }
1451 
1452   if (member_reg != noreg) {
1453     // Load the member_arg into register, if necessary.
1454     SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1455     VMReg r = regs[member_arg_pos].first();
1456     if (r->is_stack()) {
1457       __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1458     } else {
1459       // no data motion is needed
1460       member_reg = r->as_Register();
1461     }
1462   }
1463 
1464   if (has_receiver) {
1465     // Make sure the receiver is loaded into a register.
1466     assert(method->size_of_parameters() > 0, "oob");
1467     assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1468     VMReg r = regs[0].first();
1469     assert(r->is_valid(), "bad receiver arg");
1470     if (r->is_stack()) {
1471       // Porting note:  This assumes that compiled calling conventions always
1472       // pass the receiver oop in a register.  If this is not true on some
1473       // platform, pick a temp and load the receiver from stack.
1474       fatal("receiver always in a register");
1475       receiver_reg = rcx;  // known to be free at this point
1476       __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1477     } else {
1478       // no data motion is needed
1479       receiver_reg = r->as_Register();
1480     }
1481   }
1482 
1483   // Figure out which address we are really jumping to:
1484   MethodHandles::generate_method_handle_dispatch(masm, iid,
1485                                                  receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1486 }
1487 
1488 // ---------------------------------------------------------------------------
1489 // Generate a native wrapper for a given method.  The method takes arguments
1490 // in the Java compiled code convention, marshals them to the native
1491 // convention (handlizes oops, etc), transitions to native, makes the call,
1492 // returns to java state (possibly blocking), unhandlizes any result and
1493 // returns.
1494 //
1495 // Critical native functions are a shorthand for the use of
1496 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1497 // functions.  The wrapper is expected to unpack the arguments before
1498 // passing them to the callee and perform checks before and after the
1499 // native call to ensure that they GC_locker
1500 // lock_critical/unlock_critical semantics are followed.  Some other
1501 // parts of JNI setup are skipped like the tear down of the JNI handle
1502 // block and the check for pending exceptions it's impossible for them
1503 // to be thrown.
1504 //
1505 // They are roughly structured like this:
1506 //    if (GC_locker::needs_gc())
1507 //      SharedRuntime::block_for_jni_critical();
1508 //    tranistion to thread_in_native
1509 //    unpack arrray arguments and call native entry point
1510 //    check for safepoint in progress
1511 //    check if any thread suspend flags are set
1512 //      call into JVM and possible unlock the JNI critical
1513 //      if a GC was suppressed while in the critical native.
1514 //    transition back to thread_in_Java
1515 //    return to caller
1516 //
1517 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1518                                                 methodHandle method,
1519                                                 int compile_id,
1520                                                 BasicType* in_sig_bt,
1521                                                 VMRegPair* in_regs,
1522                                                 BasicType ret_type) {
1523   if (method->is_method_handle_intrinsic()) {
1524     vmIntrinsics::ID iid = method->intrinsic_id();
1525     intptr_t start = (intptr_t)__ pc();
1526     int vep_offset = ((intptr_t)__ pc()) - start;
1527     gen_special_dispatch(masm,
1528                          method,
1529                          in_sig_bt,
1530                          in_regs);
1531     int frame_complete = ((intptr_t)__ pc()) - start;  // not complete, period
1532     __ flush();
1533     int stack_slots = SharedRuntime::out_preserve_stack_slots();  // no out slots at all, actually
1534     return nmethod::new_native_nmethod(method,
1535                                        compile_id,
1536                                        masm->code(),
1537                                        vep_offset,
1538                                        frame_complete,
1539                                        stack_slots / VMRegImpl::slots_per_word,
1540                                        in_ByteSize(-1),
1541                                        in_ByteSize(-1),
1542                                        (OopMapSet*)NULL);
1543   }
1544   bool is_critical_native = true;
1545   address native_func = method->critical_native_function();
1546   if (native_func == NULL) {
1547     native_func = method->native_function();
1548     is_critical_native = false;
1549   }
1550   assert(native_func != NULL, "must have function");
1551 
1552   // An OopMap for lock (and class if static)
1553   OopMapSet *oop_maps = new OopMapSet();
1554 
1555   // We have received a description of where all the java arg are located
1556   // on entry to the wrapper. We need to convert these args to where
1557   // the jni function will expect them. To figure out where they go
1558   // we convert the java signature to a C signature by inserting
1559   // the hidden arguments as arg[0] and possibly arg[1] (static method)
1560 
1561   const int total_in_args = method->size_of_parameters();
1562   int total_c_args = total_in_args;
1563   if (!is_critical_native) {
1564     total_c_args += 1;
1565     if (method->is_static()) {
1566       total_c_args++;
1567     }
1568   } else {
1569     for (int i = 0; i < total_in_args; i++) {
1570       if (in_sig_bt[i] == T_ARRAY) {
1571         total_c_args++;
1572       }
1573     }
1574   }
1575 
1576   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1577   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1578   BasicType* in_elem_bt = NULL;
1579 
1580   int argc = 0;
1581   if (!is_critical_native) {
1582     out_sig_bt[argc++] = T_ADDRESS;
1583     if (method->is_static()) {
1584       out_sig_bt[argc++] = T_OBJECT;
1585     }
1586 
1587     for (int i = 0; i < total_in_args ; i++ ) {
1588       out_sig_bt[argc++] = in_sig_bt[i];
1589     }
1590   } else {
1591     Thread* THREAD = Thread::current();
1592     in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1593     SignatureStream ss(method->signature());
1594     for (int i = 0; i < total_in_args ; i++ ) {
1595       if (in_sig_bt[i] == T_ARRAY) {
1596         // Arrays are passed as int, elem* pair
1597         out_sig_bt[argc++] = T_INT;
1598         out_sig_bt[argc++] = T_ADDRESS;
1599         Symbol* atype = ss.as_symbol(CHECK_NULL);
1600         const char* at = atype->as_C_string();
1601         if (strlen(at) == 2) {
1602           assert(at[0] == '[', "must be");
1603           switch (at[1]) {
1604             case 'B': in_elem_bt[i]  = T_BYTE; break;
1605             case 'C': in_elem_bt[i]  = T_CHAR; break;
1606             case 'D': in_elem_bt[i]  = T_DOUBLE; break;
1607             case 'F': in_elem_bt[i]  = T_FLOAT; break;
1608             case 'I': in_elem_bt[i]  = T_INT; break;
1609             case 'J': in_elem_bt[i]  = T_LONG; break;
1610             case 'S': in_elem_bt[i]  = T_SHORT; break;
1611             case 'Z': in_elem_bt[i]  = T_BOOLEAN; break;
1612             default: ShouldNotReachHere();
1613           }
1614         }
1615       } else {
1616         out_sig_bt[argc++] = in_sig_bt[i];
1617         in_elem_bt[i] = T_VOID;
1618       }
1619       if (in_sig_bt[i] != T_VOID) {
1620         assert(in_sig_bt[i] == ss.type(), "must match");
1621         ss.next();
1622       }
1623     }
1624   }
1625 
1626   // Now figure out where the args must be stored and how much stack space
1627   // they require.
1628   int out_arg_slots;
1629   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1630 
1631   // Compute framesize for the wrapper.  We need to handlize all oops in
1632   // registers a max of 2 on x86.
1633 
1634   // Calculate the total number of stack slots we will need.
1635 
1636   // First count the abi requirement plus all of the outgoing args
1637   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1638 
1639   // Now the space for the inbound oop handle area
1640   int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1641   if (is_critical_native) {
1642     // Critical natives may have to call out so they need a save area
1643     // for register arguments.
1644     int double_slots = 0;
1645     int single_slots = 0;
1646     for ( int i = 0; i < total_in_args; i++) {
1647       if (in_regs[i].first()->is_Register()) {
1648         const Register reg = in_regs[i].first()->as_Register();
1649         switch (in_sig_bt[i]) {
1650           case T_ARRAY:  // critical array (uses 2 slots on LP64)
1651           case T_BOOLEAN:
1652           case T_BYTE:
1653           case T_SHORT:
1654           case T_CHAR:
1655           case T_INT:  single_slots++; break;
1656           case T_LONG: double_slots++; break;
1657           default:  ShouldNotReachHere();
1658         }
1659       } else if (in_regs[i].first()->is_XMMRegister()) {
1660         switch (in_sig_bt[i]) {
1661           case T_FLOAT:  single_slots++; break;
1662           case T_DOUBLE: double_slots++; break;
1663           default:  ShouldNotReachHere();
1664         }
1665       } else if (in_regs[i].first()->is_FloatRegister()) {
1666         ShouldNotReachHere();
1667       }
1668     }
1669     total_save_slots = double_slots * 2 + single_slots;
1670     // align the save area
1671     if (double_slots != 0) {
1672       stack_slots = round_to(stack_slots, 2);
1673     }
1674   }
1675 
1676   int oop_handle_offset = stack_slots;
1677   stack_slots += total_save_slots;
1678 
1679   // Now any space we need for handlizing a klass if static method
1680 
1681   int klass_slot_offset = 0;
1682   int klass_offset = -1;
1683   int lock_slot_offset = 0;
1684   bool is_static = false;
1685 
1686   if (method->is_static()) {
1687     klass_slot_offset = stack_slots;
1688     stack_slots += VMRegImpl::slots_per_word;
1689     klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1690     is_static = true;
1691   }
1692 
1693   // Plus a lock if needed
1694 
1695   if (method->is_synchronized()) {
1696     lock_slot_offset = stack_slots;
1697     stack_slots += VMRegImpl::slots_per_word;
1698   }
1699 
1700   // Now a place (+2) to save return values or temp during shuffling
1701   // + 2 for return address (which we own) and saved rbp,
1702   stack_slots += 4;
1703 
1704   // Ok The space we have allocated will look like:
1705   //
1706   //
1707   // FP-> |                     |
1708   //      |---------------------|
1709   //      | 2 slots for moves   |
1710   //      |---------------------|
1711   //      | lock box (if sync)  |
1712   //      |---------------------| <- lock_slot_offset  (-lock_slot_rbp_offset)
1713   //      | klass (if static)   |
1714   //      |---------------------| <- klass_slot_offset
1715   //      | oopHandle area      |
1716   //      |---------------------| <- oop_handle_offset (a max of 2 registers)
1717   //      | outbound memory     |
1718   //      | based arguments     |
1719   //      |                     |
1720   //      |---------------------|
1721   //      |                     |
1722   // SP-> | out_preserved_slots |
1723   //
1724   //
1725   // ****************************************************************************
1726   // WARNING - on Windows Java Natives use pascal calling convention and pop the
1727   // arguments off of the stack after the jni call. Before the call we can use
1728   // instructions that are SP relative. After the jni call we switch to FP
1729   // relative instructions instead of re-adjusting the stack on windows.
1730   // ****************************************************************************
1731 
1732 
1733   // Now compute actual number of stack words we need rounding to make
1734   // stack properly aligned.
1735   stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1736 
1737   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1738 
1739   intptr_t start = (intptr_t)__ pc();
1740 
1741   // First thing make an ic check to see if we should even be here
1742 
1743   // We are free to use all registers as temps without saving them and
1744   // restoring them except rbp. rbp is the only callee save register
1745   // as far as the interpreter and the compiler(s) are concerned.
1746 
1747 
1748   const Register ic_reg = rax;
1749   const Register receiver = rcx;
1750   Label hit;
1751   Label exception_pending;
1752 
1753   __ verify_oop(receiver);
1754   __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1755   __ jcc(Assembler::equal, hit);
1756 
1757   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1758 
1759   // verified entry must be aligned for code patching.
1760   // and the first 5 bytes must be in the same cache line
1761   // if we align at 8 then we will be sure 5 bytes are in the same line
1762   __ align(8);
1763 
1764   __ bind(hit);
1765 
1766   int vep_offset = ((intptr_t)__ pc()) - start;
1767 
1768 #ifdef COMPILER1
1769   if (InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) {
1770     // Object.hashCode can pull the hashCode from the header word
1771     // instead of doing a full VM transition once it's been computed.
1772     // Since hashCode is usually polymorphic at call sites we can't do
1773     // this optimization at the call site without a lot of work.
1774     Label slowCase;
1775     Register receiver = rcx;
1776     Register result = rax;
1777     __ movptr(result, Address(receiver, oopDesc::mark_offset_in_bytes()));
1778 
1779     // check if locked
1780     __ testptr(result, markOopDesc::unlocked_value);
1781     __ jcc (Assembler::zero, slowCase);
1782 
1783     if (UseBiasedLocking) {
1784       // Check if biased and fall through to runtime if so
1785       __ testptr(result, markOopDesc::biased_lock_bit_in_place);
1786       __ jcc (Assembler::notZero, slowCase);
1787     }
1788 
1789     // get hash
1790     __ andptr(result, markOopDesc::hash_mask_in_place);
1791     // test if hashCode exists
1792     __ jcc  (Assembler::zero, slowCase);
1793     __ shrptr(result, markOopDesc::hash_shift);
1794     __ ret(0);
1795     __ bind (slowCase);
1796   }
1797 #endif // COMPILER1
1798 
1799   // The instruction at the verified entry point must be 5 bytes or longer
1800   // because it can be patched on the fly by make_non_entrant. The stack bang
1801   // instruction fits that requirement.
1802 
1803   // Generate stack overflow check
1804 
1805   if (UseStackBanging) {
1806     __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
1807   } else {
1808     // need a 5 byte instruction to allow MT safe patching to non-entrant
1809     __ fat_nop();
1810   }
1811 
1812   // Generate a new frame for the wrapper.
1813   __ enter();
1814   // -2 because return address is already present and so is saved rbp
1815   __ subptr(rsp, stack_size - 2*wordSize);
1816 
1817   // Frame is now completed as far as size and linkage.
1818   int frame_complete = ((intptr_t)__ pc()) - start;
1819 
1820   // Calculate the difference between rsp and rbp,. We need to know it
1821   // after the native call because on windows Java Natives will pop
1822   // the arguments and it is painful to do rsp relative addressing
1823   // in a platform independent way. So after the call we switch to
1824   // rbp, relative addressing.
1825 
1826   int fp_adjustment = stack_size - 2*wordSize;
1827 
1828 #ifdef COMPILER2
1829   // C2 may leave the stack dirty if not in SSE2+ mode
1830   if (UseSSE >= 2) {
1831     __ verify_FPU(0, "c2i transition should have clean FPU stack");
1832   } else {
1833     __ empty_FPU_stack();
1834   }
1835 #endif /* COMPILER2 */
1836 
1837   // Compute the rbp, offset for any slots used after the jni call
1838 
1839   int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1840 
1841   // We use rdi as a thread pointer because it is callee save and
1842   // if we load it once it is usable thru the entire wrapper
1843   const Register thread = rdi;
1844 
1845   // We use rsi as the oop handle for the receiver/klass
1846   // It is callee save so it survives the call to native
1847 
1848   const Register oop_handle_reg = rsi;
1849 
1850   __ get_thread(thread);
1851 
1852   if (is_critical_native) {
1853     check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1854                                        oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1855   }
1856 
1857   //
1858   // We immediately shuffle the arguments so that any vm call we have to
1859   // make from here on out (sync slow path, jvmti, etc.) we will have
1860   // captured the oops from our caller and have a valid oopMap for
1861   // them.
1862 
1863   // -----------------
1864   // The Grand Shuffle
1865   //
1866   // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1867   // and, if static, the class mirror instead of a receiver.  This pretty much
1868   // guarantees that register layout will not match (and x86 doesn't use reg
1869   // parms though amd does).  Since the native abi doesn't use register args
1870   // and the java conventions does we don't have to worry about collisions.
1871   // All of our moved are reg->stack or stack->stack.
1872   // We ignore the extra arguments during the shuffle and handle them at the
1873   // last moment. The shuffle is described by the two calling convention
1874   // vectors we have in our possession. We simply walk the java vector to
1875   // get the source locations and the c vector to get the destinations.
1876 
1877   int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1878 
1879   // Record rsp-based slot for receiver on stack for non-static methods
1880   int receiver_offset = -1;
1881 
1882   // This is a trick. We double the stack slots so we can claim
1883   // the oops in the caller's frame. Since we are sure to have
1884   // more args than the caller doubling is enough to make
1885   // sure we can capture all the incoming oop args from the
1886   // caller.
1887   //
1888   OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1889 
1890   // Mark location of rbp,
1891   // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1892 
1893   // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1894   // Are free to temporaries if we have to do  stack to steck moves.
1895   // All inbound args are referenced based on rbp, and all outbound args via rsp.
1896 
1897   for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1898     switch (in_sig_bt[i]) {
1899       case T_ARRAY:
1900         if (is_critical_native) {
1901           unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1902           c_arg++;
1903           break;
1904         }
1905       case T_OBJECT:
1906         assert(!is_critical_native, "no oop arguments");
1907         object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1908                     ((i == 0) && (!is_static)),
1909                     &receiver_offset);
1910         break;
1911       case T_VOID:
1912         break;
1913 
1914       case T_FLOAT:
1915         float_move(masm, in_regs[i], out_regs[c_arg]);
1916           break;
1917 
1918       case T_DOUBLE:
1919         assert( i + 1 < total_in_args &&
1920                 in_sig_bt[i + 1] == T_VOID &&
1921                 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1922         double_move(masm, in_regs[i], out_regs[c_arg]);
1923         break;
1924 
1925       case T_LONG :
1926         long_move(masm, in_regs[i], out_regs[c_arg]);
1927         break;
1928 
1929       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1930 
1931       default:
1932         simple_move32(masm, in_regs[i], out_regs[c_arg]);
1933     }
1934   }
1935 
1936   // Pre-load a static method's oop into rsi.  Used both by locking code and
1937   // the normal JNI call code.
1938   if (method->is_static() && !is_critical_native) {
1939 
1940     //  load opp into a register
1941     __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1942 
1943     // Now handlize the static class mirror it's known not-null.
1944     __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1945     map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1946 
1947     // Now get the handle
1948     __ lea(oop_handle_reg, Address(rsp, klass_offset));
1949     // store the klass handle as second argument
1950     __ movptr(Address(rsp, wordSize), oop_handle_reg);
1951   }
1952 
1953   // Change state to native (we save the return address in the thread, since it might not
1954   // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1955   // points into the right code segment. It does not have to be the correct return pc.
1956   // We use the same pc/oopMap repeatedly when we call out
1957 
1958   intptr_t the_pc = (intptr_t) __ pc();
1959   oop_maps->add_gc_map(the_pc - start, map);
1960 
1961   __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1962 
1963 
1964   // We have all of the arguments setup at this point. We must not touch any register
1965   // argument registers at this point (what if we save/restore them there are no oop?
1966 
1967   {
1968     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1969     __ mov_metadata(rax, method());
1970     __ call_VM_leaf(
1971          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1972          thread, rax);
1973   }
1974 
1975   // RedefineClasses() tracing support for obsolete method entry
1976   if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
1977     __ mov_metadata(rax, method());
1978     __ call_VM_leaf(
1979          CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1980          thread, rax);
1981   }
1982 
1983   // These are register definitions we need for locking/unlocking
1984   const Register swap_reg = rax;  // Must use rax, for cmpxchg instruction
1985   const Register obj_reg  = rcx;  // Will contain the oop
1986   const Register lock_reg = rdx;  // Address of compiler lock object (BasicLock)
1987 
1988   Label slow_path_lock;
1989   Label lock_done;
1990 
1991   // Lock a synchronized method
1992   if (method->is_synchronized()) {
1993     assert(!is_critical_native, "unhandled");
1994 
1995 
1996     const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1997 
1998     // Get the handle (the 2nd argument)
1999     __ movptr(oop_handle_reg, Address(rsp, wordSize));
2000 
2001     // Get address of the box
2002 
2003     __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
2004 
2005     // Load the oop from the handle
2006     __ movptr(obj_reg, Address(oop_handle_reg, 0));
2007 
2008     if (UseBiasedLocking) {
2009       // Note that oop_handle_reg is trashed during this call
2010       __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
2011     }
2012 
2013     // Load immediate 1 into swap_reg %rax,
2014     __ movptr(swap_reg, 1);
2015 
2016     // Load (object->mark() | 1) into swap_reg %rax,
2017     __ orptr(swap_reg, Address(obj_reg, 0));
2018 
2019     // Save (object->mark() | 1) into BasicLock's displaced header
2020     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2021 
2022     if (os::is_MP()) {
2023       __ lock();
2024     }
2025 
2026     // src -> dest iff dest == rax, else rax, <- dest
2027     // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
2028     __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
2029     __ jcc(Assembler::equal, lock_done);
2030 
2031     // Test if the oopMark is an obvious stack pointer, i.e.,
2032     //  1) (mark & 3) == 0, and
2033     //  2) rsp <= mark < mark + os::pagesize()
2034     // These 3 tests can be done by evaluating the following
2035     // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2036     // assuming both stack pointer and pagesize have their
2037     // least significant 2 bits clear.
2038     // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
2039 
2040     __ subptr(swap_reg, rsp);
2041     __ andptr(swap_reg, 3 - os::vm_page_size());
2042 
2043     // Save the test result, for recursive case, the result is zero
2044     __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2045     __ jcc(Assembler::notEqual, slow_path_lock);
2046     // Slow path will re-enter here
2047     __ bind(lock_done);
2048 
2049     if (UseBiasedLocking) {
2050       // Re-fetch oop_handle_reg as we trashed it above
2051       __ movptr(oop_handle_reg, Address(rsp, wordSize));
2052     }
2053   }
2054 
2055 
2056   // Finally just about ready to make the JNI call
2057 
2058 
2059   // get JNIEnv* which is first argument to native
2060   if (!is_critical_native) {
2061     __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2062     __ movptr(Address(rsp, 0), rdx);
2063   }
2064 
2065   // Now set thread in native
2066   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2067 
2068   __ call(RuntimeAddress(native_func));
2069 
2070   // Verify or restore cpu control state after JNI call
2071   __ restore_cpu_control_state_after_jni();
2072 
2073   // WARNING - on Windows Java Natives use pascal calling convention and pop the
2074   // arguments off of the stack. We could just re-adjust the stack pointer here
2075   // and continue to do SP relative addressing but we instead switch to FP
2076   // relative addressing.
2077 
2078   // Unpack native results.
2079   switch (ret_type) {
2080   case T_BOOLEAN: __ c2bool(rax);            break;
2081   case T_CHAR   : __ andptr(rax, 0xFFFF);    break;
2082   case T_BYTE   : __ sign_extend_byte (rax); break;
2083   case T_SHORT  : __ sign_extend_short(rax); break;
2084   case T_INT    : /* nothing to do */        break;
2085   case T_DOUBLE :
2086   case T_FLOAT  :
2087     // Result is in st0 we'll save as needed
2088     break;
2089   case T_ARRAY:                 // Really a handle
2090   case T_OBJECT:                // Really a handle
2091       break; // can't de-handlize until after safepoint check
2092   case T_VOID: break;
2093   case T_LONG: break;
2094   default       : ShouldNotReachHere();
2095   }
2096 
2097   // Switch thread to "native transition" state before reading the synchronization state.
2098   // This additional state is necessary because reading and testing the synchronization
2099   // state is not atomic w.r.t. GC, as this scenario demonstrates:
2100   //     Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2101   //     VM thread changes sync state to synchronizing and suspends threads for GC.
2102   //     Thread A is resumed to finish this native method, but doesn't block here since it
2103   //     didn't see any synchronization is progress, and escapes.
2104   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2105 
2106   if(os::is_MP()) {
2107     if (UseMembar) {
2108       // Force this write out before the read below
2109       __ membar(Assembler::Membar_mask_bits(
2110            Assembler::LoadLoad | Assembler::LoadStore |
2111            Assembler::StoreLoad | Assembler::StoreStore));
2112     } else {
2113       // Write serialization page so VM thread can do a pseudo remote membar.
2114       // We use the current thread pointer to calculate a thread specific
2115       // offset to write to within the page. This minimizes bus traffic
2116       // due to cache line collision.
2117       __ serialize_memory(thread, rcx);
2118     }
2119   }
2120 
2121   if (AlwaysRestoreFPU) {
2122     // Make sure the control word is correct.
2123     __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2124   }
2125 
2126   Label after_transition;
2127 
2128   // check for safepoint operation in progress and/or pending suspend requests
2129   { Label Continue;
2130 
2131     __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2132              SafepointSynchronize::_not_synchronized);
2133 
2134     Label L;
2135     __ jcc(Assembler::notEqual, L);
2136     __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2137     __ jcc(Assembler::equal, Continue);
2138     __ bind(L);
2139 
2140     // Don't use call_VM as it will see a possible pending exception and forward it
2141     // and never return here preventing us from clearing _last_native_pc down below.
2142     // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2143     // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2144     // by hand.
2145     //
2146     save_native_result(masm, ret_type, stack_slots);
2147     __ push(thread);
2148     if (!is_critical_native) {
2149       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2150                                               JavaThread::check_special_condition_for_native_trans)));
2151     } else {
2152       __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2153                                               JavaThread::check_special_condition_for_native_trans_and_transition)));
2154     }
2155     __ increment(rsp, wordSize);
2156     // Restore any method result value
2157     restore_native_result(masm, ret_type, stack_slots);
2158 
2159     if (is_critical_native) {
2160       // The call above performed the transition to thread_in_Java so
2161       // skip the transition logic below.
2162       __ jmpb(after_transition);
2163     }
2164 
2165     __ bind(Continue);
2166   }
2167 
2168   // change thread state
2169   __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2170   __ bind(after_transition);
2171 
2172   Label reguard;
2173   Label reguard_done;
2174   __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_disabled);
2175   __ jcc(Assembler::equal, reguard);
2176 
2177   // slow path reguard  re-enters here
2178   __ bind(reguard_done);
2179 
2180   // Handle possible exception (will unlock if necessary)
2181 
2182   // native result if any is live
2183 
2184   // Unlock
2185   Label slow_path_unlock;
2186   Label unlock_done;
2187   if (method->is_synchronized()) {
2188 
2189     Label done;
2190 
2191     // Get locked oop from the handle we passed to jni
2192     __ movptr(obj_reg, Address(oop_handle_reg, 0));
2193 
2194     if (UseBiasedLocking) {
2195       __ biased_locking_exit(obj_reg, rbx, done);
2196     }
2197 
2198     // Simple recursive lock?
2199 
2200     __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2201     __ jcc(Assembler::equal, done);
2202 
2203     // Must save rax, if if it is live now because cmpxchg must use it
2204     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2205       save_native_result(masm, ret_type, stack_slots);
2206     }
2207 
2208     //  get old displaced header
2209     __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2210 
2211     // get address of the stack lock
2212     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2213 
2214     // Atomic swap old header if oop still contains the stack lock
2215     if (os::is_MP()) {
2216     __ lock();
2217     }
2218 
2219     // src -> dest iff dest == rax, else rax, <- dest
2220     // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2221     __ cmpxchgptr(rbx, Address(obj_reg, 0));
2222     __ jcc(Assembler::notEqual, slow_path_unlock);
2223 
2224     // slow path re-enters here
2225     __ bind(unlock_done);
2226     if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2227       restore_native_result(masm, ret_type, stack_slots);
2228     }
2229 
2230     __ bind(done);
2231 
2232   }
2233 
2234   {
2235     SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2236     // Tell dtrace about this method exit
2237     save_native_result(masm, ret_type, stack_slots);
2238     __ mov_metadata(rax, method());
2239     __ call_VM_leaf(
2240          CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2241          thread, rax);
2242     restore_native_result(masm, ret_type, stack_slots);
2243   }
2244 
2245   // We can finally stop using that last_Java_frame we setup ages ago
2246 
2247   __ reset_last_Java_frame(thread, false, true);
2248 
2249   // Unpack oop result
2250   if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2251       Label L;
2252       __ cmpptr(rax, (int32_t)NULL_WORD);
2253       __ jcc(Assembler::equal, L);
2254       __ movptr(rax, Address(rax, 0));
2255       __ bind(L);
2256       __ verify_oop(rax);
2257   }
2258 
2259   if (!is_critical_native) {
2260     // reset handle block
2261     __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2262     __ movptr(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2263 
2264     // Any exception pending?
2265     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2266     __ jcc(Assembler::notEqual, exception_pending);
2267   }
2268 
2269   // no exception, we're almost done
2270 
2271   // check that only result value is on FPU stack
2272   __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2273 
2274   // Fixup floating pointer results so that result looks like a return from a compiled method
2275   if (ret_type == T_FLOAT) {
2276     if (UseSSE >= 1) {
2277       // Pop st0 and store as float and reload into xmm register
2278       __ fstp_s(Address(rbp, -4));
2279       __ movflt(xmm0, Address(rbp, -4));
2280     }
2281   } else if (ret_type == T_DOUBLE) {
2282     if (UseSSE >= 2) {
2283       // Pop st0 and store as double and reload into xmm register
2284       __ fstp_d(Address(rbp, -8));
2285       __ movdbl(xmm0, Address(rbp, -8));
2286     }
2287   }
2288 
2289   // Return
2290 
2291   __ leave();
2292   __ ret(0);
2293 
2294   // Unexpected paths are out of line and go here
2295 
2296   // Slow path locking & unlocking
2297   if (method->is_synchronized()) {
2298 
2299     // BEGIN Slow path lock
2300 
2301     __ bind(slow_path_lock);
2302 
2303     // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2304     // args are (oop obj, BasicLock* lock, JavaThread* thread)
2305     __ push(thread);
2306     __ push(lock_reg);
2307     __ push(obj_reg);
2308     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2309     __ addptr(rsp, 3*wordSize);
2310 
2311 #ifdef ASSERT
2312     { Label L;
2313     __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2314     __ jcc(Assembler::equal, L);
2315     __ stop("no pending exception allowed on exit from monitorenter");
2316     __ bind(L);
2317     }
2318 #endif
2319     __ jmp(lock_done);
2320 
2321     // END Slow path lock
2322 
2323     // BEGIN Slow path unlock
2324     __ bind(slow_path_unlock);
2325 
2326     // Slow path unlock
2327 
2328     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2329       save_native_result(masm, ret_type, stack_slots);
2330     }
2331     // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2332 
2333     __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2334     __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2335 
2336 
2337     // should be a peal
2338     // +wordSize because of the push above
2339     __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2340     __ push(rax);
2341 
2342     __ push(obj_reg);
2343     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2344     __ addptr(rsp, 2*wordSize);
2345 #ifdef ASSERT
2346     {
2347       Label L;
2348       __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2349       __ jcc(Assembler::equal, L);
2350       __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2351       __ bind(L);
2352     }
2353 #endif /* ASSERT */
2354 
2355     __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2356 
2357     if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2358       restore_native_result(masm, ret_type, stack_slots);
2359     }
2360     __ jmp(unlock_done);
2361     // END Slow path unlock
2362 
2363   }
2364 
2365   // SLOW PATH Reguard the stack if needed
2366 
2367   __ bind(reguard);
2368   save_native_result(masm, ret_type, stack_slots);
2369   {
2370     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2371   }
2372   restore_native_result(masm, ret_type, stack_slots);
2373   __ jmp(reguard_done);
2374 
2375 
2376   // BEGIN EXCEPTION PROCESSING
2377 
2378   if (!is_critical_native) {
2379     // Forward  the exception
2380     __ bind(exception_pending);
2381 
2382     // remove possible return value from FPU register stack
2383     __ empty_FPU_stack();
2384 
2385     // pop our frame
2386     __ leave();
2387     // and forward the exception
2388     __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2389   }
2390 
2391   __ flush();
2392 
2393   nmethod *nm = nmethod::new_native_nmethod(method,
2394                                             compile_id,
2395                                             masm->code(),
2396                                             vep_offset,
2397                                             frame_complete,
2398                                             stack_slots / VMRegImpl::slots_per_word,
2399                                             (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2400                                             in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2401                                             oop_maps);
2402 
2403   if (is_critical_native) {
2404     nm->set_lazy_critical_native(true);
2405   }
2406 
2407   return nm;
2408 
2409 }
2410 
2411 #ifdef HAVE_DTRACE_H
2412 // ---------------------------------------------------------------------------
2413 // Generate a dtrace nmethod for a given signature.  The method takes arguments
2414 // in the Java compiled code convention, marshals them to the native
2415 // abi and then leaves nops at the position you would expect to call a native
2416 // function. When the probe is enabled the nops are replaced with a trap
2417 // instruction that dtrace inserts and the trace will cause a notification
2418 // to dtrace.
2419 //
2420 // The probes are only able to take primitive types and java/lang/String as
2421 // arguments.  No other java types are allowed. Strings are converted to utf8
2422 // strings so that from dtrace point of view java strings are converted to C
2423 // strings. There is an arbitrary fixed limit on the total space that a method
2424 // can use for converting the strings. (256 chars per string in the signature).
2425 // So any java string larger then this is truncated.
2426 
2427 nmethod *SharedRuntime::generate_dtrace_nmethod(
2428     MacroAssembler *masm, methodHandle method) {
2429 
2430   // generate_dtrace_nmethod is guarded by a mutex so we are sure to
2431   // be single threaded in this method.
2432   assert(AdapterHandlerLibrary_lock->owned_by_self(), "must be");
2433 
2434   // Fill in the signature array, for the calling-convention call.
2435   int total_args_passed = method->size_of_parameters();
2436 
2437   BasicType* in_sig_bt  = NEW_RESOURCE_ARRAY(BasicType, total_args_passed);
2438   VMRegPair  *in_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed);
2439 
2440   // The signature we are going to use for the trap that dtrace will see
2441   // java/lang/String is converted. We drop "this" and any other object
2442   // is converted to NULL.  (A one-slot java/lang/Long object reference
2443   // is converted to a two-slot long, which is why we double the allocation).
2444   BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_args_passed * 2);
2445   VMRegPair* out_regs   = NEW_RESOURCE_ARRAY(VMRegPair, total_args_passed * 2);
2446 
2447   int i=0;
2448   int total_strings = 0;
2449   int first_arg_to_pass = 0;
2450   int total_c_args = 0;
2451 
2452   if( !method->is_static() ) {  // Pass in receiver first
2453     in_sig_bt[i++] = T_OBJECT;
2454     first_arg_to_pass = 1;
2455   }
2456 
2457   // We need to convert the java args to where a native (non-jni) function
2458   // would expect them. To figure out where they go we convert the java
2459   // signature to a C signature.
2460 
2461   SignatureStream ss(method->signature());
2462   for ( ; !ss.at_return_type(); ss.next()) {
2463     BasicType bt = ss.type();
2464     in_sig_bt[i++] = bt;  // Collect remaining bits of signature
2465     out_sig_bt[total_c_args++] = bt;
2466     if( bt == T_OBJECT) {
2467       Symbol* s = ss.as_symbol_or_null();   // symbol is created
2468       if (s == vmSymbols::java_lang_String()) {
2469         total_strings++;
2470         out_sig_bt[total_c_args-1] = T_ADDRESS;
2471       } else if (s == vmSymbols::java_lang_Boolean() ||
2472                  s == vmSymbols::java_lang_Character() ||
2473                  s == vmSymbols::java_lang_Byte() ||
2474                  s == vmSymbols::java_lang_Short() ||
2475                  s == vmSymbols::java_lang_Integer() ||
2476                  s == vmSymbols::java_lang_Float()) {
2477         out_sig_bt[total_c_args-1] = T_INT;
2478       } else if (s == vmSymbols::java_lang_Long() ||
2479                  s == vmSymbols::java_lang_Double()) {
2480         out_sig_bt[total_c_args-1] = T_LONG;
2481         out_sig_bt[total_c_args++] = T_VOID;
2482       }
2483     } else if ( bt == T_LONG || bt == T_DOUBLE ) {
2484       in_sig_bt[i++] = T_VOID;   // Longs & doubles take 2 Java slots
2485       out_sig_bt[total_c_args++] = T_VOID;
2486     }
2487   }
2488 
2489   assert(i==total_args_passed, "validly parsed signature");
2490 
2491   // Now get the compiled-Java layout as input arguments
2492   int comp_args_on_stack;
2493   comp_args_on_stack = SharedRuntime::java_calling_convention(
2494       in_sig_bt, in_regs, total_args_passed, false);
2495 
2496   // Now figure out where the args must be stored and how much stack space
2497   // they require (neglecting out_preserve_stack_slots).
2498 
2499   int out_arg_slots;
2500   out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
2501 
2502   // Calculate the total number of stack slots we will need.
2503 
2504   // First count the abi requirement plus all of the outgoing args
2505   int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
2506 
2507   // Now space for the string(s) we must convert
2508 
2509   int* string_locs   = NEW_RESOURCE_ARRAY(int, total_strings + 1);
2510   for (i = 0; i < total_strings ; i++) {
2511     string_locs[i] = stack_slots;
2512     stack_slots += max_dtrace_string_size / VMRegImpl::stack_slot_size;
2513   }
2514 
2515   // + 2 for return address (which we own) and saved rbp,
2516 
2517   stack_slots += 2;
2518 
2519   // Ok The space we have allocated will look like:
2520   //
2521   //
2522   // FP-> |                     |
2523   //      |---------------------|
2524   //      | string[n]           |
2525   //      |---------------------| <- string_locs[n]
2526   //      | string[n-1]         |
2527   //      |---------------------| <- string_locs[n-1]
2528   //      | ...                 |
2529   //      | ...                 |
2530   //      |---------------------| <- string_locs[1]
2531   //      | string[0]           |
2532   //      |---------------------| <- string_locs[0]
2533   //      | outbound memory     |
2534   //      | based arguments     |
2535   //      |                     |
2536   //      |---------------------|
2537   //      |                     |
2538   // SP-> | out_preserved_slots |
2539   //
2540   //
2541 
2542   // Now compute actual number of stack words we need rounding to make
2543   // stack properly aligned.
2544   stack_slots = round_to(stack_slots, 2 * VMRegImpl::slots_per_word);
2545 
2546   int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2547 
2548   intptr_t start = (intptr_t)__ pc();
2549 
2550   // First thing make an ic check to see if we should even be here
2551 
2552   // We are free to use all registers as temps without saving them and
2553   // restoring them except rbp. rbp, is the only callee save register
2554   // as far as the interpreter and the compiler(s) are concerned.
2555 
2556   const Register ic_reg = rax;
2557   const Register receiver = rcx;
2558   Label hit;
2559   Label exception_pending;
2560 
2561 
2562   __ verify_oop(receiver);
2563   __ cmpl(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
2564   __ jcc(Assembler::equal, hit);
2565 
2566   __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2567 
2568   // verified entry must be aligned for code patching.
2569   // and the first 5 bytes must be in the same cache line
2570   // if we align at 8 then we will be sure 5 bytes are in the same line
2571   __ align(8);
2572 
2573   __ bind(hit);
2574 
2575   int vep_offset = ((intptr_t)__ pc()) - start;
2576 
2577 
2578   // The instruction at the verified entry point must be 5 bytes or longer
2579   // because it can be patched on the fly by make_non_entrant. The stack bang
2580   // instruction fits that requirement.
2581 
2582   // Generate stack overflow check
2583 
2584 
2585   if (UseStackBanging) {
2586     if (stack_size <= StackShadowPages*os::vm_page_size()) {
2587       __ bang_stack_with_offset(StackShadowPages*os::vm_page_size());
2588     } else {
2589       __ movl(rax, stack_size);
2590       __ bang_stack_size(rax, rbx);
2591     }
2592   } else {
2593     // need a 5 byte instruction to allow MT safe patching to non-entrant
2594     __ fat_nop();
2595   }
2596 
2597   assert(((int)__ pc() - start - vep_offset) >= 5,
2598          "valid size for make_non_entrant");
2599 
2600   // Generate a new frame for the wrapper.
2601   __ enter();
2602 
2603   // -2 because return address is already present and so is saved rbp,
2604   if (stack_size - 2*wordSize != 0) {
2605     __ subl(rsp, stack_size - 2*wordSize);
2606   }
2607 
2608   // Frame is now completed as far a size and linkage.
2609 
2610   int frame_complete = ((intptr_t)__ pc()) - start;
2611 
2612   // First thing we do store all the args as if we are doing the call.
2613   // Since the C calling convention is stack based that ensures that
2614   // all the Java register args are stored before we need to convert any
2615   // string we might have.
2616 
2617   int sid = 0;
2618   int c_arg, j_arg;
2619   int string_reg = 0;
2620 
2621   for (j_arg = first_arg_to_pass, c_arg = 0 ;
2622        j_arg < total_args_passed ; j_arg++, c_arg++ ) {
2623 
2624     VMRegPair src = in_regs[j_arg];
2625     VMRegPair dst = out_regs[c_arg];
2626     assert(dst.first()->is_stack() || in_sig_bt[j_arg] == T_VOID,
2627            "stack based abi assumed");
2628 
2629     switch (in_sig_bt[j_arg]) {
2630 
2631       case T_ARRAY:
2632       case T_OBJECT:
2633         if (out_sig_bt[c_arg] == T_ADDRESS) {
2634           // Any register based arg for a java string after the first
2635           // will be destroyed by the call to get_utf so we store
2636           // the original value in the location the utf string address
2637           // will eventually be stored.
2638           if (src.first()->is_reg()) {
2639             if (string_reg++ != 0) {
2640               simple_move32(masm, src, dst);
2641             }
2642           }
2643         } else if (out_sig_bt[c_arg] == T_INT || out_sig_bt[c_arg] == T_LONG) {
2644           // need to unbox a one-word value
2645           Register in_reg = rax;
2646           if ( src.first()->is_reg() ) {
2647             in_reg = src.first()->as_Register();
2648           } else {
2649             simple_move32(masm, src, in_reg->as_VMReg());
2650           }
2651           Label skipUnbox;
2652           __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2653           if ( out_sig_bt[c_arg] == T_LONG ) {
2654             __ movl(Address(rsp, reg2offset_out(dst.second())), NULL_WORD);
2655           }
2656           __ testl(in_reg, in_reg);
2657           __ jcc(Assembler::zero, skipUnbox);
2658           assert(dst.first()->is_stack() &&
2659                  (!dst.second()->is_valid() || dst.second()->is_stack()),
2660                  "value(s) must go into stack slots");
2661 
2662           BasicType bt = out_sig_bt[c_arg];
2663           int box_offset = java_lang_boxing_object::value_offset_in_bytes(bt);
2664           if ( bt == T_LONG ) {
2665             __ movl(rbx, Address(in_reg,
2666                                  box_offset + VMRegImpl::stack_slot_size));
2667             __ movl(Address(rsp, reg2offset_out(dst.second())), rbx);
2668           }
2669           __ movl(in_reg,  Address(in_reg, box_offset));
2670           __ movl(Address(rsp, reg2offset_out(dst.first())), in_reg);
2671           __ bind(skipUnbox);
2672         } else {
2673           // Convert the arg to NULL
2674           __ movl(Address(rsp, reg2offset_out(dst.first())), NULL_WORD);
2675         }
2676         if (out_sig_bt[c_arg] == T_LONG) {
2677           assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2678           ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2679         }
2680         break;
2681 
2682       case T_VOID:
2683         break;
2684 
2685       case T_FLOAT:
2686         float_move(masm, src, dst);
2687         break;
2688 
2689       case T_DOUBLE:
2690         assert( j_arg + 1 < total_args_passed &&
2691                 in_sig_bt[j_arg + 1] == T_VOID, "bad arg list");
2692         double_move(masm, src, dst);
2693         break;
2694 
2695       case T_LONG :
2696         long_move(masm, src, dst);
2697         break;
2698 
2699       case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2700 
2701       default:
2702         simple_move32(masm, src, dst);
2703     }
2704   }
2705 
2706   // Now we must convert any string we have to utf8
2707   //
2708 
2709   for (sid = 0, j_arg = first_arg_to_pass, c_arg = 0 ;
2710        sid < total_strings ; j_arg++, c_arg++ ) {
2711 
2712     if (out_sig_bt[c_arg] == T_ADDRESS) {
2713 
2714       Address utf8_addr = Address(
2715           rsp, string_locs[sid++] * VMRegImpl::stack_slot_size);
2716       __ leal(rax, utf8_addr);
2717 
2718       // The first string we find might still be in the original java arg
2719       // register
2720       VMReg orig_loc = in_regs[j_arg].first();
2721       Register string_oop;
2722 
2723       // This is where the argument will eventually reside
2724       Address dest = Address(rsp, reg2offset_out(out_regs[c_arg].first()));
2725 
2726       if (sid == 1 && orig_loc->is_reg()) {
2727         string_oop = orig_loc->as_Register();
2728         assert(string_oop != rax, "smashed arg");
2729       } else {
2730 
2731         if (orig_loc->is_reg()) {
2732           // Get the copy of the jls object
2733           __ movl(rcx, dest);
2734         } else {
2735           // arg is still in the original location
2736           __ movl(rcx, Address(rbp, reg2offset_in(orig_loc)));
2737         }
2738         string_oop = rcx;
2739 
2740       }
2741       Label nullString;
2742       __ movl(dest, NULL_WORD);
2743       __ testl(string_oop, string_oop);
2744       __ jcc(Assembler::zero, nullString);
2745 
2746       // Now we can store the address of the utf string as the argument
2747       __ movl(dest, rax);
2748 
2749       // And do the conversion
2750       __ call_VM_leaf(CAST_FROM_FN_PTR(
2751              address, SharedRuntime::get_utf), string_oop, rax);
2752       __ bind(nullString);
2753     }
2754 
2755     if (in_sig_bt[j_arg] == T_OBJECT && out_sig_bt[c_arg] == T_LONG) {
2756       assert(out_sig_bt[c_arg+1] == T_VOID, "must be");
2757       ++c_arg; // Move over the T_VOID To keep the loop indices in sync
2758     }
2759   }
2760 
2761 
2762   // Ok now we are done. Need to place the nop that dtrace wants in order to
2763   // patch in the trap
2764 
2765   int patch_offset = ((intptr_t)__ pc()) - start;
2766 
2767   __ nop();
2768 
2769 
2770   // Return
2771 
2772   __ leave();
2773   __ ret(0);
2774 
2775   __ flush();
2776 
2777   nmethod *nm = nmethod::new_dtrace_nmethod(
2778       method, masm->code(), vep_offset, patch_offset, frame_complete,
2779       stack_slots / VMRegImpl::slots_per_word);
2780   return nm;
2781 
2782 }
2783 
2784 #endif // HAVE_DTRACE_H
2785 
2786 // this function returns the adjust size (in number of words) to a c2i adapter
2787 // activation for use during deoptimization
2788 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2789   return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2790 }
2791 
2792 
2793 uint SharedRuntime::out_preserve_stack_slots() {
2794   return 0;
2795 }
2796 
2797 //------------------------------generate_deopt_blob----------------------------
2798 void SharedRuntime::generate_deopt_blob() {
2799   // allocate space for the code
2800   ResourceMark rm;
2801   // setup code generation tools
2802   CodeBuffer   buffer("deopt_blob", 1024, 1024);
2803   MacroAssembler* masm = new MacroAssembler(&buffer);
2804   int frame_size_in_words;
2805   OopMap* map = NULL;
2806   // Account for the extra args we place on the stack
2807   // by the time we call fetch_unroll_info
2808   const int additional_words = 2; // deopt kind, thread
2809 
2810   OopMapSet *oop_maps = new OopMapSet();
2811 
2812   // -------------
2813   // This code enters when returning to a de-optimized nmethod.  A return
2814   // address has been pushed on the the stack, and return values are in
2815   // registers.
2816   // If we are doing a normal deopt then we were called from the patched
2817   // nmethod from the point we returned to the nmethod. So the return
2818   // address on the stack is wrong by NativeCall::instruction_size
2819   // We will adjust the value to it looks like we have the original return
2820   // address on the stack (like when we eagerly deoptimized).
2821   // In the case of an exception pending with deoptimized then we enter
2822   // with a return address on the stack that points after the call we patched
2823   // into the exception handler. We have the following register state:
2824   //    rax,: exception
2825   //    rbx,: exception handler
2826   //    rdx: throwing pc
2827   // So in this case we simply jam rdx into the useless return address and
2828   // the stack looks just like we want.
2829   //
2830   // At this point we need to de-opt.  We save the argument return
2831   // registers.  We call the first C routine, fetch_unroll_info().  This
2832   // routine captures the return values and returns a structure which
2833   // describes the current frame size and the sizes of all replacement frames.
2834   // The current frame is compiled code and may contain many inlined
2835   // functions, each with their own JVM state.  We pop the current frame, then
2836   // push all the new frames.  Then we call the C routine unpack_frames() to
2837   // populate these frames.  Finally unpack_frames() returns us the new target
2838   // address.  Notice that callee-save registers are BLOWN here; they have
2839   // already been captured in the vframeArray at the time the return PC was
2840   // patched.
2841   address start = __ pc();
2842   Label cont;
2843 
2844   // Prolog for non exception case!
2845 
2846   // Save everything in sight.
2847 
2848   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2849   // Normal deoptimization
2850   __ push(Deoptimization::Unpack_deopt);
2851   __ jmp(cont);
2852 
2853   int reexecute_offset = __ pc() - start;
2854 
2855   // Reexecute case
2856   // return address is the pc describes what bci to do re-execute at
2857 
2858   // No need to update map as each call to save_live_registers will produce identical oopmap
2859   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2860 
2861   __ push(Deoptimization::Unpack_reexecute);
2862   __ jmp(cont);
2863 
2864   int exception_offset = __ pc() - start;
2865 
2866   // Prolog for exception case
2867 
2868   // all registers are dead at this entry point, except for rax, and
2869   // rdx which contain the exception oop and exception pc
2870   // respectively.  Set them in TLS and fall thru to the
2871   // unpack_with_exception_in_tls entry point.
2872 
2873   __ get_thread(rdi);
2874   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2875   __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2876 
2877   int exception_in_tls_offset = __ pc() - start;
2878 
2879   // new implementation because exception oop is now passed in JavaThread
2880 
2881   // Prolog for exception case
2882   // All registers must be preserved because they might be used by LinearScan
2883   // Exceptiop oop and throwing PC are passed in JavaThread
2884   // tos: stack at point of call to method that threw the exception (i.e. only
2885   // args are on the stack, no return address)
2886 
2887   // make room on stack for the return address
2888   // It will be patched later with the throwing pc. The correct value is not
2889   // available now because loading it from memory would destroy registers.
2890   __ push(0);
2891 
2892   // Save everything in sight.
2893 
2894   // No need to update map as each call to save_live_registers will produce identical oopmap
2895   (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2896 
2897   // Now it is safe to overwrite any register
2898 
2899   // store the correct deoptimization type
2900   __ push(Deoptimization::Unpack_exception);
2901 
2902   // load throwing pc from JavaThread and patch it as the return address
2903   // of the current frame. Then clear the field in JavaThread
2904   __ get_thread(rdi);
2905   __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2906   __ movptr(Address(rbp, wordSize), rdx);
2907   __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2908 
2909 #ifdef ASSERT
2910   // verify that there is really an exception oop in JavaThread
2911   __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2912   __ verify_oop(rax);
2913 
2914   // verify that there is no pending exception
2915   Label no_pending_exception;
2916   __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2917   __ testptr(rax, rax);
2918   __ jcc(Assembler::zero, no_pending_exception);
2919   __ stop("must not have pending exception here");
2920   __ bind(no_pending_exception);
2921 #endif
2922 
2923   __ bind(cont);
2924 
2925   // Compiled code leaves the floating point stack dirty, empty it.
2926   __ empty_FPU_stack();
2927 
2928 
2929   // Call C code.  Need thread and this frame, but NOT official VM entry
2930   // crud.  We cannot block on this call, no GC can happen.
2931   __ get_thread(rcx);
2932   __ push(rcx);
2933   // fetch_unroll_info needs to call last_java_frame()
2934   __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2935 
2936   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2937 
2938   // Need to have an oopmap that tells fetch_unroll_info where to
2939   // find any register it might need.
2940 
2941   oop_maps->add_gc_map( __ pc()-start, map);
2942 
2943   // Discard arg to fetch_unroll_info
2944   __ pop(rcx);
2945 
2946   __ get_thread(rcx);
2947   __ reset_last_Java_frame(rcx, false, false);
2948 
2949   // Load UnrollBlock into EDI
2950   __ mov(rdi, rax);
2951 
2952   // Move the unpack kind to a safe place in the UnrollBlock because
2953   // we are very short of registers
2954 
2955   Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2956   // retrieve the deopt kind from where we left it.
2957   __ pop(rax);
2958   __ movl(unpack_kind, rax);                      // save the unpack_kind value
2959 
2960    Label noException;
2961   __ cmpl(rax, Deoptimization::Unpack_exception);   // Was exception pending?
2962   __ jcc(Assembler::notEqual, noException);
2963   __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2964   __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2965   __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2966   __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2967 
2968   __ verify_oop(rax);
2969 
2970   // Overwrite the result registers with the exception results.
2971   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2972   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2973 
2974   __ bind(noException);
2975 
2976   // Stack is back to only having register save data on the stack.
2977   // Now restore the result registers. Everything else is either dead or captured
2978   // in the vframeArray.
2979 
2980   RegisterSaver::restore_result_registers(masm);
2981 
2982   // Non standard control word may be leaked out through a safepoint blob, and we can
2983   // deopt at a poll point with the non standard control word. However, we should make
2984   // sure the control word is correct after restore_result_registers.
2985   __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2986 
2987   // All of the register save area has been popped of the stack. Only the
2988   // return address remains.
2989 
2990   // Pop all the frames we must move/replace.
2991   //
2992   // Frame picture (youngest to oldest)
2993   // 1: self-frame (no frame link)
2994   // 2: deopting frame  (no frame link)
2995   // 3: caller of deopting frame (could be compiled/interpreted).
2996   //
2997   // Note: by leaving the return address of self-frame on the stack
2998   // and using the size of frame 2 to adjust the stack
2999   // when we are done the return to frame 3 will still be on the stack.
3000 
3001   // Pop deoptimized frame
3002   __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3003 
3004   // sp should be pointing at the return address to the caller (3)
3005 
3006   // Stack bang to make sure there's enough room for these interpreter frames.
3007   if (UseStackBanging) {
3008     __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3009     __ bang_stack_size(rbx, rcx);
3010   }
3011 
3012   // Load array of frame pcs into ECX
3013   __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3014 
3015   __ pop(rsi); // trash the old pc
3016 
3017   // Load array of frame sizes into ESI
3018   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3019 
3020   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3021 
3022   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3023   __ movl(counter, rbx);
3024 
3025   // Pick up the initial fp we should save
3026   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3027 
3028   // Now adjust the caller's stack to make up for the extra locals
3029   // but record the original sp so that we can save it in the skeletal interpreter
3030   // frame and the stack walking of interpreter_sender will get the unextended sp
3031   // value and not the "real" sp value.
3032 
3033   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3034   __ movptr(sp_temp, rsp);
3035   __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3036   __ subptr(rsp, rbx);
3037 
3038   // Push interpreter frames in a loop
3039   Label loop;
3040   __ bind(loop);
3041   __ movptr(rbx, Address(rsi, 0));      // Load frame size
3042 #ifdef CC_INTERP
3043   __ subptr(rbx, 4*wordSize);           // we'll push pc and ebp by hand and
3044 #ifdef ASSERT
3045   __ push(0xDEADDEAD);                  // Make a recognizable pattern
3046   __ push(0xDEADDEAD);
3047 #else /* ASSERT */
3048   __ subptr(rsp, 2*wordSize);           // skip the "static long no_param"
3049 #endif /* ASSERT */
3050 #else /* CC_INTERP */
3051   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
3052 #endif /* CC_INTERP */
3053   __ pushptr(Address(rcx, 0));          // save return address
3054   __ enter();                           // save old & set new rbp,
3055   __ subptr(rsp, rbx);                  // Prolog!
3056   __ movptr(rbx, sp_temp);              // sender's sp
3057 #ifdef CC_INTERP
3058   __ movptr(Address(rbp,
3059                   -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3060           rbx); // Make it walkable
3061 #else /* CC_INTERP */
3062   // This value is corrected by layout_activation_impl
3063   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
3064   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3065 #endif /* CC_INTERP */
3066   __ movptr(sp_temp, rsp);              // pass to next frame
3067   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
3068   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
3069   __ decrementl(counter);             // decrement counter
3070   __ jcc(Assembler::notZero, loop);
3071   __ pushptr(Address(rcx, 0));          // save final return address
3072 
3073   // Re-push self-frame
3074   __ enter();                           // save old & set new rbp,
3075 
3076   //  Return address and rbp, are in place
3077   // We'll push additional args later. Just allocate a full sized
3078   // register save area
3079   __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
3080 
3081   // Restore frame locals after moving the frame
3082   __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
3083   __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
3084   __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize));   // Pop float stack and store in local
3085   if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
3086   if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
3087 
3088   // Set up the args to unpack_frame
3089 
3090   __ pushl(unpack_kind);                     // get the unpack_kind value
3091   __ get_thread(rcx);
3092   __ push(rcx);
3093 
3094   // set last_Java_sp, last_Java_fp
3095   __ set_last_Java_frame(rcx, noreg, rbp, NULL);
3096 
3097   // Call C code.  Need thread but NOT official VM entry
3098   // crud.  We cannot block on this call, no GC can happen.  Call should
3099   // restore return values to their stack-slots with the new SP.
3100   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3101   // Set an oopmap for the call site
3102   oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
3103 
3104   // rax, contains the return result type
3105   __ push(rax);
3106 
3107   __ get_thread(rcx);
3108   __ reset_last_Java_frame(rcx, false, false);
3109 
3110   // Collect return values
3111   __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
3112   __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
3113 
3114   // Clear floating point stack before returning to interpreter
3115   __ empty_FPU_stack();
3116 
3117   // Check if we should push the float or double return value.
3118   Label results_done, yes_double_value;
3119   __ cmpl(Address(rsp, 0), T_DOUBLE);
3120   __ jcc (Assembler::zero, yes_double_value);
3121   __ cmpl(Address(rsp, 0), T_FLOAT);
3122   __ jcc (Assembler::notZero, results_done);
3123 
3124   // return float value as expected by interpreter
3125   if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
3126   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
3127   __ jmp(results_done);
3128 
3129   // return double value as expected by interpreter
3130   __ bind(yes_double_value);
3131   if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
3132   else            __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
3133 
3134   __ bind(results_done);
3135 
3136   // Pop self-frame.
3137   __ leave();                              // Epilog!
3138 
3139   // Jump to interpreter
3140   __ ret(0);
3141 
3142   // -------------
3143   // make sure all code is generated
3144   masm->flush();
3145 
3146   _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3147   _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3148 }
3149 
3150 
3151 #ifdef COMPILER2
3152 //------------------------------generate_uncommon_trap_blob--------------------
3153 void SharedRuntime::generate_uncommon_trap_blob() {
3154   // allocate space for the code
3155   ResourceMark rm;
3156   // setup code generation tools
3157   CodeBuffer   buffer("uncommon_trap_blob", 512, 512);
3158   MacroAssembler* masm = new MacroAssembler(&buffer);
3159 
3160   enum frame_layout {
3161     arg0_off,      // thread                     sp + 0 // Arg location for
3162     arg1_off,      // unloaded_class_index       sp + 1 // calling C
3163     // The frame sender code expects that rbp will be in the "natural" place and
3164     // will override any oopMap setting for it. We must therefore force the layout
3165     // so that it agrees with the frame sender code.
3166     rbp_off,       // callee saved register      sp + 2
3167     return_off,    // slot for return address    sp + 3
3168     framesize
3169   };
3170 
3171   address start = __ pc();
3172   // Push self-frame.
3173   __ subptr(rsp, return_off*wordSize);     // Epilog!
3174 
3175   // rbp, is an implicitly saved callee saved register (i.e. the calling
3176   // convention will save restore it in prolog/epilog) Other than that
3177   // there are no callee save registers no that adapter frames are gone.
3178   __ movptr(Address(rsp, rbp_off*wordSize), rbp);
3179 
3180   // Clear the floating point exception stack
3181   __ empty_FPU_stack();
3182 
3183   // set last_Java_sp
3184   __ get_thread(rdx);
3185   __ set_last_Java_frame(rdx, noreg, noreg, NULL);
3186 
3187   // Call C code.  Need thread but NOT official VM entry
3188   // crud.  We cannot block on this call, no GC can happen.  Call should
3189   // capture callee-saved registers as well as return values.
3190   __ movptr(Address(rsp, arg0_off*wordSize), rdx);
3191   // argument already in ECX
3192   __ movl(Address(rsp, arg1_off*wordSize),rcx);
3193   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3194 
3195   // Set an oopmap for the call site
3196   OopMapSet *oop_maps = new OopMapSet();
3197   OopMap* map =  new OopMap( framesize, 0 );
3198   // No oopMap for rbp, it is known implicitly
3199 
3200   oop_maps->add_gc_map( __ pc()-start, map);
3201 
3202   __ get_thread(rcx);
3203 
3204   __ reset_last_Java_frame(rcx, false, false);
3205 
3206   // Load UnrollBlock into EDI
3207   __ movptr(rdi, rax);
3208 
3209   // Pop all the frames we must move/replace.
3210   //
3211   // Frame picture (youngest to oldest)
3212   // 1: self-frame (no frame link)
3213   // 2: deopting frame  (no frame link)
3214   // 3: caller of deopting frame (could be compiled/interpreted).
3215 
3216   // Pop self-frame.  We have no frame, and must rely only on EAX and ESP.
3217   __ addptr(rsp,(framesize-1)*wordSize);     // Epilog!
3218 
3219   // Pop deoptimized frame
3220   __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
3221   __ addptr(rsp, rcx);
3222 
3223   // sp should be pointing at the return address to the caller (3)
3224 
3225   // Stack bang to make sure there's enough room for these interpreter frames.
3226   if (UseStackBanging) {
3227     __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3228     __ bang_stack_size(rbx, rcx);
3229   }
3230 
3231 
3232   // Load array of frame pcs into ECX
3233   __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3234 
3235   __ pop(rsi); // trash the pc
3236 
3237   // Load array of frame sizes into ESI
3238   __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3239 
3240   Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3241 
3242   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3243   __ movl(counter, rbx);
3244 
3245   // Pick up the initial fp we should save
3246   __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3247 
3248   // Now adjust the caller's stack to make up for the extra locals
3249   // but record the original sp so that we can save it in the skeletal interpreter
3250   // frame and the stack walking of interpreter_sender will get the unextended sp
3251   // value and not the "real" sp value.
3252 
3253   Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3254   __ movptr(sp_temp, rsp);
3255   __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3256   __ subptr(rsp, rbx);
3257 
3258   // Push interpreter frames in a loop
3259   Label loop;
3260   __ bind(loop);
3261   __ movptr(rbx, Address(rsi, 0));      // Load frame size
3262 #ifdef CC_INTERP
3263   __ subptr(rbx, 4*wordSize);           // we'll push pc and ebp by hand and
3264 #ifdef ASSERT
3265   __ push(0xDEADDEAD);                  // Make a recognizable pattern
3266   __ push(0xDEADDEAD);                  // (parm to RecursiveInterpreter...)
3267 #else /* ASSERT */
3268   __ subptr(rsp, 2*wordSize);           // skip the "static long no_param"
3269 #endif /* ASSERT */
3270 #else /* CC_INTERP */
3271   __ subptr(rbx, 2*wordSize);           // we'll push pc and rbp, by hand
3272 #endif /* CC_INTERP */
3273   __ pushptr(Address(rcx, 0));          // save return address
3274   __ enter();                           // save old & set new rbp,
3275   __ subptr(rsp, rbx);                  // Prolog!
3276   __ movptr(rbx, sp_temp);              // sender's sp
3277 #ifdef CC_INTERP
3278   __ movptr(Address(rbp,
3279                   -(sizeof(BytecodeInterpreter)) + in_bytes(byte_offset_of(BytecodeInterpreter, _sender_sp))),
3280           rbx); // Make it walkable
3281 #else /* CC_INTERP */
3282   // This value is corrected by layout_activation_impl
3283   __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
3284   __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3285 #endif /* CC_INTERP */
3286   __ movptr(sp_temp, rsp);              // pass to next frame
3287   __ addptr(rsi, wordSize);             // Bump array pointer (sizes)
3288   __ addptr(rcx, wordSize);             // Bump array pointer (pcs)
3289   __ decrementl(counter);             // decrement counter
3290   __ jcc(Assembler::notZero, loop);
3291   __ pushptr(Address(rcx, 0));            // save final return address
3292 
3293   // Re-push self-frame
3294   __ enter();                           // save old & set new rbp,
3295   __ subptr(rsp, (framesize-2) * wordSize);   // Prolog!
3296 
3297 
3298   // set last_Java_sp, last_Java_fp
3299   __ get_thread(rdi);
3300   __ set_last_Java_frame(rdi, noreg, rbp, NULL);
3301 
3302   // Call C code.  Need thread but NOT official VM entry
3303   // crud.  We cannot block on this call, no GC can happen.  Call should
3304   // restore return values to their stack-slots with the new SP.
3305   __ movptr(Address(rsp,arg0_off*wordSize),rdi);
3306   __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
3307   __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3308   // Set an oopmap for the call site
3309   oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
3310 
3311   __ get_thread(rdi);
3312   __ reset_last_Java_frame(rdi, true, false);
3313 
3314   // Pop self-frame.
3315   __ leave();     // Epilog!
3316 
3317   // Jump to interpreter
3318   __ ret(0);
3319 
3320   // -------------
3321   // make sure all code is generated
3322   masm->flush();
3323 
3324    _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
3325 }
3326 #endif // COMPILER2
3327 
3328 //------------------------------generate_handler_blob------
3329 //
3330 // Generate a special Compile2Runtime blob that saves all registers,
3331 // setup oopmap, and calls safepoint code to stop the compiled code for
3332 // a safepoint.
3333 //
3334 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3335 
3336   // Account for thread arg in our frame
3337   const int additional_words = 1;
3338   int frame_size_in_words;
3339 
3340   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3341 
3342   ResourceMark rm;
3343   OopMapSet *oop_maps = new OopMapSet();
3344   OopMap* map;
3345 
3346   // allocate space for the code
3347   // setup code generation tools
3348   CodeBuffer   buffer("handler_blob", 1024, 512);
3349   MacroAssembler* masm = new MacroAssembler(&buffer);
3350 
3351   const Register java_thread = rdi; // callee-saved for VC++
3352   address start   = __ pc();
3353   address call_pc = NULL;
3354   bool cause_return = (poll_type == POLL_AT_RETURN);
3355   bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3356   // If cause_return is true we are at a poll_return and there is
3357   // the return address on the stack to the caller on the nmethod
3358   // that is safepoint. We can leave this return on the stack and
3359   // effectively complete the return and safepoint in the caller.
3360   // Otherwise we push space for a return address that the safepoint
3361   // handler will install later to make the stack walking sensible.
3362   if (!cause_return)
3363     __ push(rbx);  // Make room for return address (or push it again)
3364 
3365   map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
3366 
3367   // The following is basically a call_VM. However, we need the precise
3368   // address of the call in order to generate an oopmap. Hence, we do all the
3369   // work ourselves.
3370 
3371   // Push thread argument and setup last_Java_sp
3372   __ get_thread(java_thread);
3373   __ push(java_thread);
3374   __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3375 
3376   // if this was not a poll_return then we need to correct the return address now.
3377   if (!cause_return) {
3378     __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3379     __ movptr(Address(rbp, wordSize), rax);
3380   }
3381 
3382   // do the call
3383   __ call(RuntimeAddress(call_ptr));
3384 
3385   // Set an oopmap for the call site.  This oopmap will map all
3386   // oop-registers and debug-info registers as callee-saved.  This
3387   // will allow deoptimization at this safepoint to find all possible
3388   // debug-info recordings, as well as let GC find all oops.
3389 
3390   oop_maps->add_gc_map( __ pc() - start, map);
3391 
3392   // Discard arg
3393   __ pop(rcx);
3394 
3395   Label noException;
3396 
3397   // Clear last_Java_sp again
3398   __ get_thread(java_thread);
3399   __ reset_last_Java_frame(java_thread, false, false);
3400 
3401   __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3402   __ jcc(Assembler::equal, noException);
3403 
3404   // Exception pending
3405   RegisterSaver::restore_live_registers(masm, save_vectors);
3406 
3407   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3408 
3409   __ bind(noException);
3410 
3411   // Normal exit, register restoring and exit
3412   RegisterSaver::restore_live_registers(masm, save_vectors);
3413 
3414   __ ret(0);
3415 
3416   // make sure all code is generated
3417   masm->flush();
3418 
3419   // Fill-out other meta info
3420   return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3421 }
3422 
3423 //
3424 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3425 //
3426 // Generate a stub that calls into vm to find out the proper destination
3427 // of a java call. All the argument registers are live at this point
3428 // but since this is generic code we don't know what they are and the caller
3429 // must do any gc of the args.
3430 //
3431 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3432   assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3433 
3434   // allocate space for the code
3435   ResourceMark rm;
3436 
3437   CodeBuffer buffer(name, 1000, 512);
3438   MacroAssembler* masm                = new MacroAssembler(&buffer);
3439 
3440   int frame_size_words;
3441   enum frame_layout {
3442                 thread_off,
3443                 extra_words };
3444 
3445   OopMapSet *oop_maps = new OopMapSet();
3446   OopMap* map = NULL;
3447 
3448   int start = __ offset();
3449 
3450   map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3451 
3452   int frame_complete = __ offset();
3453 
3454   const Register thread = rdi;
3455   __ get_thread(rdi);
3456 
3457   __ push(thread);
3458   __ set_last_Java_frame(thread, noreg, rbp, NULL);
3459 
3460   __ call(RuntimeAddress(destination));
3461 
3462 
3463   // Set an oopmap for the call site.
3464   // We need this not only for callee-saved registers, but also for volatile
3465   // registers that the compiler might be keeping live across a safepoint.
3466 
3467   oop_maps->add_gc_map( __ offset() - start, map);
3468 
3469   // rax, contains the address we are going to jump to assuming no exception got installed
3470 
3471   __ addptr(rsp, wordSize);
3472 
3473   // clear last_Java_sp
3474   __ reset_last_Java_frame(thread, true, false);
3475   // check for pending exceptions
3476   Label pending;
3477   __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3478   __ jcc(Assembler::notEqual, pending);
3479 
3480   // get the returned Method*
3481   __ get_vm_result_2(rbx, thread);
3482   __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3483 
3484   __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3485 
3486   RegisterSaver::restore_live_registers(masm);
3487 
3488   // We are back the the original state on entry and ready to go.
3489 
3490   __ jmp(rax);
3491 
3492   // Pending exception after the safepoint
3493 
3494   __ bind(pending);
3495 
3496   RegisterSaver::restore_live_registers(masm);
3497 
3498   // exception pending => remove activation and forward to exception handler
3499 
3500   __ get_thread(thread);
3501   __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3502   __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3503   __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3504 
3505   // -------------
3506   // make sure all code is generated
3507   masm->flush();
3508 
3509   // return the  blob
3510   // frame_size_words or bytes??
3511   return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3512 }
--- EOF ---