src/cpu/ppc/vm/ppc.ad
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rev 5808 : 8030863: PPC64: (part 220): ConstantTableBase for calls between args and jvms
*** 3561,3573 ****
__ bl((address) __ pc());
%}
// postalloc expand emitter for virtual calls.
enc_class postalloc_expand_java_dynamic_call_sched(method meth, iRegLdst toc) %{
- // Toc is in return address field, though not accessible via postalloc_expand
- // functionaliy.
- Node *toc = in(TypeFunc::ReturnAdr);
// Create the nodes for loading the IC from the TOC.
loadConLNodesTuple loadConLNodes_IC =
loadConLNodesTuple_create(C, ra_, n_toc, new (C) immLOper((jlong)Universe::non_oop_word()),
OptoReg::Name(R19_H_num), OptoReg::Name(R19_num));
--- 3561,3570 ----
*** 3590,3616 ****
call->_nesting = _nesting;
// New call needs all inputs of old call.
// Req...
for (uint i = 0; i < req(); ++i) {
- if (i != TypeFunc::ReturnAdr) {
- call->add_req(in(i));
- } else {
// The expanded node does not need toc any more.
! call->add_req(C->top());
}
}
// ...as well as prec
! for (uint i = req(); i < len() ; ++i) {
call->add_prec(in(i));
}
- // The cache must come before the call, but it's not a req edge.
- // GL: actually it should be a req edge to express that the
- // register must be live in the Call. But as R19 is declared to be
- // the inline_cache_reg that's fine.
- call->add_prec(loadConLNodes_IC._last);
// Remember nodes loading the inline cache into r19.
call->_load_ic_hi_node = loadConLNodes_IC._large_hi;
call->_load_ic_node = loadConLNodes_IC._small;
// Operands for new nodes.
--- 3587,3611 ----
call->_nesting = _nesting;
// New call needs all inputs of old call.
// Req...
for (uint i = 0; i < req(); ++i) {
// The expanded node does not need toc any more.
! // Add the inline cache constant here instead. This expresses the
! // register of the inline cache must be live at the call.
! // Else we would have to adapt JVMState by -1.
! if (i == mach_constant_base_node_input()) {
! call->add_req(loadConLNodes_IC._last);
! } else {
! call->add_req(in(i));
}
}
// ...as well as prec
! for (uint i = req(); i < len(); ++i) {
call->add_prec(in(i));
}
// Remember nodes loading the inline cache into r19.
call->_load_ic_hi_node = loadConLNodes_IC._large_hi;
call->_load_ic_node = loadConLNodes_IC._small;
// Operands for new nodes.
*** 3636,3652 ****
#if 0
if (_vtable_index < 0) {
// Must be invalid_vtable_index, not nonvirtual_vtable_index.
assert(_vtable_index == Method::invalid_vtable_index, "correct sentinel value");
Register ic_reg = as_Register(Matcher::inline_cache_reg_encode());
! AddressLiteral oop = __ allocate_metadata_address((Metadata *)Universe::non_oop_word());
! address virtual_call_oop_addr = __ pc();
! __ load_const_from_method_toc(ic_reg, oop, Rtoc);
// CALL to fixup routine. Fixup routine uses ScopeDesc info
// to determine who we intended to call.
! __ relocate(virtual_call_Relocation::spec(virtual_call_oop_addr));
emit_call_with_trampoline_stub(_masm, (address)$meth$$method, relocInfo::none);
assert(((MachCallDynamicJavaNode*)this)->ret_addr_offset() == __ offset() - start_offset,
"Fix constant in ret_addr_offset()");
} else {
assert(!UseInlineCaches, "expect vtable calls only if not using ICs");
--- 3631,3647 ----
#if 0
if (_vtable_index < 0) {
// Must be invalid_vtable_index, not nonvirtual_vtable_index.
assert(_vtable_index == Method::invalid_vtable_index, "correct sentinel value");
Register ic_reg = as_Register(Matcher::inline_cache_reg_encode());
! AddressLiteral meta = __ allocate_metadata_address((Metadata *)Universe::non_oop_word());
! address virtual_call_meta_addr = __ pc();
! __ load_const_from_method_toc(ic_reg, meta, Rtoc);
// CALL to fixup routine. Fixup routine uses ScopeDesc info
// to determine who we intended to call.
! __ relocate(virtual_call_Relocation::spec(virtual_call_meta_addr));
emit_call_with_trampoline_stub(_masm, (address)$meth$$method, relocInfo::none);
assert(((MachCallDynamicJavaNode*)this)->ret_addr_offset() == __ offset() - start_offset,
"Fix constant in ret_addr_offset()");
} else {
assert(!UseInlineCaches, "expect vtable calls only if not using ICs");
*** 3672,3681 ****
--- 3667,3677 ----
}
assert(((MachCallDynamicJavaNode*)this)->ret_addr_offset() == __ offset() - start_offset,
"Fix constant in ret_addr_offset()");
}
#endif
+ guarantee(0, "Fix handling of toc edge: messes up derived/base pairs.");
Unimplemented(); // ret_addr_offset not yet fixed. Depends on compressed oops (load klass!).
%}
// a runtime call
enc_class enc_java_to_runtime_call (method meth) %{
*** 3773,3792 ****
// New call needs all inputs of old call.
// Req...
for (uint i = 0; i < req(); ++i) {
! if (i != TypeFunc::ReturnAdr) {
call->add_req(in(i));
- } else {
- // put the mtctr where ReturnAdr would be
- call->add_req(mtctr);
}
}
// These must be reqired edges, as the registers are live up to
// the call. Else the constants are handled as kills.
call->add_req(loadConLNodes_Env._last);
call->add_req(loadConLNodes_Toc._last);
// ...as well as prec
for (uint i = req(); i < len(); ++i) {
--- 3769,3786 ----
// New call needs all inputs of old call.
// Req...
for (uint i = 0; i < req(); ++i) {
! if (i != mach_constant_base_node_input()) {
call->add_req(in(i));
}
}
// These must be reqired edges, as the registers are live up to
// the call. Else the constants are handled as kills.
+ call->add_req(mtctr);
call->add_req(loadConLNodes_Env._last);
call->add_req(loadConLNodes_Toc._last);
// ...as well as prec
for (uint i = req(); i < len(); ++i) {
*** 3816,3826 ****
stack_direction(TOWARDS_LOW);
// These two registers define part of the calling convention between
// compiled code and the interpreter.
! // Inline Cache Register or methodOop for I2C.
inline_cache_reg(R19); // R19_method
// Method Oop Register when calling interpreter.
interpreter_method_oop_reg(R19); // R19_method
--- 3810,3820 ----
stack_direction(TOWARDS_LOW);
// These two registers define part of the calling convention between
// compiled code and the interpreter.
! // Inline Cache Register or method for I2C.
inline_cache_reg(R19); // R19_method
// Method Oop Register when calling interpreter.
interpreter_method_oop_reg(R19); // R19_method
*** 6147,6158 ****
format %{ "LD $dst, offset, $base \t// load ptr $src from TOC (lo)" %}
size(4);
ins_encode %{
// TODO: PPC port $archOpcode(ppc64Opcode_ld);
! int offset = ra_->C->in_scratch_emit_size() ? 0 : MacroAssembler::largeoffset_si16_si16_lo(_const_toc_offset_hi_node->_const_toc_offset);
! __ ld($dst$$Register, offset, $base$$Register);
%}
ins_pipe(pipe_class_memory);
%}
// Load pointer constant from constant table. Expand in case an
--- 6141,6152 ----
format %{ "LD $dst, offset, $base \t// load ptr $src from TOC (lo)" %}
size(4);
ins_encode %{
// TODO: PPC port $archOpcode(ppc64Opcode_ld);
! int offset = ra_->C->in_scratch_emit_size() ? 0 : _const_toc_offset_hi_node->_const_toc_offset;
! __ ld($dst$$Register, MacroAssembler::largeoffset_si16_si16_lo(offset), $base$$Register);
%}
ins_pipe(pipe_class_memory);
%}
// Load pointer constant from constant table. Expand in case an