src/cpu/ppc/vm/ppc.ad
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rev 6042 : 8035970: PPC64: fix ad file after 8027754: Enable loop optimizations for loops with MathExact
@@ -2358,22 +2358,10 @@
const RegMask Matcher::method_handle_invoke_SP_save_mask() {
return RegMask();
}
-const RegMask Matcher::mathExactI_result_proj_mask() {
- return RARG4_BITS64_REG_mask();
-}
-
-const RegMask Matcher::mathExactL_result_proj_mask() {
- return RARG4_BITS64_REG_mask();
-}
-
-const RegMask Matcher::mathExactI_flags_proj_mask() {
- return INT_FLAGS_mask();
-}
-
%}
//----------ENCODING BLOCK-----------------------------------------------------
// This block specifies the encoding classes used by the compiler to output
// byte streams. Encoding classes are parameterized macros used by
@@ -7570,20 +7558,10 @@
%}
//----------Arithmetic Instructions--------------------------------------------
// Addition Instructions
-// PPC has no instruction setting overflow of 32-bit integer.
-//instruct addExactI_rReg(rarg4RegI dst, rRegI src, flagsReg cr) %{
-// match(AddExactI dst src);
-// effect(DEF cr);
-//
-// format %{ "ADD $dst, $dst, $src \t// addExact int, sets $cr" %}
-// ins_encode( enc_add(dst, dst, src) );
-// ins_pipe(pipe_class_default);
-//%}
-
// Register Addition
instruct addI_reg_reg(iRegIdst dst, iRegIsrc_iRegL2Isrc src1, iRegIsrc_iRegL2Isrc src2) %{
match(Set dst (AddI src1 src2));
format %{ "ADD $dst, $src1, $src2" %}
size(4);