src/os_cpu/bsd_x86/vm/orderAccess_bsd_x86.inline.hpp

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rev 6670 : 8049325: Introduce and clean up umbrella headers for the files in the cpu subdirectories.
Reviewed-by: lfoltan, coleenp, dholmes
   1 /*
   2  * Copyright (c) 2003, 2013, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_INLINE_HPP
  26 #define OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_INLINE_HPP
  27 
  28 #include "runtime/atomic.inline.hpp"
  29 #include "runtime/orderAccess.hpp"
  30 #include "runtime/os.hpp"
  31 #include "vm_version_x86.hpp"
  32 
  33 // Implementation of class OrderAccess.
  34 
  35 inline void OrderAccess::loadload()   { acquire(); }
  36 inline void OrderAccess::storestore() { release(); }
  37 inline void OrderAccess::loadstore()  { acquire(); }
  38 inline void OrderAccess::storeload()  { fence(); }
  39 
  40 inline void OrderAccess::acquire() {
  41   volatile intptr_t local_dummy;
  42 #ifdef AMD64
  43   __asm__ volatile ("movq 0(%%rsp), %0" : "=r" (local_dummy) : : "memory");
  44 #else
  45   __asm__ volatile ("movl 0(%%esp),%0" : "=r" (local_dummy) : : "memory");
  46 #endif // AMD64
  47 }
  48 
  49 inline void OrderAccess::release() {
  50   // Avoid hitting the same cache-line from
  51   // different threads.


   1 /*
   2  * Copyright (c) 2003, 2014, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #ifndef OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_INLINE_HPP
  26 #define OS_CPU_BSD_X86_VM_ORDERACCESS_BSD_X86_INLINE_HPP
  27 
  28 #include "runtime/atomic.inline.hpp"
  29 #include "runtime/orderAccess.hpp"
  30 #include "runtime/os.hpp"

  31 
  32 // Implementation of class OrderAccess.
  33 
  34 inline void OrderAccess::loadload()   { acquire(); }
  35 inline void OrderAccess::storestore() { release(); }
  36 inline void OrderAccess::loadstore()  { acquire(); }
  37 inline void OrderAccess::storeload()  { fence(); }
  38 
  39 inline void OrderAccess::acquire() {
  40   volatile intptr_t local_dummy;
  41 #ifdef AMD64
  42   __asm__ volatile ("movq 0(%%rsp), %0" : "=r" (local_dummy) : : "memory");
  43 #else
  44   __asm__ volatile ("movl 0(%%esp),%0" : "=r" (local_dummy) : : "memory");
  45 #endif // AMD64
  46 }
  47 
  48 inline void OrderAccess::release() {
  49   // Avoid hitting the same cache-line from
  50   // different threads.