1919   if (src_lo_rc == rc_float && dst_lo_rc == rc_stack) {
1920     if (src_hi != OptoReg::Bad) {
1921       return ppc64Opcode_stfd;
1922     } else {
1923       return ppc64Opcode_stfs;
1924     }
1925   }
1926 
1927   // Check for float load.
1928   if (dst_lo_rc == rc_float && src_lo_rc == rc_stack) {
1929     if (src_hi != OptoReg::Bad) {
1930       return ppc64Opcode_lfd;
1931     } else {
1932       return ppc64Opcode_lfs;
1933     }
1934   }
1935 
1936   // --------------------------------------------------------------------
1937   // Check for hi bits still needing moving. Only happens for misaligned
1938   // arguments to native calls.
1939   if (src_hi == dst_hi)
1940     return ppc64Opcode_none;               // Self copy; no move.

1941 
1942   ShouldNotReachHere();
1943   return ppc64Opcode_undefined;
1944 }
1945 #endif // PPC port
1946 
1947 #ifndef PRODUCT
1948 void MachNopNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1949   st->print("NOP \t// %d nops to pad for loops.", _count);
1950 }
1951 #endif
1952 
1953 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *) const {
1954   MacroAssembler _masm(&cbuf);
1955   // _count contains the number of nops needed for padding.
1956   for (int i = 0; i < _count; i++) {
1957     __ nop();
1958   }
1959 }
1960 
1961 uint MachNopNode::size(PhaseRegAlloc *ra_) const {
1962    return _count * 4;
1963 }
1964 
1965 #ifndef PRODUCT
1966 void BoxLockNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1967   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
1968   int reg = ra_->get_reg_first(this);
1969   st->print("ADDI %s, SP, %d \t// box node", Matcher::regName[reg], offset);

1970 }
1971 #endif
1972 
1973 void BoxLockNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
1974   MacroAssembler _masm(&cbuf);
1975 
1976   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
1977   int reg    = ra_->get_encode(this);
1978 
1979   if (Assembler::is_simm(offset, 16)) {
1980     __ addi(as_Register(reg), R1, offset);
1981   } else {
1982     ShouldNotReachHere();
1983   }
1984 }
1985 
1986 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
1987   // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
1988   return 4;
1989 }

1919   if (src_lo_rc == rc_float && dst_lo_rc == rc_stack) {
1920     if (src_hi != OptoReg::Bad) {
1921       return ppc64Opcode_stfd;
1922     } else {
1923       return ppc64Opcode_stfs;
1924     }
1925   }
1926 
1927   // Check for float load.
1928   if (dst_lo_rc == rc_float && src_lo_rc == rc_stack) {
1929     if (src_hi != OptoReg::Bad) {
1930       return ppc64Opcode_lfd;
1931     } else {
1932       return ppc64Opcode_lfs;
1933     }
1934   }
1935 
1936   // --------------------------------------------------------------------
1937   // Check for hi bits still needing moving. Only happens for misaligned
1938   // arguments to native calls.
1939   if (src_hi == dst_hi) {
1940     return ppc64Opcode_none;               // Self copy; no move.
1941   }
1942 
1943   ShouldNotReachHere();
1944   return ppc64Opcode_undefined;
1945 }
1946 #endif // PPC port
1947 
1948 #ifndef PRODUCT
1949 void MachNopNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1950   st->print("NOP \t// %d nops to pad for loops.", _count);
1951 }
1952 #endif
1953 
1954 void MachNopNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *) const {
1955   MacroAssembler _masm(&cbuf);
1956   // _count contains the number of nops needed for padding.
1957   for (int i = 0; i < _count; i++) {
1958     __ nop();
1959   }
1960 }
1961 
1962 uint MachNopNode::size(PhaseRegAlloc *ra_) const {
1963   return _count * 4;
1964 }
1965 
1966 #ifndef PRODUCT
1967 void BoxLockNode::format(PhaseRegAlloc *ra_, outputStream *st) const {
1968   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
1969   char reg_str[128];
1970   ra_->dump_register(this, reg_str);
1971   st->print("ADDI    %s, SP, %d \t// box node", reg_str, offset);
1972 }
1973 #endif
1974 
1975 void BoxLockNode::emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {
1976   MacroAssembler _masm(&cbuf);
1977 
1978   int offset = ra_->reg2offset(in_RegMask(0).find_first_elem());
1979   int reg    = ra_->get_encode(this);
1980 
1981   if (Assembler::is_simm(offset, 16)) {
1982     __ addi(as_Register(reg), R1, offset);
1983   } else {
1984     ShouldNotReachHere();
1985   }
1986 }
1987 
1988 uint BoxLockNode::size(PhaseRegAlloc *ra_) const {
1989   // BoxLockNode is not a MachNode, so we can't just call MachNode::size(ra_).
1990   return 4;
1991 }