1 /* 2 * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved. 3 * Copyright 2012, 2015 SAP AG. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "asm/assembler.inline.hpp" 28 #include "asm/macroAssembler.inline.hpp" 29 #include "compiler/disassembler.hpp" 30 #include "memory/resourceArea.hpp" 31 #include "runtime/java.hpp" 32 #include "runtime/os.hpp" 33 #include "runtime/stubCodeGenerator.hpp" 34 #include "utilities/defaultStream.hpp" 35 #include "vm_version_ppc.hpp" 36 37 # include <sys/sysinfo.h> 38 39 int VM_Version::_features = VM_Version::unknown_m; 40 int VM_Version::_measured_cache_line_size = 128; // default value 41 const char* VM_Version::_features_str = ""; 42 bool VM_Version::_is_determine_features_test_running = false; 43 44 45 #define MSG(flag) \ 46 if (flag && !FLAG_IS_DEFAULT(flag)) \ 47 jio_fprintf(defaultStream::error_stream(), \ 48 "warning: -XX:+" #flag " requires -XX:+UseSIGTRAP\n" \ 49 " -XX:+" #flag " will be disabled!\n"); 50 51 void VM_Version::initialize() { 52 53 // Test which instructions are supported and measure cache line size. 54 determine_features(); 55 56 // If PowerArchitecturePPC64 hasn't been specified explicitly determine from features. 57 if (FLAG_IS_DEFAULT(PowerArchitecturePPC64)) { 58 if (VM_Version::has_popcntw()) { 59 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 7); 60 } else if (VM_Version::has_cmpb()) { 61 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 6); 62 } else if (VM_Version::has_popcntb()) { 63 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 5); 64 } else { 65 FLAG_SET_ERGO(uintx, PowerArchitecturePPC64, 0); 66 } 67 } 68 guarantee(PowerArchitecturePPC64 == 0 || PowerArchitecturePPC64 == 5 || 69 PowerArchitecturePPC64 == 6 || PowerArchitecturePPC64 == 7, 70 "PowerArchitecturePPC64 should be 0, 5, 6 or 7"); 71 72 if (!UseSIGTRAP) { 73 MSG(TrapBasedICMissChecks); 74 MSG(TrapBasedNotEntrantChecks); 75 MSG(TrapBasedNullChecks); 76 FLAG_SET_ERGO(bool, TrapBasedNotEntrantChecks, false); 77 FLAG_SET_ERGO(bool, TrapBasedNullChecks, false); 78 FLAG_SET_ERGO(bool, TrapBasedICMissChecks, false); 79 } 80 81 #ifdef COMPILER2 82 if (!UseSIGTRAP) { 83 MSG(TrapBasedRangeChecks); 84 FLAG_SET_ERGO(bool, TrapBasedRangeChecks, false); 85 } 86 87 // On Power6 test for section size. 88 if (PowerArchitecturePPC64 == 6) { 89 determine_section_size(); 90 // TODO: PPC port } else { 91 // TODO: PPC port PdScheduling::power6SectorSize = 0x20; 92 } 93 94 MaxVectorSize = 8; 95 #endif 96 97 // Create and print feature-string. 98 char buf[(num_features+1) * 16]; // Max 16 chars per feature. 99 jio_snprintf(buf, sizeof(buf), 100 "ppc64%s%s%s%s%s%s%s%s", 101 (has_fsqrt() ? " fsqrt" : ""), 102 (has_isel() ? " isel" : ""), 103 (has_lxarxeh() ? " lxarxeh" : ""), 104 (has_cmpb() ? " cmpb" : ""), 105 //(has_mftgpr()? " mftgpr" : ""), 106 (has_popcntb() ? " popcntb" : ""), 107 (has_popcntw() ? " popcntw" : ""), 108 (has_fcfids() ? " fcfids" : ""), 109 (has_vand() ? " vand" : "") 110 // Make sure number of %s matches num_features! 111 ); 112 _features_str = os::strdup(buf); 113 NOT_PRODUCT(if (Verbose) print_features();); 114 115 // PPC64 supports 8-byte compare-exchange operations (see 116 // Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr) 117 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). 118 _supports_cx8 = true; 119 120 UseSSE = 0; // Only on x86 and x64 121 122 intx cache_line_size = _measured_cache_line_size; 123 124 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) AllocatePrefetchStyle = 1; 125 126 if (AllocatePrefetchStyle == 4) { 127 AllocatePrefetchStepSize = cache_line_size; // Need exact value. 128 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 12; // Use larger blocks by default. 129 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 2*cache_line_size; // Default is not defined? 130 } else { 131 if (cache_line_size > AllocatePrefetchStepSize) AllocatePrefetchStepSize = cache_line_size; 132 if (FLAG_IS_DEFAULT(AllocatePrefetchLines)) AllocatePrefetchLines = 3; // Optimistic value. 133 if (AllocatePrefetchDistance < 0) AllocatePrefetchDistance = 3*cache_line_size; // Default is not defined? 134 } 135 136 assert(AllocatePrefetchLines > 0, "invalid value"); 137 if (AllocatePrefetchLines < 1) { // Set valid value in product VM. 138 AllocatePrefetchLines = 1; // Conservative value. 139 } 140 141 if (AllocatePrefetchStyle == 3 && AllocatePrefetchDistance < cache_line_size) { 142 AllocatePrefetchStyle = 1; // Fall back if inappropriate. 143 } 144 145 assert(AllocatePrefetchStyle >= 0, "AllocatePrefetchStyle should be positive"); 146 147 if (UseCRC32Intrinsics) { 148 if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics)) 149 warning("CRC32 intrinsics are not available on this CPU"); 150 FLAG_SET_DEFAULT(UseCRC32Intrinsics, false); 151 } 152 153 // The AES intrinsic stubs require AES instruction support. 154 if (UseAES) { 155 warning("AES instructions are not available on this CPU"); 156 FLAG_SET_DEFAULT(UseAES, false); 157 } 158 if (UseAESIntrinsics) { 159 if (!FLAG_IS_DEFAULT(UseAESIntrinsics)) 160 warning("AES intrinsics are not available on this CPU"); 161 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 162 } 163 164 if (UseSHA) { 165 warning("SHA instructions are not available on this CPU"); 166 FLAG_SET_DEFAULT(UseSHA, false); 167 } 168 if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) { 169 warning("SHA intrinsics are not available on this CPU"); 170 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); 171 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); 172 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); 173 } 174 175 // This machine does not allow unaligned memory accesses 176 if (UseUnalignedAccesses) { 177 if (!FLAG_IS_DEFAULT(UseUnalignedAccesses)) 178 warning("Unaligned memory access is not available on this CPU"); 179 FLAG_SET_DEFAULT(UseUnalignedAccesses, false); 180 } 181 } 182 183 void VM_Version::print_features() { 184 tty->print_cr("Version: %s cache_line_size = %d", cpu_features(), (int) get_cache_line_size()); 185 } 186 187 #ifdef COMPILER2 188 // Determine section size on power6: If section size is 8 instructions, 189 // there should be a difference between the two testloops of ~15 %. If 190 // no difference is detected the section is assumed to be 32 instructions. 191 void VM_Version::determine_section_size() { 192 193 int unroll = 80; 194 195 const int code_size = (2* unroll * 32 + 100)*BytesPerInstWord; 196 197 // Allocate space for the code. 198 ResourceMark rm; 199 CodeBuffer cb("detect_section_size", code_size, 0); 200 MacroAssembler* a = new MacroAssembler(&cb); 201 202 uint32_t *code = (uint32_t *)a->pc(); 203 // Emit code. 204 void (*test1)() = (void(*)())(void *)a->function_entry(); 205 206 Label l1; 207 208 a->li(R4, 1); 209 a->sldi(R4, R4, 28); 210 a->b(l1); 211 a->align(CodeEntryAlignment); 212 213 a->bind(l1); 214 215 for (int i = 0; i < unroll; i++) { 216 // Schleife 1 217 // ------- sector 0 ------------ 218 // ;; 0 219 a->nop(); // 1 220 a->fpnop0(); // 2 221 a->fpnop1(); // 3 222 a->addi(R4,R4, -1); // 4 223 224 // ;; 1 225 a->nop(); // 5 226 a->fmr(F6, F6); // 6 227 a->fmr(F7, F7); // 7 228 a->endgroup(); // 8 229 // ------- sector 8 ------------ 230 231 // ;; 2 232 a->nop(); // 9 233 a->nop(); // 10 234 a->fmr(F8, F8); // 11 235 a->fmr(F9, F9); // 12 236 237 // ;; 3 238 a->nop(); // 13 239 a->fmr(F10, F10); // 14 240 a->fmr(F11, F11); // 15 241 a->endgroup(); // 16 242 // -------- sector 16 ------------- 243 244 // ;; 4 245 a->nop(); // 17 246 a->nop(); // 18 247 a->fmr(F15, F15); // 19 248 a->fmr(F16, F16); // 20 249 250 // ;; 5 251 a->nop(); // 21 252 a->fmr(F17, F17); // 22 253 a->fmr(F18, F18); // 23 254 a->endgroup(); // 24 255 // ------- sector 24 ------------ 256 257 // ;; 6 258 a->nop(); // 25 259 a->nop(); // 26 260 a->fmr(F19, F19); // 27 261 a->fmr(F20, F20); // 28 262 263 // ;; 7 264 a->nop(); // 29 265 a->fmr(F21, F21); // 30 266 a->fmr(F22, F22); // 31 267 a->brnop0(); // 32 268 269 // ------- sector 32 ------------ 270 } 271 272 // ;; 8 273 a->cmpdi(CCR0, R4, unroll); // 33 274 a->bge(CCR0, l1); // 34 275 a->blr(); 276 277 // Emit code. 278 void (*test2)() = (void(*)())(void *)a->function_entry(); 279 // uint32_t *code = (uint32_t *)a->pc(); 280 281 Label l2; 282 283 a->li(R4, 1); 284 a->sldi(R4, R4, 28); 285 a->b(l2); 286 a->align(CodeEntryAlignment); 287 288 a->bind(l2); 289 290 for (int i = 0; i < unroll; i++) { 291 // Schleife 2 292 // ------- sector 0 ------------ 293 // ;; 0 294 a->brnop0(); // 1 295 a->nop(); // 2 296 //a->cmpdi(CCR0, R4, unroll); 297 a->fpnop0(); // 3 298 a->fpnop1(); // 4 299 a->addi(R4,R4, -1); // 5 300 301 // ;; 1 302 303 a->nop(); // 6 304 a->fmr(F6, F6); // 7 305 a->fmr(F7, F7); // 8 306 // ------- sector 8 --------------- 307 308 // ;; 2 309 a->endgroup(); // 9 310 311 // ;; 3 312 a->nop(); // 10 313 a->nop(); // 11 314 a->fmr(F8, F8); // 12 315 316 // ;; 4 317 a->fmr(F9, F9); // 13 318 a->nop(); // 14 319 a->fmr(F10, F10); // 15 320 321 // ;; 5 322 a->fmr(F11, F11); // 16 323 // -------- sector 16 ------------- 324 325 // ;; 6 326 a->endgroup(); // 17 327 328 // ;; 7 329 a->nop(); // 18 330 a->nop(); // 19 331 a->fmr(F15, F15); // 20 332 333 // ;; 8 334 a->fmr(F16, F16); // 21 335 a->nop(); // 22 336 a->fmr(F17, F17); // 23 337 338 // ;; 9 339 a->fmr(F18, F18); // 24 340 // -------- sector 24 ------------- 341 342 // ;; 10 343 a->endgroup(); // 25 344 345 // ;; 11 346 a->nop(); // 26 347 a->nop(); // 27 348 a->fmr(F19, F19); // 28 349 350 // ;; 12 351 a->fmr(F20, F20); // 29 352 a->nop(); // 30 353 a->fmr(F21, F21); // 31 354 355 // ;; 13 356 a->fmr(F22, F22); // 32 357 } 358 359 // -------- sector 32 ------------- 360 // ;; 14 361 a->cmpdi(CCR0, R4, unroll); // 33 362 a->bge(CCR0, l2); // 34 363 364 a->blr(); 365 uint32_t *code_end = (uint32_t *)a->pc(); 366 a->flush(); 367 368 double loop1_seconds,loop2_seconds, rel_diff; 369 uint64_t start1, stop1; 370 371 start1 = os::current_thread_cpu_time(false); 372 (*test1)(); 373 stop1 = os::current_thread_cpu_time(false); 374 loop1_seconds = (stop1- start1) / (1000 *1000 *1000.0); 375 376 377 start1 = os::current_thread_cpu_time(false); 378 (*test2)(); 379 stop1 = os::current_thread_cpu_time(false); 380 381 loop2_seconds = (stop1 - start1) / (1000 *1000 *1000.0); 382 383 rel_diff = (loop2_seconds - loop1_seconds) / loop1_seconds *100; 384 385 if (PrintAssembly) { 386 ttyLocker ttyl; 387 tty->print_cr("Decoding section size detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 388 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 389 tty->print_cr("Time loop1 :%f", loop1_seconds); 390 tty->print_cr("Time loop2 :%f", loop2_seconds); 391 tty->print_cr("(time2 - time1) / time1 = %f %%", rel_diff); 392 393 if (rel_diff > 12.0) { 394 tty->print_cr("Section Size 8 Instructions"); 395 } else{ 396 tty->print_cr("Section Size 32 Instructions or Power5"); 397 } 398 } 399 400 #if 0 // TODO: PPC port 401 // Set sector size (if not set explicitly). 402 if (FLAG_IS_DEFAULT(Power6SectorSize128PPC64)) { 403 if (rel_diff > 12.0) { 404 PdScheduling::power6SectorSize = 0x20; 405 } else { 406 PdScheduling::power6SectorSize = 0x80; 407 } 408 } else if (Power6SectorSize128PPC64) { 409 PdScheduling::power6SectorSize = 0x80; 410 } else { 411 PdScheduling::power6SectorSize = 0x20; 412 } 413 #endif 414 if (UsePower6SchedulerPPC64) Unimplemented(); 415 } 416 #endif // COMPILER2 417 418 void VM_Version::determine_features() { 419 #if defined(ABI_ELFv2) 420 const int code_size = (num_features+1+2*7)*BytesPerInstWord; // TODO(asmundak): calculation is incorrect. 421 #else 422 // 7 InstWords for each call (function descriptor + blr instruction). 423 const int code_size = (num_features+1+2*7)*BytesPerInstWord; 424 #endif 425 int features = 0; 426 427 // create test area 428 enum { BUFFER_SIZE = 2*4*K }; // Needs to be >=2* max cache line size (cache line size can't exceed min page size). 429 char test_area[BUFFER_SIZE]; 430 char *mid_of_test_area = &test_area[BUFFER_SIZE>>1]; 431 432 // Allocate space for the code. 433 ResourceMark rm; 434 CodeBuffer cb("detect_cpu_features", code_size, 0); 435 MacroAssembler* a = new MacroAssembler(&cb); 436 437 // Must be set to true so we can generate the test code. 438 _features = VM_Version::all_features_m; 439 440 // Emit code. 441 void (*test)(address addr, uint64_t offset)=(void(*)(address addr, uint64_t offset))(void *)a->function_entry(); 442 uint32_t *code = (uint32_t *)a->pc(); 443 // Don't use R0 in ldarx. 444 // Keep R3_ARG1 unmodified, it contains &field (see below). 445 // Keep R4_ARG2 unmodified, it contains offset = 0 (see below). 446 a->fsqrt(F3, F4); // code[0] -> fsqrt_m 447 a->fsqrts(F3, F4); // code[1] -> fsqrts_m 448 a->isel(R7, R5, R6, 0); // code[2] -> isel_m 449 a->ldarx_unchecked(R7, R3_ARG1, R4_ARG2, 1); // code[3] -> lxarx_m 450 a->cmpb(R7, R5, R6); // code[4] -> bcmp 451 //a->mftgpr(R7, F3); // code[5] -> mftgpr 452 a->popcntb(R7, R5); // code[6] -> popcntb 453 a->popcntw(R7, R5); // code[7] -> popcntw 454 a->fcfids(F3, F4); // code[8] -> fcfids 455 a->vand(VR0, VR0, VR0); // code[9] -> vand 456 a->blr(); 457 458 // Emit function to set one cache line to zero. Emit function descriptor and get pointer to it. 459 void (*zero_cacheline_func_ptr)(char*) = (void(*)(char*))(void *)a->function_entry(); 460 a->dcbz(R3_ARG1); // R3_ARG1 = addr 461 a->blr(); 462 463 uint32_t *code_end = (uint32_t *)a->pc(); 464 a->flush(); 465 _features = VM_Version::unknown_m; 466 467 // Print the detection code. 468 if (PrintAssembly) { 469 ttyLocker ttyl; 470 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 471 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 472 } 473 474 // Measure cache line size. 475 memset(test_area, 0xFF, BUFFER_SIZE); // Fill test area with 0xFF. 476 (*zero_cacheline_func_ptr)(mid_of_test_area); // Call function which executes dcbz to the middle. 477 int count = 0; // count zeroed bytes 478 for (int i = 0; i < BUFFER_SIZE; i++) if (test_area[i] == 0) count++; 479 guarantee(is_power_of_2(count), "cache line size needs to be a power of 2"); 480 _measured_cache_line_size = count; 481 482 // Execute code. Illegal instructions will be replaced by 0 in the signal handler. 483 VM_Version::_is_determine_features_test_running = true; 484 (*test)((address)mid_of_test_area, (uint64_t)0); 485 VM_Version::_is_determine_features_test_running = false; 486 487 // determine which instructions are legal. 488 int feature_cntr = 0; 489 if (code[feature_cntr++]) features |= fsqrt_m; 490 if (code[feature_cntr++]) features |= fsqrts_m; 491 if (code[feature_cntr++]) features |= isel_m; 492 if (code[feature_cntr++]) features |= lxarxeh_m; 493 if (code[feature_cntr++]) features |= cmpb_m; 494 //if(code[feature_cntr++])features |= mftgpr_m; 495 if (code[feature_cntr++]) features |= popcntb_m; 496 if (code[feature_cntr++]) features |= popcntw_m; 497 if (code[feature_cntr++]) features |= fcfids_m; 498 if (code[feature_cntr++]) features |= vand_m; 499 500 // Print the detection code. 501 if (PrintAssembly) { 502 ttyLocker ttyl; 503 tty->print_cr("Decoding cpu-feature detection stub at " INTPTR_FORMAT " after execution:", p2i(code)); 504 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 505 } 506 507 _features = features; 508 } 509 510 511 static int saved_features = 0; 512 513 void VM_Version::allow_all() { 514 saved_features = _features; 515 _features = all_features_m; 516 } 517 518 void VM_Version::revert() { 519 _features = saved_features; 520 }