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src/cpu/ppc/vm/globals_ppc.hpp

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rev 8109 : 8077838: Recent developments for ppc.
Reviewed-by: kvn
   1 /*
   2  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright 2012, 2013 SAP AG. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *


  41 define_pd_global(bool, TrapBasedNullChecks,   true);
  42 define_pd_global(bool, UncommonNullCast,      true);  // Uncommon-trap NULLs passed to check cast.
  43 
  44 // Use large code-entry alignment.
  45 define_pd_global(intx, CodeEntryAlignment,    128);
  46 define_pd_global(intx, OptoLoopAlignment,     16);
  47 define_pd_global(intx, InlineFrequencyCount,  100);
  48 define_pd_global(intx, InlineSmallCode,       1500);
  49 
  50 define_pd_global(intx, PreInflateSpin,        10);
  51 
  52 // Flags for template interpreter.
  53 define_pd_global(bool, RewriteBytecodes,      true);
  54 define_pd_global(bool, RewriteFrequentPairs,  true);
  55 
  56 define_pd_global(bool, UseMembar,             false);
  57 
  58 // GC Ergo Flags
  59 define_pd_global(size_t, CMSYoungGenPerWorker, 16*M);  // Default max size of CMS young gen, per GC worker thread.
  60 
  61 define_pd_global(uintx, TypeProfileLevel, 0);
  62 
  63 // Platform dependent flag handling: flags only defined on this platform.
  64 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct)  \
  65                                                                             \
  66   /* Load poll address from thread. This is used to implement per-thread */ \
  67   /* safepoints on platforms != IA64. */                                    \
  68   product(bool, LoadPollAddressFromThread, false,                           \
  69           "Load polling page address from thread object (required for "     \
  70           "per-thread safepoints on platforms != IA64)")                    \
  71                                                                             \
  72   product(uintx, PowerArchitecturePPC64, 0,                                 \
  73           "CPU Version: x for PowerX. Currently recognizes Power5 to "      \
  74           "Power7. Default is 0. CPUs newer than Power7 will be "           \
  75           "recognized as Power7.")                                          \
  76                                                                             \
  77   /* Reoptimize code-sequences of calls at runtime, e.g. replace an */      \
  78   /* indirect call by a direct call.                                */      \
  79   product(bool, ReoptimizeCallSequences, true,                              \
  80           "Reoptimize code-sequences of calls at runtime.")                 \
  81                                                                             \













  82   product(bool, UseLoadInstructionsForStackBangingPPC64, false,             \
  83           "Use load instructions for stack banging.")                       \
  84                                                                             \
  85   /* special instructions */                                                \
  86                                                                             \
  87   product(bool, UseCountLeadingZerosInstructionsPPC64, true,                \
  88           "Use count leading zeros instructions.")                          \
  89                                                                             \
  90   product(bool, UseExtendedLoadAndReserveInstructionsPPC64, false,          \
  91           "Use extended versions of load-and-reserve instructions.")        \
  92                                                                             \
  93   product(bool, UseRotateAndMaskInstructionsPPC64, true,                    \
  94           "Use rotate and mask instructions.")                              \
  95                                                                             \
  96   product(bool, UseStaticBranchPredictionInCompareAndSwapPPC64, true,       \
  97           "Use static branch prediction hints in CAS operations.")          \
  98   product(bool, UseStaticBranchPredictionForUncommonPathsPPC64, false,      \
  99           "Use static branch prediction hints for uncommon paths.")         \
 100                                                                             \
 101   product(bool, UsePower6SchedulerPPC64, false,                             \


 104   product(bool, InsertEndGroupPPC64, false,                                 \
 105           "Insert EndGroup instructions to optimize for Power6.")           \
 106                                                                             \
 107   /* Trap based checks. */                                                  \
 108   /* Trap based checks use the ppc trap instructions to check certain */    \
 109   /* conditions. This instruction raises a SIGTRAP caught by the      */    \
 110   /* exception handler of the VM.                                     */    \
 111   product(bool, UseSIGTRAP, true,                                           \
 112           "Allow trap instructions that make use of SIGTRAP. Use this to "  \
 113           "switch off all optimizations requiring SIGTRAP.")                \
 114   product(bool, TrapBasedICMissChecks, true,                                \
 115           "Raise and handle SIGTRAP if inline cache miss detected.")        \
 116   product(bool, TrapBasedNotEntrantChecks, true,                            \
 117           "Raise and handle SIGTRAP if calling not entrant or zombie"       \
 118           " method.")                                                       \
 119   product(bool, TraceTraps, false, "Trace all traps the signal handler"     \
 120           "handles.")                                                       \
 121                                                                             \
 122   product(bool, ZapMemory, false, "Write 0x0101... to empty memory."        \
 123           " Use this to ease debugging.")                                   \
 124 



































 125 
 126 #endif // CPU_PPC_VM_GLOBALS_PPC_HPP
   1 /*
   2  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright 2012, 2015 SAP AG. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *


  41 define_pd_global(bool, TrapBasedNullChecks,   true);
  42 define_pd_global(bool, UncommonNullCast,      true);  // Uncommon-trap NULLs passed to check cast.
  43 
  44 // Use large code-entry alignment.
  45 define_pd_global(intx, CodeEntryAlignment,    128);
  46 define_pd_global(intx, OptoLoopAlignment,     16);
  47 define_pd_global(intx, InlineFrequencyCount,  100);
  48 define_pd_global(intx, InlineSmallCode,       1500);
  49 
  50 define_pd_global(intx, PreInflateSpin,        10);
  51 
  52 // Flags for template interpreter.
  53 define_pd_global(bool, RewriteBytecodes,      true);
  54 define_pd_global(bool, RewriteFrequentPairs,  true);
  55 
  56 define_pd_global(bool, UseMembar,             false);
  57 
  58 // GC Ergo Flags
  59 define_pd_global(size_t, CMSYoungGenPerWorker, 16*M);  // Default max size of CMS young gen, per GC worker thread.
  60 
  61 define_pd_global(uintx, TypeProfileLevel, 111);
  62 
  63 // Platform dependent flag handling: flags only defined on this platform.
  64 #define ARCH_FLAGS(develop, product, diagnostic, experimental, notproduct)  \
  65                                                                             \
  66   /* Load poll address from thread. This is used to implement per-thread */ \
  67   /* safepoints on platforms != IA64. */                                    \
  68   product(bool, LoadPollAddressFromThread, false,                           \
  69           "Load polling page address from thread object (required for "     \
  70           "per-thread safepoints on platforms != IA64)")                    \
  71                                                                             \
  72   product(uintx, PowerArchitecturePPC64, 0,                                 \
  73           "CPU Version: x for PowerX. Currently recognizes Power5 to "      \
  74           "Power8. Default is 0. Newer CPUs will be recognized as Power8.") \

  75                                                                             \
  76   /* Reoptimize code-sequences of calls at runtime, e.g. replace an */      \
  77   /* indirect call by a direct call.                                */      \
  78   product(bool, ReoptimizeCallSequences, true,                              \
  79           "Reoptimize code-sequences of calls at runtime.")                 \
  80                                                                             \
  81   /* Power 8: Configure Data Stream Control Register. */                    \
  82   product(uint64_t,DSCR_PPC64, (uintx)-1,                                   \
  83           "Power8 or later: Specify encoded value for Data Stream Control " \
  84           "Register")                                                       \
  85   product(uint64_t,DSCR_DPFD_PPC64, 8,                                      \
  86           "Power8 or later: DPFD (default prefetch depth) value of the "    \
  87           "Data Stream Control Register."                                   \
  88           " 0: hardware default, 1: none, 2-7: min-max, 8: don't touch")    \
  89   product(uint64_t,DSCR_URG_PPC64, 8,                                       \
  90           "Power8 or later: URG (depth attainment urgency) value of the "   \
  91           "Data Stream Control Register."                                   \
  92           " 0: hardware default, 1: none, 2-7: min-max, 8: don't touch")    \
  93                                                                             \
  94   product(bool, UseLoadInstructionsForStackBangingPPC64, false,             \
  95           "Use load instructions for stack banging.")                       \
  96                                                                             \
  97   /* special instructions */                                                \
  98                                                                             \
  99   product(bool, UseCountLeadingZerosInstructionsPPC64, true,                \
 100           "Use count leading zeros instructions.")                          \
 101                                                                             \
 102   product(bool, UseExtendedLoadAndReserveInstructionsPPC64, false,          \
 103           "Use extended versions of load-and-reserve instructions.")        \
 104                                                                             \
 105   product(bool, UseRotateAndMaskInstructionsPPC64, true,                    \
 106           "Use rotate and mask instructions.")                              \
 107                                                                             \
 108   product(bool, UseStaticBranchPredictionInCompareAndSwapPPC64, true,       \
 109           "Use static branch prediction hints in CAS operations.")          \
 110   product(bool, UseStaticBranchPredictionForUncommonPathsPPC64, false,      \
 111           "Use static branch prediction hints for uncommon paths.")         \
 112                                                                             \
 113   product(bool, UsePower6SchedulerPPC64, false,                             \


 116   product(bool, InsertEndGroupPPC64, false,                                 \
 117           "Insert EndGroup instructions to optimize for Power6.")           \
 118                                                                             \
 119   /* Trap based checks. */                                                  \
 120   /* Trap based checks use the ppc trap instructions to check certain */    \
 121   /* conditions. This instruction raises a SIGTRAP caught by the      */    \
 122   /* exception handler of the VM.                                     */    \
 123   product(bool, UseSIGTRAP, true,                                           \
 124           "Allow trap instructions that make use of SIGTRAP. Use this to "  \
 125           "switch off all optimizations requiring SIGTRAP.")                \
 126   product(bool, TrapBasedICMissChecks, true,                                \
 127           "Raise and handle SIGTRAP if inline cache miss detected.")        \
 128   product(bool, TrapBasedNotEntrantChecks, true,                            \
 129           "Raise and handle SIGTRAP if calling not entrant or zombie"       \
 130           " method.")                                                       \
 131   product(bool, TraceTraps, false, "Trace all traps the signal handler"     \
 132           "handles.")                                                       \
 133                                                                             \
 134   product(bool, ZapMemory, false, "Write 0x0101... to empty memory."        \
 135           " Use this to ease debugging.")                                   \
 136                                                                             \
 137   /* Use Restricted Transactional Memory for lock eliding */                \
 138   product(bool, UseRTMLocking, false,                                       \
 139           "Enable RTM lock eliding for inflated locks in compiled code")    \
 140                                                                             \
 141   experimental(bool, UseRTMForStackLocks, false,                            \
 142           "Enable RTM lock eliding for stack locks in compiled code")       \
 143                                                                             \
 144   product(bool, UseRTMDeopt, false,                                         \
 145           "Perform deopt and recompilation based on RTM abort ratio")       \
 146                                                                             \
 147   product(uintx, RTMRetryCount, 5,                                          \
 148           "Number of RTM retries on lock abort or busy")                    \
 149                                                                             \
 150   experimental(intx, RTMSpinLoopCount, 100,                                 \
 151           "Spin count for lock to become free before RTM retry")            \
 152                                                                             \
 153   experimental(intx, RTMAbortThreshold, 1000,                               \
 154           "Calculate abort ratio after this number of aborts")              \
 155                                                                             \
 156   experimental(intx, RTMLockingThreshold, 10000,                            \
 157           "Lock count at which to do RTM lock eliding without "             \
 158           "abort ratio calculation")                                        \
 159                                                                             \
 160   experimental(intx, RTMAbortRatio, 50,                                     \
 161           "Lock abort ratio at which to stop use RTM lock eliding")         \
 162                                                                             \
 163   experimental(intx, RTMTotalCountIncrRate, 64,                             \
 164           "Increment total RTM attempted lock count once every n times")    \
 165                                                                             \
 166   experimental(intx, RTMLockingCalculationDelay, 0,                         \
 167           "Number of milliseconds to wait before start calculating aborts " \
 168           "for RTM locking")                                                \
 169                                                                             \
 170   experimental(bool, UseRTMXendForLockBusy, true,                           \
 171           "Use RTM Xend instead of Xabort when lock busy")                  \
 172 
 173 #endif // CPU_PPC_VM_GLOBALS_PPC_HPP
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