1 /* 2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2014, Red Hat Inc. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #ifndef CPU_AARCH64_VM_GLOBALDEFINITIONS_AARCH64_HPP 27 #define CPU_AARCH64_VM_GLOBALDEFINITIONS_AARCH64_HPP 28 29 const int StackAlignmentInBytes = 16; 30 31 // Indicates whether the C calling conventions require that 32 // 32-bit integer argument values are properly extended to 64 bits. 33 // If set, SharedRuntime::c_calling_convention() must adapt 34 // signatures accordingly. 35 const bool CCallingConventionRequiresIntsAsLongs = true; 36 37 #define SUPPORTS_NATIVE_CX8 38 39 // The maximum B/BL offset range on AArch64 is 128MB. 40 #undef CODE_CACHE_DEFAULT_LIMIT 41 #define CODE_CACHE_DEFAULT_LIMIT (128*M) 42 43 // According to the ARMv8 ARM, "Concurrent modification and execution 44 // of instructions can lead to the resulting instruction performing 45 // any behavior that can be achieved by executing any sequence of 46 // instructions that can be executed from the same Exception level, 47 // except where the instruction before modification and the 48 // instruction after modification is a B, BL, NOP, BKPT, SVC, HVC, or 49 // SMC instruction." 50 // 51 // This makes the games we play when patching difficult, so when we 52 // come across an access that needs patching we deoptimize. There are 53 // ways we can avoid this, but these would slow down C1-compiled code 54 // in the defauilt case. We could revisit this decision if we get any 55 // evidence that it's worth doing. 56 #define DEOPTIMIZE_WHEN_PATCHING 57 58 #endif // CPU_AARCH64_VM_GLOBALDEFINITIONS_AARCH64_HPP