1 /*
   2  * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
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  24 
  25 #ifndef CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
  26 #define CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP
  27 
  28 const int StackAlignmentInBytes  = 16;
  29 
  30 #define SUPPORTS_NATIVE_CX8
  31 
  32 // The expected size in bytes of a cache line, used to pad data structures.
  33 #if defined(TIERED)
  34   #ifdef _LP64
  35     // tiered, 64-bit, large machine
  36     #define DEFAULT_CACHE_LINE_SIZE 128
  37   #else
  38     // tiered, 32-bit, medium machine
  39     #define DEFAULT_CACHE_LINE_SIZE 64
  40   #endif
  41 #elif defined(COMPILER1)
  42   // pure C1, 32-bit, small machine
  43   // i486 was the last Intel chip with 16-byte cache line size
  44   #define DEFAULT_CACHE_LINE_SIZE 32
  45 #elif defined(COMPILER2) || defined(SHARK)
  46   #ifdef _LP64
  47     // pure C2, 64-bit, large machine
  48     #define DEFAULT_CACHE_LINE_SIZE 128
  49   #else
  50     // pure C2, 32-bit, medium machine
  51     #define DEFAULT_CACHE_LINE_SIZE 64
  52   #endif
  53 #endif
  54 
  55 #if defined(COMPILER2) && !defined(JAVASE_EMBEDDED)
  56 // Include Restricted Transactional Memory lock eliding optimization
  57 #define INCLUDE_RTM_OPT 1
  58 #endif
  59 
  60 #endif // CPU_X86_VM_GLOBALDEFINITIONS_X86_HPP