1 /*
   2  * Copyright (c) 2002, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright 2012, 2015 SAP AG. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #ifndef CPU_PPC_VM_MACROASSEMBLER_PPC_HPP
  27 #define CPU_PPC_VM_MACROASSEMBLER_PPC_HPP
  28 
  29 #include "asm/assembler.hpp"
  30 #include "runtime/rtmLocking.hpp"
  31 #include "utilities/macros.hpp"
  32 
  33 // MacroAssembler extends Assembler by a few frequently used macros.
  34 
  35 class ciTypeArray;
  36 
  37 class MacroAssembler: public Assembler {
  38  public:
  39   MacroAssembler(CodeBuffer* code) : Assembler(code) {}
  40 
  41   //
  42   // Optimized instruction emitters
  43   //
  44 
  45   inline static int largeoffset_si16_si16_hi(int si31) { return (si31 + (1<<15)) >> 16; }
  46   inline static int largeoffset_si16_si16_lo(int si31) { return si31 - (((si31 + (1<<15)) >> 16) << 16); }
  47 
  48   // load d = *[a+si31]
  49   // Emits several instructions if the offset is not encodable in one instruction.
  50   void ld_largeoffset_unchecked(Register d, int si31, Register a, int emit_filler_nop);
  51   void ld_largeoffset          (Register d, int si31, Register a, int emit_filler_nop);
  52   inline static bool is_ld_largeoffset(address a);
  53   inline static int get_ld_largeoffset_offset(address a);
  54 
  55   inline void round_to(Register r, int modulus);
  56 
  57   // Load/store with type given by parameter.
  58   void load_sized_value( Register dst, RegisterOrConstant offs, Register base, size_t size_in_bytes, bool is_signed);
  59   void store_sized_value(Register dst, RegisterOrConstant offs, Register base, size_t size_in_bytes);
  60 
  61   // Move register if destination register and target register are different
  62   inline void mr_if_needed(Register rd, Register rs);
  63   inline void fmr_if_needed(FloatRegister rd, FloatRegister rs);
  64   // This is dedicated for emitting scheduled mach nodes. For better
  65   // readability of the ad file I put it here.
  66   // Endgroups are not needed if
  67   //  - the scheduler is off
  68   //  - the scheduler found that there is a natural group end, in that
  69   //    case it reduced the size of the instruction used in the test
  70   //    yielding 'needed'.
  71   inline void endgroup_if_needed(bool needed);
  72 
  73   // Memory barriers.
  74   inline void membar(int bits);
  75   inline void release();
  76   inline void acquire();
  77   inline void fence();
  78 
  79   // nop padding
  80   void align(int modulus, int max = 252, int rem = 0);
  81 
  82   //
  83   // Constants, loading constants, TOC support
  84   //
  85 
  86   // Address of the global TOC.
  87   inline static address global_toc();
  88   // Offset of given address to the global TOC.
  89   inline static int offset_to_global_toc(const address addr);
  90 
  91   // Address of TOC of the current method.
  92   inline address method_toc();
  93   // Offset of given address to TOC of the current method.
  94   inline int offset_to_method_toc(const address addr);
  95 
  96   // Global TOC.
  97   void calculate_address_from_global_toc(Register dst, address addr,
  98                                          bool hi16 = true, bool lo16 = true,
  99                                          bool add_relocation = true, bool emit_dummy_addr = false);
 100   inline void calculate_address_from_global_toc_hi16only(Register dst, address addr) {
 101     calculate_address_from_global_toc(dst, addr, true, false);
 102   };
 103   inline void calculate_address_from_global_toc_lo16only(Register dst, address addr) {
 104     calculate_address_from_global_toc(dst, addr, false, true);
 105   };
 106 
 107   inline static bool is_calculate_address_from_global_toc_at(address a, address bound);
 108   static int patch_calculate_address_from_global_toc_at(address a, address addr, address bound);
 109   static address get_address_of_calculate_address_from_global_toc_at(address a, address addr);
 110 
 111 #ifdef _LP64
 112   // Patch narrow oop constant.
 113   inline static bool is_set_narrow_oop(address a, address bound);
 114   static int patch_set_narrow_oop(address a, address bound, narrowOop data);
 115   static narrowOop get_narrow_oop(address a, address bound);
 116 #endif
 117 
 118   inline static bool is_load_const_at(address a);
 119 
 120   // Emits an oop const to the constant pool, loads the constant, and
 121   // sets a relocation info with address current_pc.
 122   void load_const_from_method_toc(Register dst, AddressLiteral& a, Register toc);
 123   void load_toc_from_toc(Register dst, AddressLiteral& a, Register toc) {
 124     assert(dst == R2_TOC, "base register must be TOC");
 125     load_const_from_method_toc(dst, a, toc);
 126   }
 127 
 128   static bool is_load_const_from_method_toc_at(address a);
 129   static int get_offset_of_load_const_from_method_toc_at(address a);
 130 
 131   // Get the 64 bit constant from a `load_const' sequence.
 132   static long get_const(address load_const);
 133 
 134   // Patch the 64 bit constant of a `load_const' sequence. This is a
 135   // low level procedure. It neither flushes the instruction cache nor
 136   // is it atomic.
 137   static void patch_const(address load_const, long x);
 138 
 139   // Metadata in code that we have to keep track of.
 140   AddressLiteral allocate_metadata_address(Metadata* obj); // allocate_index
 141   AddressLiteral constant_metadata_address(Metadata* obj); // find_index
 142   // Oops used directly in compiled code are stored in the constant pool,
 143   // and loaded from there.
 144   // Allocate new entry for oop in constant pool. Generate relocation.
 145   AddressLiteral allocate_oop_address(jobject obj);
 146   // Find oop obj in constant pool. Return relocation with it's index.
 147   AddressLiteral constant_oop_address(jobject obj);
 148 
 149   // Find oop in constant pool and emit instructions to load it.
 150   // Uses constant_oop_address.
 151   inline void set_oop_constant(jobject obj, Register d);
 152   // Same as load_address.
 153   inline void set_oop         (AddressLiteral obj_addr, Register d);
 154 
 155   // Read runtime constant:  Issue load if constant not yet established,
 156   // else use real constant.
 157   virtual RegisterOrConstant delayed_value_impl(intptr_t* delayed_value_addr,
 158                                                 Register tmp,
 159                                                 int offset);
 160 
 161   //
 162   // branch, jump
 163   //
 164 
 165   inline void pd_patch_instruction(address branch, address target);
 166   NOT_PRODUCT(static void pd_print_patched_instruction(address branch);)
 167 
 168   // Conditional far branch for destinations encodable in 24+2 bits.
 169   // Same interface as bc, e.g. no inverse boint-field.
 170   enum {
 171     bc_far_optimize_not         = 0,
 172     bc_far_optimize_on_relocate = 1
 173   };
 174   // optimize: flag for telling the conditional far branch to optimize
 175   //           itself when relocated.
 176   void bc_far(int boint, int biint, Label& dest, int optimize);
 177   // Relocation of conditional far branches.
 178   static bool    is_bc_far_at(address instruction_addr);
 179   static address get_dest_of_bc_far_at(address instruction_addr);
 180   static void    set_dest_of_bc_far_at(address instruction_addr, address dest);
 181  private:
 182   static bool inline is_bc_far_variant1_at(address instruction_addr);
 183   static bool inline is_bc_far_variant2_at(address instruction_addr);
 184   static bool inline is_bc_far_variant3_at(address instruction_addr);
 185  public:
 186 
 187   // Convenience bc_far versions.
 188   inline void blt_far(ConditionRegister crx, Label& L, int optimize);
 189   inline void bgt_far(ConditionRegister crx, Label& L, int optimize);
 190   inline void beq_far(ConditionRegister crx, Label& L, int optimize);
 191   inline void bso_far(ConditionRegister crx, Label& L, int optimize);
 192   inline void bge_far(ConditionRegister crx, Label& L, int optimize);
 193   inline void ble_far(ConditionRegister crx, Label& L, int optimize);
 194   inline void bne_far(ConditionRegister crx, Label& L, int optimize);
 195   inline void bns_far(ConditionRegister crx, Label& L, int optimize);
 196 
 197   // Emit, identify and patch a NOT mt-safe patchable 64 bit absolute call/jump.
 198  private:
 199   enum {
 200     bxx64_patchable_instruction_count = (2/*load_codecache_const*/ + 3/*5load_const*/ + 1/*mtctr*/ + 1/*bctrl*/),
 201     bxx64_patchable_size              = bxx64_patchable_instruction_count * BytesPerInstWord,
 202     bxx64_patchable_ret_addr_offset   = bxx64_patchable_size
 203   };
 204   void bxx64_patchable(address target, relocInfo::relocType rt, bool link);
 205   static bool is_bxx64_patchable_at(            address instruction_addr, bool link);
 206   // Does the instruction use a pc-relative encoding of the destination?
 207   static bool is_bxx64_patchable_pcrelative_at( address instruction_addr, bool link);
 208   static bool is_bxx64_patchable_variant1_at(   address instruction_addr, bool link);
 209   // Load destination relative to global toc.
 210   static bool is_bxx64_patchable_variant1b_at(  address instruction_addr, bool link);
 211   static bool is_bxx64_patchable_variant2_at(   address instruction_addr, bool link);
 212   static void set_dest_of_bxx64_patchable_at(   address instruction_addr, address target, bool link);
 213   static address get_dest_of_bxx64_patchable_at(address instruction_addr, bool link);
 214 
 215  public:
 216   // call
 217   enum {
 218     bl64_patchable_instruction_count = bxx64_patchable_instruction_count,
 219     bl64_patchable_size              = bxx64_patchable_size,
 220     bl64_patchable_ret_addr_offset   = bxx64_patchable_ret_addr_offset
 221   };
 222   inline void bl64_patchable(address target, relocInfo::relocType rt) {
 223     bxx64_patchable(target, rt, /*link=*/true);
 224   }
 225   inline static bool is_bl64_patchable_at(address instruction_addr) {
 226     return is_bxx64_patchable_at(instruction_addr, /*link=*/true);
 227   }
 228   inline static bool is_bl64_patchable_pcrelative_at(address instruction_addr) {
 229     return is_bxx64_patchable_pcrelative_at(instruction_addr, /*link=*/true);
 230   }
 231   inline static void set_dest_of_bl64_patchable_at(address instruction_addr, address target) {
 232     set_dest_of_bxx64_patchable_at(instruction_addr, target, /*link=*/true);
 233   }
 234   inline static address get_dest_of_bl64_patchable_at(address instruction_addr) {
 235     return get_dest_of_bxx64_patchable_at(instruction_addr, /*link=*/true);
 236   }
 237   // jump
 238   enum {
 239     b64_patchable_instruction_count = bxx64_patchable_instruction_count,
 240     b64_patchable_size              = bxx64_patchable_size,
 241   };
 242   inline void b64_patchable(address target, relocInfo::relocType rt) {
 243     bxx64_patchable(target, rt, /*link=*/false);
 244   }
 245   inline static bool is_b64_patchable_at(address instruction_addr) {
 246     return is_bxx64_patchable_at(instruction_addr, /*link=*/false);
 247   }
 248   inline static bool is_b64_patchable_pcrelative_at(address instruction_addr) {
 249     return is_bxx64_patchable_pcrelative_at(instruction_addr, /*link=*/false);
 250   }
 251   inline static void set_dest_of_b64_patchable_at(address instruction_addr, address target) {
 252     set_dest_of_bxx64_patchable_at(instruction_addr, target, /*link=*/false);
 253   }
 254   inline static address get_dest_of_b64_patchable_at(address instruction_addr) {
 255     return get_dest_of_bxx64_patchable_at(instruction_addr, /*link=*/false);
 256   }
 257 
 258   //
 259   // Support for frame handling
 260   //
 261 
 262   // some ABI-related functions
 263   void save_nonvolatile_gprs(   Register dst_base, int offset);
 264   void restore_nonvolatile_gprs(Register src_base, int offset);
 265   void save_volatile_gprs(   Register dst_base, int offset);
 266   void restore_volatile_gprs(Register src_base, int offset);
 267   void save_LR_CR(   Register tmp);     // tmp contains LR on return.
 268   void restore_LR_CR(Register tmp);
 269 
 270   // Get current PC using bl-next-instruction trick.
 271   address get_PC_trash_LR(Register result);
 272 
 273   // Resize current frame either relatively wrt to current SP or absolute.
 274   void resize_frame(Register offset, Register tmp);
 275   void resize_frame(int      offset, Register tmp);
 276   void resize_frame_absolute(Register addr, Register tmp1, Register tmp2);
 277 
 278   // Push a frame of size bytes.
 279   void push_frame(Register bytes, Register tmp);
 280 
 281   // Push a frame of size `bytes'. No abi space provided.
 282   void push_frame(unsigned int bytes, Register tmp);
 283 
 284   // Push a frame of size `bytes' plus abi_reg_args on top.
 285   void push_frame_reg_args(unsigned int bytes, Register tmp);
 286 
 287   // Setup up a new C frame with a spill area for non-volatile GPRs and additional
 288   // space for local variables
 289   void push_frame_reg_args_nonvolatiles(unsigned int bytes, Register tmp);
 290 
 291   // pop current C frame
 292   void pop_frame();
 293 
 294   //
 295   // Calls
 296   //
 297 
 298  private:
 299   address _last_calls_return_pc;
 300 
 301 #if defined(ABI_ELFv2)
 302   // Generic version of a call to C function.
 303   // Updates and returns _last_calls_return_pc.
 304   address branch_to(Register function_entry, bool and_link);
 305 #else
 306   // Generic version of a call to C function via a function descriptor
 307   // with variable support for C calling conventions (TOC, ENV, etc.).
 308   // updates and returns _last_calls_return_pc.
 309   address branch_to(Register function_descriptor, bool and_link, bool save_toc_before_call,
 310                     bool restore_toc_after_call, bool load_toc_of_callee, bool load_env_of_callee);
 311 #endif
 312 
 313  public:
 314 
 315   // Get the pc where the last call will return to. returns _last_calls_return_pc.
 316   inline address last_calls_return_pc();
 317 
 318 #if defined(ABI_ELFv2)
 319   // Call a C function via a function descriptor and use full C
 320   // calling conventions. Updates and returns _last_calls_return_pc.
 321   address call_c(Register function_entry);
 322   // For tail calls: only branch, don't link, so callee returns to caller of this function.
 323   address call_c_and_return_to_caller(Register function_entry);
 324   address call_c(address function_entry, relocInfo::relocType rt);
 325 #else
 326   // Call a C function via a function descriptor and use full C
 327   // calling conventions. Updates and returns _last_calls_return_pc.
 328   address call_c(Register function_descriptor);
 329   // For tail calls: only branch, don't link, so callee returns to caller of this function.
 330   address call_c_and_return_to_caller(Register function_descriptor);
 331   address call_c(const FunctionDescriptor* function_descriptor, relocInfo::relocType rt);
 332   address call_c_using_toc(const FunctionDescriptor* function_descriptor, relocInfo::relocType rt,
 333                            Register toc);
 334 #endif
 335 
 336  protected:
 337 
 338   // It is imperative that all calls into the VM are handled via the
 339   // call_VM macros. They make sure that the stack linkage is setup
 340   // correctly. call_VM's correspond to ENTRY/ENTRY_X entry points
 341   // while call_VM_leaf's correspond to LEAF entry points.
 342   //
 343   // This is the base routine called by the different versions of
 344   // call_VM. The interpreter may customize this version by overriding
 345   // it for its purposes (e.g., to save/restore additional registers
 346   // when doing a VM call).
 347   //
 348   // If no last_java_sp is specified (noreg) then SP will be used instead.
 349   virtual void call_VM_base(
 350      // where an oop-result ends up if any; use noreg otherwise
 351     Register        oop_result,
 352     // to set up last_Java_frame in stubs; use noreg otherwise
 353     Register        last_java_sp,
 354     // the entry point
 355     address         entry_point,
 356     // flag which indicates if exception should be checked
 357     bool            check_exception = true
 358   );
 359 
 360   // Support for VM calls. This is the base routine called by the
 361   // different versions of call_VM_leaf. The interpreter may customize
 362   // this version by overriding it for its purposes (e.g., to
 363   // save/restore additional registers when doing a VM call).
 364   void call_VM_leaf_base(address entry_point);
 365 
 366  public:
 367   // Call into the VM.
 368   // Passes the thread pointer (in R3_ARG1) as a prepended argument.
 369   // Makes sure oop return values are visible to the GC.
 370   void call_VM(Register oop_result, address entry_point, bool check_exceptions = true);
 371   void call_VM(Register oop_result, address entry_point, Register arg_1, bool check_exceptions = true);
 372   void call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, bool check_exceptions = true);
 373   void call_VM(Register oop_result, address entry_point, Register arg_1, Register arg_2, Register arg3, bool check_exceptions = true);
 374   void call_VM_leaf(address entry_point);
 375   void call_VM_leaf(address entry_point, Register arg_1);
 376   void call_VM_leaf(address entry_point, Register arg_1, Register arg_2);
 377   void call_VM_leaf(address entry_point, Register arg_1, Register arg_2, Register arg_3);
 378 
 379   // Call a stub function via a function descriptor, but don't save
 380   // TOC before call, don't setup TOC and ENV for call, and don't
 381   // restore TOC after call. Updates and returns _last_calls_return_pc.
 382   inline address call_stub(Register function_entry);
 383   inline void call_stub_and_return_to(Register function_entry, Register return_pc);
 384 
 385   //
 386   // Java utilities
 387   //
 388 
 389   // Read from the polling page, its address is already in a register.
 390   inline void load_from_polling_page(Register polling_page_address, int offset = 0);
 391   // Check whether instruction is a read access to the polling page
 392   // which was emitted by load_from_polling_page(..).
 393   static bool is_load_from_polling_page(int instruction, void* ucontext/*may be NULL*/,
 394                                         address* polling_address_ptr = NULL);
 395 
 396   // Check whether instruction is a write access to the memory
 397   // serialization page realized by one of the instructions stw, stwu,
 398   // stwx, or stwux.
 399   static bool is_memory_serialization(int instruction, JavaThread* thread, void* ucontext);
 400 
 401   // Support for NULL-checks
 402   //
 403   // Generates code that causes a NULL OS exception if the content of reg is NULL.
 404   // If the accessed location is M[reg + offset] and the offset is known, provide the
 405   // offset. No explicit code generation is needed if the offset is within a certain
 406   // range (0 <= offset <= page_size).
 407 
 408   // Stack overflow checking
 409   void bang_stack_with_offset(int offset);
 410 
 411   // If instruction is a stack bang of the form ld, stdu, or
 412   // stdux, return the banged address. Otherwise, return 0.
 413   static address get_stack_bang_address(int instruction, void* ucontext);
 414 
 415   // Atomics
 416   // CmpxchgX sets condition register to cmpX(current, compare).
 417   // (flag == ne) => (dest_current_value != compare_value), (!swapped)
 418   // (flag == eq) => (dest_current_value == compare_value), ( swapped)
 419   static inline bool cmpxchgx_hint_acquire_lock()  { return true; }
 420   // The stxcx will probably not be succeeded by a releasing store.
 421   static inline bool cmpxchgx_hint_release_lock()  { return false; }
 422   static inline bool cmpxchgx_hint_atomic_update() { return false; }
 423 
 424   // Cmpxchg semantics
 425   enum {
 426     MemBarNone = 0,
 427     MemBarRel  = 1,
 428     MemBarAcq  = 2,
 429     MemBarFenceAfter = 4 // use powers of 2
 430   };
 431   void cmpxchgw(ConditionRegister flag,
 432                 Register dest_current_value, Register compare_value, Register exchange_value, Register addr_base,
 433                 int semantics, bool cmpxchgx_hint = false,
 434                 Register int_flag_success = noreg, bool contention_hint = false);
 435   void cmpxchgd(ConditionRegister flag,
 436                 Register dest_current_value, RegisterOrConstant compare_value, Register exchange_value,
 437                 Register addr_base, int semantics, bool cmpxchgx_hint = false,
 438                 Register int_flag_success = noreg, Label* failed = NULL, bool contention_hint = false);
 439 
 440   // interface method calling
 441   void lookup_interface_method(Register recv_klass,
 442                                Register intf_klass,
 443                                RegisterOrConstant itable_index,
 444                                Register method_result,
 445                                Register temp_reg, Register temp2_reg,
 446                                Label& no_such_interface);
 447 
 448   // virtual method calling
 449   void lookup_virtual_method(Register recv_klass,
 450                              RegisterOrConstant vtable_index,
 451                              Register method_result);
 452 
 453   // Test sub_klass against super_klass, with fast and slow paths.
 454 
 455   // The fast path produces a tri-state answer: yes / no / maybe-slow.
 456   // One of the three labels can be NULL, meaning take the fall-through.
 457   // If super_check_offset is -1, the value is loaded up from super_klass.
 458   // No registers are killed, except temp_reg and temp2_reg.
 459   // If super_check_offset is not -1, temp2_reg is not used and can be noreg.
 460   void check_klass_subtype_fast_path(Register sub_klass,
 461                                      Register super_klass,
 462                                      Register temp1_reg,
 463                                      Register temp2_reg,
 464                                      Label& L_success,
 465                                      Label& L_failure);
 466 
 467   // The rest of the type check; must be wired to a corresponding fast path.
 468   // It does not repeat the fast path logic, so don't use it standalone.
 469   // The temp_reg can be noreg, if no temps are available.
 470   // It can also be sub_klass or super_klass, meaning it's OK to kill that one.
 471   // Updates the sub's secondary super cache as necessary.
 472   void check_klass_subtype_slow_path(Register sub_klass,
 473                                      Register super_klass,
 474                                      Register temp1_reg,
 475                                      Register temp2_reg,
 476                                      Label* L_success = NULL,
 477                                      Register result_reg = noreg);
 478 
 479   // Simplified, combined version, good for typical uses.
 480   // Falls through on failure.
 481   void check_klass_subtype(Register sub_klass,
 482                            Register super_klass,
 483                            Register temp1_reg,
 484                            Register temp2_reg,
 485                            Label& L_success);
 486 
 487   // Method handle support (JSR 292).
 488   void check_method_handle_type(Register mtype_reg, Register mh_reg, Register temp_reg, Label& wrong_method_type);
 489 
 490   RegisterOrConstant argument_offset(RegisterOrConstant arg_slot, Register temp_reg, int extra_slot_offset = 0);
 491 
 492   // Biased locking support
 493   // Upon entry,obj_reg must contain the target object, and mark_reg
 494   // must contain the target object's header.
 495   // Destroys mark_reg if an attempt is made to bias an anonymously
 496   // biased lock. In this case a failure will go either to the slow
 497   // case or fall through with the notEqual condition code set with
 498   // the expectation that the slow case in the runtime will be called.
 499   // In the fall-through case where the CAS-based lock is done,
 500   // mark_reg is not destroyed.
 501   void biased_locking_enter(ConditionRegister cr_reg, Register obj_reg, Register mark_reg, Register temp_reg,
 502                             Register temp2_reg, Label& done, Label* slow_case = NULL);
 503   // Upon entry, the base register of mark_addr must contain the oop.
 504   // Destroys temp_reg.
 505   // If allow_delay_slot_filling is set to true, the next instruction
 506   // emitted after this one will go in an annulled delay slot if the
 507   // biased locking exit case failed.
 508   void biased_locking_exit(ConditionRegister cr_reg, Register mark_addr, Register temp_reg, Label& done);
 509 
 510   void atomic_inc_ptr(Register addr, Register result, int simm16 = 1);
 511   void atomic_ori_int(Register addr, Register result, int uimm16);
 512 
 513 #if INCLUDE_RTM_OPT
 514   void rtm_counters_update(Register abort_status, Register rtm_counters);
 515   void branch_on_random_using_tb(Register tmp, int count, Label& brLabel);
 516   void rtm_abort_ratio_calculation(Register rtm_counters_reg, RTMLockingCounters* rtm_counters,
 517                                    Metadata* method_data);
 518   void rtm_profiling(Register abort_status_Reg, Register temp_Reg,
 519                      RTMLockingCounters* rtm_counters, Metadata* method_data, bool profile_rtm);
 520   void rtm_retry_lock_on_abort(Register retry_count, Register abort_status,
 521                                Label& retryLabel, Label* checkRetry = NULL);
 522   void rtm_retry_lock_on_busy(Register retry_count, Register owner_addr, Label& retryLabel);
 523   void rtm_stack_locking(ConditionRegister flag, Register obj, Register mark_word, Register tmp,
 524                          Register retry_on_abort_count,
 525                          RTMLockingCounters* stack_rtm_counters,
 526                          Metadata* method_data, bool profile_rtm,
 527                          Label& DONE_LABEL, Label& IsInflated);
 528   void rtm_inflated_locking(ConditionRegister flag, Register obj, Register mark_word, Register box,
 529                             Register retry_on_busy_count, Register retry_on_abort_count,
 530                             RTMLockingCounters* rtm_counters,
 531                             Metadata* method_data, bool profile_rtm,
 532                             Label& DONE_LABEL);
 533 #endif
 534 
 535   void compiler_fast_lock_object(ConditionRegister flag, Register oop, Register box,
 536                                  Register tmp1, Register tmp2, Register tmp3,
 537                                  bool try_bias = UseBiasedLocking,
 538                                  RTMLockingCounters* rtm_counters = NULL,
 539                                  RTMLockingCounters* stack_rtm_counters = NULL,
 540                                  Metadata* method_data = NULL,
 541                                  bool use_rtm = false, bool profile_rtm = false);
 542 
 543   void compiler_fast_unlock_object(ConditionRegister flag, Register oop, Register box,
 544                                    Register tmp1, Register tmp2, Register tmp3,
 545                                    bool try_bias = UseBiasedLocking, bool use_rtm = false);
 546 
 547   // Support for serializing memory accesses between threads
 548   void serialize_memory(Register thread, Register tmp1, Register tmp2);
 549 
 550   // GC barrier support.
 551   void card_write_barrier_post(Register Rstore_addr, Register Rnew_val, Register Rtmp);
 552   void card_table_write(jbyte* byte_map_base, Register Rtmp, Register Robj);
 553 
 554 #if INCLUDE_ALL_GCS
 555   // General G1 pre-barrier generator.
 556   void g1_write_barrier_pre(Register Robj, RegisterOrConstant offset, Register Rpre_val,
 557                             Register Rtmp1, Register Rtmp2, bool needs_frame = false);
 558   // General G1 post-barrier generator
 559   void g1_write_barrier_post(Register Rstore_addr, Register Rnew_val, Register Rtmp1,
 560                              Register Rtmp2, Register Rtmp3, Label *filtered_ext = NULL);
 561 #endif
 562 
 563   // Support for managing the JavaThread pointer (i.e.; the reference to
 564   // thread-local information).
 565 
 566   // Support for last Java frame (but use call_VM instead where possible):
 567   // access R16_thread->last_Java_sp.
 568   void set_last_Java_frame(Register last_java_sp, Register last_Java_pc);
 569   void reset_last_Java_frame(void);
 570   void set_top_ijava_frame_at_SP_as_last_Java_frame(Register sp, Register tmp1);
 571 
 572   // Read vm result from thread: oop_result = R16_thread->result;
 573   void get_vm_result  (Register oop_result);
 574   void get_vm_result_2(Register metadata_result);
 575 
 576   static bool needs_explicit_null_check(intptr_t offset);
 577 
 578   // Trap-instruction-based checks.
 579   // Range checks can be distinguished from zero checks as they check 32 bit,
 580   // zero checks all 64 bits (tw, td).
 581   inline void trap_null_check(Register a, trap_to_bits cmp = traptoEqual);
 582   static bool is_trap_null_check(int x) {
 583     return is_tdi(x, traptoEqual,               -1/*any reg*/, 0) ||
 584            is_tdi(x, traptoGreaterThanUnsigned, -1/*any reg*/, 0);
 585   }
 586 
 587   inline void trap_zombie_not_entrant();
 588   static bool is_trap_zombie_not_entrant(int x) { return is_tdi(x, traptoUnconditional, 0/*reg 0*/, 1); }
 589 
 590   inline void trap_should_not_reach_here();
 591   static bool is_trap_should_not_reach_here(int x) { return is_tdi(x, traptoUnconditional, 0/*reg 0*/, 2); }
 592 
 593   inline void trap_ic_miss_check(Register a, Register b);
 594   static bool is_trap_ic_miss_check(int x) {
 595     return is_td(x, traptoGreaterThanUnsigned | traptoLessThanUnsigned, -1/*any reg*/, -1/*any reg*/);
 596   }
 597 
 598   // Implicit or explicit null check, jumps to static address exception_entry.
 599   inline void null_check_throw(Register a, int offset, Register temp_reg, address exception_entry);
 600 
 601   // Check accessed object for null. Use SIGTRAP-based null checks on AIX.
 602   inline void load_with_trap_null_check(Register d, int si16, Register s1);
 603 
 604   // Load heap oop and decompress. Loaded oop may not be null.
 605   // Specify tmp to save one cycle.
 606   inline void load_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1 = noreg,
 607                                      Register tmp = noreg);
 608   // Store heap oop and decompress.  Decompressed oop may not be null.
 609   // Specify tmp register if d should not be changed.
 610   inline void store_heap_oop_not_null(Register d, RegisterOrConstant offs, Register s1,
 611                                       Register tmp = noreg);
 612 
 613   // Null allowed.
 614   inline void load_heap_oop(Register d, RegisterOrConstant offs, Register s1 = noreg, Label *is_null = NULL);
 615 
 616   // Encode/decode heap oop. Oop may not be null, else en/decoding goes wrong.
 617   // src == d allowed.
 618   inline Register encode_heap_oop_not_null(Register d, Register src = noreg);
 619   inline Register decode_heap_oop_not_null(Register d, Register src = noreg);
 620 
 621   // Null allowed.
 622   inline void decode_heap_oop(Register d);
 623 
 624   // Load/Store klass oop from klass field. Compress.
 625   void load_klass(Register dst, Register src);
 626   void load_klass_with_trap_null_check(Register dst, Register src);
 627   void store_klass(Register dst_oop, Register klass, Register tmp = R0);
 628   void store_klass_gap(Register dst_oop, Register val = noreg); // Will store 0 if val not specified.
 629   static int instr_size_for_decode_klass_not_null();
 630   void decode_klass_not_null(Register dst, Register src = noreg);
 631   Register encode_klass_not_null(Register dst, Register src = noreg);
 632 
 633   // Load common heap base into register.
 634   void reinit_heapbase(Register d, Register tmp = noreg);
 635 
 636   // SIGTRAP-based range checks for arrays.
 637   inline void trap_range_check_l(Register a, Register b);
 638   inline void trap_range_check_l(Register a, int si16);
 639   static bool is_trap_range_check_l(int x) {
 640     return (is_tw (x, traptoLessThanUnsigned, -1/*any reg*/, -1/*any reg*/) ||
 641             is_twi(x, traptoLessThanUnsigned, -1/*any reg*/)                  );
 642   }
 643   inline void trap_range_check_le(Register a, int si16);
 644   static bool is_trap_range_check_le(int x) {
 645     return is_twi(x, traptoEqual | traptoLessThanUnsigned, -1/*any reg*/);
 646   }
 647   inline void trap_range_check_g(Register a, int si16);
 648   static bool is_trap_range_check_g(int x) {
 649     return is_twi(x, traptoGreaterThanUnsigned, -1/*any reg*/);
 650   }
 651   inline void trap_range_check_ge(Register a, Register b);
 652   inline void trap_range_check_ge(Register a, int si16);
 653   static bool is_trap_range_check_ge(int x) {
 654     return (is_tw (x, traptoEqual | traptoGreaterThanUnsigned, -1/*any reg*/, -1/*any reg*/) ||
 655             is_twi(x, traptoEqual | traptoGreaterThanUnsigned, -1/*any reg*/)                  );
 656   }
 657   static bool is_trap_range_check(int x) {
 658     return is_trap_range_check_l(x) || is_trap_range_check_le(x) ||
 659            is_trap_range_check_g(x) || is_trap_range_check_ge(x);
 660   }
 661 
 662   void clear_memory_doubleword(Register base_ptr, Register cnt_dwords, Register tmp = R0);
 663 
 664   // Needle of length 1.
 665   void string_indexof_1(Register result, Register haystack, Register haycnt,
 666                         Register needle, jchar needleChar,
 667                         Register tmp1, Register tmp2);
 668   // General indexof, eventually with constant needle length.
 669   void string_indexof(Register result, Register haystack, Register haycnt,
 670                       Register needle, ciTypeArray* needle_values, Register needlecnt, int needlecntval,
 671                       Register tmp1, Register tmp2, Register tmp3, Register tmp4);
 672   void string_compare(Register str1_reg, Register str2_reg, Register cnt1_reg, Register cnt2_reg,
 673                       Register result_reg, Register tmp_reg);
 674   void char_arrays_equals(Register str1_reg, Register str2_reg, Register cnt_reg, Register result_reg,
 675                           Register tmp1_reg, Register tmp2_reg, Register tmp3_reg, Register tmp4_reg,
 676                           Register tmp5_reg);
 677   void char_arrays_equalsImm(Register str1_reg, Register str2_reg, int cntval, Register result_reg,
 678                              Register tmp1_reg, Register tmp2_reg);
 679 
 680   // Emitters for BigInteger.multiplyToLen intrinsic.
 681   inline void multiply64(Register dest_hi, Register dest_lo,
 682                          Register x, Register y);
 683   void add2_with_carry(Register dest_hi, Register dest_lo,
 684                        Register src1, Register src2);
 685   void multiply_64_x_64_loop(Register x, Register xstart, Register x_xstart,
 686                              Register y, Register y_idx, Register z,
 687                              Register carry, Register product_high, Register product,
 688                              Register idx, Register kdx, Register tmp);
 689   void multiply_add_128_x_128(Register x_xstart, Register y, Register z,
 690                               Register yz_idx, Register idx, Register carry,
 691                               Register product_high, Register product, Register tmp,
 692                               int offset);
 693   void multiply_128_x_128_loop(Register x_xstart,
 694                                Register y, Register z,
 695                                Register yz_idx, Register idx, Register carry,
 696                                Register product_high, Register product,
 697                                Register carry2, Register tmp);
 698   void multiply_to_len(Register x, Register xlen,
 699                        Register y, Register ylen,
 700                        Register z, Register zlen,
 701                        Register tmp1, Register tmp2, Register tmp3, Register tmp4, Register tmp5,
 702                        Register tmp6, Register tmp7, Register tmp8, Register tmp9, Register tmp10,
 703                        Register tmp11, Register tmp12, Register tmp13);
 704 
 705   //
 706   // Debugging
 707   //
 708 
 709   // assert on cr0
 710   void asm_assert(bool check_equal, const char* msg, int id);
 711   void asm_assert_eq(const char* msg, int id) { asm_assert(true, msg, id); }
 712   void asm_assert_ne(const char* msg, int id) { asm_assert(false, msg, id); }
 713 
 714  private:
 715   void asm_assert_mems_zero(bool check_equal, int size, int mem_offset, Register mem_base,
 716                             const char* msg, int id);
 717 
 718  public:
 719 
 720   void asm_assert_mem8_is_zero(int mem_offset, Register mem_base, const char* msg, int id) {
 721     asm_assert_mems_zero(true,  8, mem_offset, mem_base, msg, id);
 722   }
 723   void asm_assert_mem8_isnot_zero(int mem_offset, Register mem_base, const char* msg, int id) {
 724     asm_assert_mems_zero(false, 8, mem_offset, mem_base, msg, id);
 725   }
 726 
 727   // Verify R16_thread contents.
 728   void verify_thread();
 729 
 730   // Emit code to verify that reg contains a valid oop if +VerifyOops is set.
 731   void verify_oop(Register reg, const char* s = "broken oop");
 732 
 733   // TODO: verify method and klass metadata (compare against vptr?)
 734   void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
 735   void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line) {}
 736 
 737   // Convenience method returning function entry. For the ELFv1 case
 738   // creates function descriptor at the current address and returs
 739   // the pointer to it. For the ELFv2 case returns the current address.
 740   inline address function_entry();
 741 
 742 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
 743 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
 744 
 745  private:
 746 
 747   enum {
 748     stop_stop                = 0,
 749     stop_untested            = 1,
 750     stop_unimplemented       = 2,
 751     stop_shouldnotreachhere  = 3,
 752     stop_end                 = 4
 753   };
 754   void stop(int type, const char* msg, int id);
 755 
 756  public:
 757   // Prints msg, dumps registers and stops execution.
 758   void stop         (const char* msg = "", int id = 0) { stop(stop_stop,               msg, id); }
 759   void untested     (const char* msg = "", int id = 0) { stop(stop_untested,           msg, id); }
 760   void unimplemented(const char* msg = "", int id = 0) { stop(stop_unimplemented,      msg, id); }
 761   void should_not_reach_here()                         { stop(stop_shouldnotreachhere,  "", -1); }
 762 
 763   void zap_from_to(Register low, int before, Register high, int after, Register val, Register addr) PRODUCT_RETURN;
 764 };
 765 
 766 // class SkipIfEqualZero:
 767 //
 768 // Instantiating this class will result in assembly code being output that will
 769 // jump around any code emitted between the creation of the instance and it's
 770 // automatic destruction at the end of a scope block, depending on the value of
 771 // the flag passed to the constructor, which will be checked at run-time.
 772 class SkipIfEqualZero : public StackObj {
 773  private:
 774   MacroAssembler* _masm;
 775   Label _label;
 776 
 777  public:
 778    // 'Temp' is a temp register that this object can use (and trash).
 779    explicit SkipIfEqualZero(MacroAssembler*, Register temp, const bool* flag_addr);
 780    ~SkipIfEqualZero();
 781 };
 782 
 783 #endif // CPU_PPC_VM_MACROASSEMBLER_PPC_HPP