1 /*
   2  * Copyright (c) 1998, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/ad.hpp"
  28 #include "opto/block.hpp"
  29 #include "opto/c2compiler.hpp"
  30 #include "opto/callnode.hpp"
  31 #include "opto/cfgnode.hpp"
  32 #include "opto/machnode.hpp"
  33 #include "opto/runtime.hpp"
  34 #include "opto/chaitin.hpp"
  35 #include "runtime/sharedRuntime.hpp"
  36 
  37 // Optimization - Graph Style
  38 
  39 // Check whether val is not-null-decoded compressed oop,
  40 // i.e. will grab into the base of the heap if it represents NULL.
  41 static bool accesses_heap_base_zone(Node *val) {
  42   if (Universe::narrow_oop_base() > 0) { // Implies UseCompressedOops.
  43     if (val && val->is_Mach()) {
  44       if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
  45         // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
  46         // decode NULL to point to the heap base (Decode_NN).
  47         if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
  48           return true;
  49         }
  50       }
  51       // Must recognize load operation with Decode matched in memory operand.
  52       // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
  53       // returns true everywhere else. On PPC, no such memory operands
  54       // exist, therefore we did not yet implement a check for such operands.
  55       NOT_AIX(Unimplemented());
  56     }
  57   }
  58   return false;
  59 }
  60 
  61 static bool needs_explicit_null_check_for_read(Node *val) {
  62   // On some OSes (AIX) the page at address 0 is only write protected.
  63   // If so, only Store operations will trap.
  64   if (os::zero_page_read_protected()) {
  65     return false;  // Implicit null check will work.
  66   }
  67   // Also a read accessing the base of a heap-based compressed heap will trap.
  68   if (accesses_heap_base_zone(val) &&                    // Hits the base zone page.
  69       Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
  70     return false;
  71   }
  72 
  73   return true;
  74 }
  75 
  76 //------------------------------implicit_null_check----------------------------
  77 // Detect implicit-null-check opportunities.  Basically, find NULL checks
  78 // with suitable memory ops nearby.  Use the memory op to do the NULL check.
  79 // I can generate a memory op if there is not one nearby.
  80 // The proj is the control projection for the not-null case.
  81 // The val is the pointer being checked for nullness or
  82 // decodeHeapOop_not_null node if it did not fold into address.
  83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
  84   // Assume if null check need for 0 offset then always needed
  85   // Intel solaris doesn't support any null checks yet and no
  86   // mechanism exists (yet) to set the switches at an os_cpu level
  87   if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
  88 
  89   // Make sure the ptr-is-null path appears to be uncommon!
  90   float f = block->end()->as_MachIf()->_prob;
  91   if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
  92   if( f > PROB_UNLIKELY_MAG(4) ) return;
  93 
  94   uint bidx = 0;                // Capture index of value into memop
  95   bool was_store;               // Memory op is a store op
  96 
  97   // Get the successor block for if the test ptr is non-null
  98   Block* not_null_block;  // this one goes with the proj
  99   Block* null_block;
 100   if (block->get_node(block->number_of_nodes()-1) == proj) {
 101     null_block     = block->_succs[0];
 102     not_null_block = block->_succs[1];
 103   } else {
 104     assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
 105     not_null_block = block->_succs[0];
 106     null_block     = block->_succs[1];
 107   }
 108   while (null_block->is_Empty() == Block::empty_with_goto) {
 109     null_block     = null_block->_succs[0];
 110   }
 111 
 112   // Search the exception block for an uncommon trap.
 113   // (See Parse::do_if and Parse::do_ifnull for the reason
 114   // we need an uncommon trap.  Briefly, we need a way to
 115   // detect failure of this optimization, as in 6366351.)
 116   {
 117     bool found_trap = false;
 118     for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
 119       Node* nn = null_block->get_node(i1);
 120       if (nn->is_MachCall() &&
 121           nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
 122         const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
 123         if (trtype->isa_int() && trtype->is_int()->is_con()) {
 124           jint tr_con = trtype->is_int()->get_con();
 125           Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
 126           Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
 127           assert((int)reason < (int)BitsPerInt, "recode bit map");
 128           if (is_set_nth_bit(allowed_reasons, (int) reason)
 129               && action != Deoptimization::Action_none) {
 130             // This uncommon trap is sure to recompile, eventually.
 131             // When that happens, C->too_many_traps will prevent
 132             // this transformation from happening again.
 133             found_trap = true;
 134           }
 135         }
 136         break;
 137       }
 138     }
 139     if (!found_trap) {
 140       // We did not find an uncommon trap.
 141       return;
 142     }
 143   }
 144 
 145   // Check for decodeHeapOop_not_null node which did not fold into address
 146   bool is_decoden = ((intptr_t)val) & 1;
 147   val = (Node*)(((intptr_t)val) & ~1);
 148 
 149   assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
 150          (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
 151 
 152   // Search the successor block for a load or store who's base value is also
 153   // the tested value.  There may be several.
 154   Node_List *out = new Node_List(Thread::current()->resource_area());
 155   MachNode *best = NULL;        // Best found so far
 156   for (DUIterator i = val->outs(); val->has_out(i); i++) {
 157     Node *m = val->out(i);
 158     if( !m->is_Mach() ) continue;
 159     MachNode *mach = m->as_Mach();
 160     was_store = false;
 161     int iop = mach->ideal_Opcode();
 162     switch( iop ) {
 163     case Op_LoadB:
 164     case Op_LoadUB:
 165     case Op_LoadUS:
 166     case Op_LoadD:
 167     case Op_LoadF:
 168     case Op_LoadI:
 169     case Op_LoadL:
 170     case Op_LoadP:
 171     case Op_LoadN:
 172     case Op_LoadS:
 173     case Op_LoadKlass:
 174     case Op_LoadNKlass:
 175     case Op_LoadRange:
 176     case Op_LoadD_unaligned:
 177     case Op_LoadL_unaligned:
 178       assert(mach->in(2) == val, "should be address");
 179       break;
 180     case Op_StoreB:
 181     case Op_StoreC:
 182     case Op_StoreCM:
 183     case Op_StoreD:
 184     case Op_StoreF:
 185     case Op_StoreI:
 186     case Op_StoreL:
 187     case Op_StoreP:
 188     case Op_StoreN:
 189     case Op_StoreNKlass:
 190       was_store = true;         // Memory op is a store op
 191       // Stores will have their address in slot 2 (memory in slot 1).
 192       // If the value being nul-checked is in another slot, it means we
 193       // are storing the checked value, which does NOT check the value!
 194       if( mach->in(2) != val ) continue;
 195       break;                    // Found a memory op?
 196     case Op_StrComp:
 197     case Op_StrEquals:
 198     case Op_StrIndexOf:
 199     case Op_StrIndexOfChar:
 200     case Op_AryEq:
 201     case Op_StrInflatedCopy:
 202     case Op_StrCompressedCopy:
 203     case Op_EncodeISOArray:
 204     case Op_HasNegatives:
 205       // Not a legit memory op for implicit null check regardless of
 206       // embedded loads
 207       continue;
 208     default:                    // Also check for embedded loads
 209       if( !mach->needs_anti_dependence_check() )
 210         continue;               // Not an memory op; skip it
 211       if( must_clone[iop] ) {
 212         // Do not move nodes which produce flags because
 213         // RA will try to clone it to place near branch and
 214         // it will cause recompilation, see clone_node().
 215         continue;
 216       }
 217       {
 218         // Check that value is used in memory address in
 219         // instructions with embedded load (CmpP val1,(val2+off)).
 220         Node* base;
 221         Node* index;
 222         const MachOper* oper = mach->memory_inputs(base, index);
 223         if (oper == NULL || oper == (MachOper*)-1) {
 224           continue;             // Not an memory op; skip it
 225         }
 226         if (val == base ||
 227             val == index && val->bottom_type()->isa_narrowoop()) {
 228           break;                // Found it
 229         } else {
 230           continue;             // Skip it
 231         }
 232       }
 233       break;
 234     }
 235 
 236     // On some OSes (AIX) the page at address 0 is only write protected.
 237     // If so, only Store operations will trap.
 238     // But a read accessing the base of a heap-based compressed heap will trap.
 239     if (!was_store && needs_explicit_null_check_for_read(val)) {
 240       continue;
 241     }
 242 
 243     // check if the offset is not too high for implicit exception
 244     {
 245       intptr_t offset = 0;
 246       const TypePtr *adr_type = NULL;  // Do not need this return value here
 247       const Node* base = mach->get_base_and_disp(offset, adr_type);
 248       if (base == NULL || base == NodeSentinel) {
 249         // Narrow oop address doesn't have base, only index
 250         if( val->bottom_type()->isa_narrowoop() &&
 251             MacroAssembler::needs_explicit_null_check(offset) )
 252           continue;             // Give up if offset is beyond page size
 253         // cannot reason about it; is probably not implicit null exception
 254       } else {
 255         const TypePtr* tptr;
 256         if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
 257                                   Universe::narrow_klass_shift() == 0)) {
 258           // 32-bits narrow oop can be the base of address expressions
 259           tptr = base->get_ptr_type();
 260         } else {
 261           // only regular oops are expected here
 262           tptr = base->bottom_type()->is_ptr();
 263         }
 264         // Give up if offset is not a compile-time constant
 265         if( offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot )
 266           continue;
 267         offset += tptr->_offset; // correct if base is offseted
 268         if( MacroAssembler::needs_explicit_null_check(offset) )
 269           continue;             // Give up is reference is beyond 4K page size
 270       }
 271     }
 272 
 273     // Check ctrl input to see if the null-check dominates the memory op
 274     Block *cb = get_block_for_node(mach);
 275     cb = cb->_idom;             // Always hoist at least 1 block
 276     if( !was_store ) {          // Stores can be hoisted only one block
 277       while( cb->_dom_depth > (block->_dom_depth + 1))
 278         cb = cb->_idom;         // Hoist loads as far as we want
 279       // The non-null-block should dominate the memory op, too. Live
 280       // range spilling will insert a spill in the non-null-block if it is
 281       // needs to spill the memory op for an implicit null check.
 282       if (cb->_dom_depth == (block->_dom_depth + 1)) {
 283         if (cb != not_null_block) continue;
 284         cb = cb->_idom;
 285       }
 286     }
 287     if( cb != block ) continue;
 288 
 289     // Found a memory user; see if it can be hoisted to check-block
 290     uint vidx = 0;              // Capture index of value into memop
 291     uint j;
 292     for( j = mach->req()-1; j > 0; j-- ) {
 293       if( mach->in(j) == val ) {
 294         vidx = j;
 295         // Ignore DecodeN val which could be hoisted to where needed.
 296         if( is_decoden ) continue;
 297       }
 298       // Block of memory-op input
 299       Block *inb = get_block_for_node(mach->in(j));
 300       Block *b = block;          // Start from nul check
 301       while( b != inb && b->_dom_depth > inb->_dom_depth )
 302         b = b->_idom;           // search upwards for input
 303       // See if input dominates null check
 304       if( b != inb )
 305         break;
 306     }
 307     if( j > 0 )
 308       continue;
 309     Block *mb = get_block_for_node(mach);
 310     // Hoisting stores requires more checks for the anti-dependence case.
 311     // Give up hoisting if we have to move the store past any load.
 312     if( was_store ) {
 313       Block *b = mb;            // Start searching here for a local load
 314       // mach use (faulting) trying to hoist
 315       // n might be blocker to hoisting
 316       while( b != block ) {
 317         uint k;
 318         for( k = 1; k < b->number_of_nodes(); k++ ) {
 319           Node *n = b->get_node(k);
 320           if( n->needs_anti_dependence_check() &&
 321               n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
 322             break;              // Found anti-dependent load
 323         }
 324         if( k < b->number_of_nodes() )
 325           break;                // Found anti-dependent load
 326         // Make sure control does not do a merge (would have to check allpaths)
 327         if( b->num_preds() != 2 ) break;
 328         b = get_block_for_node(b->pred(1)); // Move up to predecessor block
 329       }
 330       if( b != block ) continue;
 331     }
 332 
 333     // Make sure this memory op is not already being used for a NullCheck
 334     Node *e = mb->end();
 335     if( e->is_MachNullCheck() && e->in(1) == mach )
 336       continue;                 // Already being used as a NULL check
 337 
 338     // Found a candidate!  Pick one with least dom depth - the highest
 339     // in the dom tree should be closest to the null check.
 340     if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
 341       best = mach;
 342       bidx = vidx;
 343     }
 344   }
 345   // No candidate!
 346   if (best == NULL) {
 347     return;
 348   }
 349 
 350   // ---- Found an implicit null check
 351   extern int implicit_null_checks;
 352   implicit_null_checks++;
 353 
 354   if( is_decoden ) {
 355     // Check if we need to hoist decodeHeapOop_not_null first.
 356     Block *valb = get_block_for_node(val);
 357     if( block != valb && block->_dom_depth < valb->_dom_depth ) {
 358       // Hoist it up to the end of the test block.
 359       valb->find_remove(val);
 360       block->add_inst(val);
 361       map_node_to_block(val, block);
 362       // DecodeN on x86 may kill flags. Check for flag-killing projections
 363       // that also need to be hoisted.
 364       for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
 365         Node* n = val->fast_out(j);
 366         if( n->is_MachProj() ) {
 367           get_block_for_node(n)->find_remove(n);
 368           block->add_inst(n);
 369           map_node_to_block(n, block);
 370         }
 371       }
 372     }
 373   }
 374   // Hoist the memory candidate up to the end of the test block.
 375   Block *old_block = get_block_for_node(best);
 376   old_block->find_remove(best);
 377   block->add_inst(best);
 378   map_node_to_block(best, block);
 379 
 380   // Move the control dependence
 381   if (best->in(0) && best->in(0) == old_block->head())
 382     best->set_req(0, block->head());
 383 
 384   // Check for flag-killing projections that also need to be hoisted
 385   // Should be DU safe because no edge updates.
 386   for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
 387     Node* n = best->fast_out(j);
 388     if( n->is_MachProj() ) {
 389       get_block_for_node(n)->find_remove(n);
 390       block->add_inst(n);
 391       map_node_to_block(n, block);
 392     }
 393   }
 394 
 395   // proj==Op_True --> ne test; proj==Op_False --> eq test.
 396   // One of two graph shapes got matched:
 397   //   (IfTrue  (If (Bool NE (CmpP ptr NULL))))
 398   //   (IfFalse (If (Bool EQ (CmpP ptr NULL))))
 399   // NULL checks are always branch-if-eq.  If we see a IfTrue projection
 400   // then we are replacing a 'ne' test with a 'eq' NULL check test.
 401   // We need to flip the projections to keep the same semantics.
 402   if( proj->Opcode() == Op_IfTrue ) {
 403     // Swap order of projections in basic block to swap branch targets
 404     Node *tmp1 = block->get_node(block->end_idx()+1);
 405     Node *tmp2 = block->get_node(block->end_idx()+2);
 406     block->map_node(tmp2, block->end_idx()+1);
 407     block->map_node(tmp1, block->end_idx()+2);
 408     Node *tmp = new Node(C->top()); // Use not NULL input
 409     tmp1->replace_by(tmp);
 410     tmp2->replace_by(tmp1);
 411     tmp->replace_by(tmp2);
 412     tmp->destruct();
 413   }
 414 
 415   // Remove the existing null check; use a new implicit null check instead.
 416   // Since schedule-local needs precise def-use info, we need to correct
 417   // it as well.
 418   Node *old_tst = proj->in(0);
 419   MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
 420   block->map_node(nul_chk, block->end_idx());
 421   map_node_to_block(nul_chk, block);
 422   // Redirect users of old_test to nul_chk
 423   for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
 424     old_tst->last_out(i2)->set_req(0, nul_chk);
 425   // Clean-up any dead code
 426   for (uint i3 = 0; i3 < old_tst->req(); i3++) {
 427     Node* in = old_tst->in(i3);
 428     old_tst->set_req(i3, NULL);
 429     if (in->outcnt() == 0) {
 430       // Remove dead input node
 431       in->disconnect_inputs(NULL, C);
 432       block->find_remove(in);
 433     }
 434   }
 435 
 436   latency_from_uses(nul_chk);
 437   latency_from_uses(best);
 438 }
 439 
 440 
 441 //------------------------------select-----------------------------------------
 442 // Select a nice fellow from the worklist to schedule next. If there is only
 443 // one choice, then use it. Projections take top priority for correctness
 444 // reasons - if I see a projection, then it is next.  There are a number of
 445 // other special cases, for instructions that consume condition codes, et al.
 446 // These are chosen immediately. Some instructions are required to immediately
 447 // precede the last instruction in the block, and these are taken last. Of the
 448 // remaining cases (most), choose the instruction with the greatest latency
 449 // (that is, the most number of pseudo-cycles required to the end of the
 450 // routine). If there is a tie, choose the instruction with the most inputs.
 451 Node* PhaseCFG::select(
 452   Block* block,
 453   Node_List &worklist,
 454   GrowableArray<int> &ready_cnt,
 455   VectorSet &next_call,
 456   uint sched_slot,
 457   intptr_t* recalc_pressure_nodes) {
 458 
 459   // If only a single entry on the stack, use it
 460   uint cnt = worklist.size();
 461   if (cnt == 1) {
 462     Node *n = worklist[0];
 463     worklist.map(0,worklist.pop());
 464     return n;
 465   }
 466 
 467   uint choice  = 0; // Bigger is most important
 468   uint latency = 0; // Bigger is scheduled first
 469   uint score   = 0; // Bigger is better
 470   int idx = -1;     // Index in worklist
 471   int cand_cnt = 0; // Candidate count
 472   bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
 473 
 474   for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
 475     // Order in worklist is used to break ties.
 476     // See caller for how this is used to delay scheduling
 477     // of induction variable increments to after the other
 478     // uses of the phi are scheduled.
 479     Node *n = worklist[i];      // Get Node on worklist
 480 
 481     int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
 482     if( n->is_Proj() ||         // Projections always win
 483         n->Opcode()== Op_Con || // So does constant 'Top'
 484         iop == Op_CreateEx ||   // Create-exception must start block
 485         iop == Op_CheckCastPP
 486         ) {
 487       worklist.map(i,worklist.pop());
 488       return n;
 489     }
 490 
 491     // Final call in a block must be adjacent to 'catch'
 492     Node *e = block->end();
 493     if( e->is_Catch() && e->in(0)->in(0) == n )
 494       continue;
 495 
 496     // Memory op for an implicit null check has to be at the end of the block
 497     if( e->is_MachNullCheck() && e->in(1) == n )
 498       continue;
 499 
 500     // Schedule IV increment last.
 501     if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd &&
 502         e->in(1)->req() > 1 && e->in(1)->in(1) == n &&
 503         n->is_iteratively_computed()) {
 504       continue;
 505     }
 506 
 507     uint n_choice  = 2;
 508 
 509     // See if this instruction is consumed by a branch. If so, then (as the
 510     // branch is the last instruction in the basic block) force it to the
 511     // end of the basic block
 512     if ( must_clone[iop] ) {
 513       // See if any use is a branch
 514       bool found_machif = false;
 515 
 516       for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 517         Node* use = n->fast_out(j);
 518 
 519         // The use is a conditional branch, make them adjacent
 520         if (use->is_MachIf() && get_block_for_node(use) == block) {
 521           found_machif = true;
 522           break;
 523         }
 524 
 525         // More than this instruction pending for successor to be ready,
 526         // don't choose this if other opportunities are ready
 527         if (ready_cnt.at(use->_idx) > 1)
 528           n_choice = 1;
 529       }
 530 
 531       // loop terminated, prefer not to use this instruction
 532       if (found_machif)
 533         continue;
 534     }
 535 
 536     // See if this has a predecessor that is "must_clone", i.e. sets the
 537     // condition code. If so, choose this first
 538     for (uint j = 0; j < n->req() ; j++) {
 539       Node *inn = n->in(j);
 540       if (inn) {
 541         if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
 542           n_choice = 3;
 543           break;
 544         }
 545       }
 546     }
 547 
 548     // MachTemps should be scheduled last so they are near their uses
 549     if (n->is_MachTemp()) {
 550       n_choice = 1;
 551     }
 552 
 553     uint n_latency = get_latency_for_node(n);
 554     uint n_score = n->req();   // Many inputs get high score to break ties
 555 
 556     if (OptoRegScheduling && block_size_threshold_ok) {
 557       if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
 558         _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
 559         _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
 560         // simulate the notion that we just picked this node to schedule
 561         n->add_flag(Node::Flag_is_scheduled);
 562         // now caculate its effect upon the graph if we did
 563         adjust_register_pressure(n, block, recalc_pressure_nodes, false);
 564         // return its state for finalize in case somebody else wins
 565         n->remove_flag(Node::Flag_is_scheduled);
 566         // now save the two final pressure components of register pressure, limiting pressure calcs to short size
 567         short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
 568         short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
 569         recalc_pressure_nodes[n->_idx] = int_pressure;
 570         recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
 571       }
 572 
 573       if (_scheduling_for_pressure) {
 574         latency = n_latency;
 575         if (n_choice != 3) {
 576           // Now evaluate each register pressure component based on threshold in the score.
 577           // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
 578           // on a single instruction, but we might see it shrink on both banks.
 579           // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
 580           // live ranges that terminate on this instruction.
 581           if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 582             short int_pressure = (short)recalc_pressure_nodes[n->_idx];
 583             n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
 584           }
 585           if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 586             short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
 587             n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
 588           }
 589         } else {
 590           // make sure we choose these candidates
 591           score = 0;
 592         }
 593       }
 594     }
 595 
 596     // Keep best latency found
 597     cand_cnt++;
 598     if (choice < n_choice ||
 599         (choice == n_choice &&
 600          ((StressLCM && Compile::randomized_select(cand_cnt)) ||
 601           (!StressLCM &&
 602            (latency < n_latency ||
 603             (latency == n_latency &&
 604              (score < n_score))))))) {
 605       choice  = n_choice;
 606       latency = n_latency;
 607       score   = n_score;
 608       idx     = i;               // Also keep index in worklist
 609     }
 610   } // End of for all ready nodes in worklist
 611 
 612   assert(idx >= 0, "index should be set");
 613   Node *n = worklist[(uint)idx];      // Get the winner
 614 
 615   worklist.map((uint)idx, worklist.pop());     // Compress worklist
 616   return n;
 617 }
 618 
 619 //-------------------------adjust_register_pressure----------------------------
 620 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
 621   PhaseLive* liveinfo = _regalloc->get_live();
 622   IndexSet* liveout = liveinfo->live(block);
 623   // first adjust the register pressure for the sources
 624   for (uint i = 1; i < n->req(); i++) {
 625     bool lrg_ends = false;
 626     Node *src_n = n->in(i);
 627     if (src_n == NULL) continue;
 628     if (!src_n->is_Mach()) continue;
 629     uint src = _regalloc->_lrg_map.find(src_n);
 630     if (src == 0) continue;
 631     LRG& lrg_src = _regalloc->lrgs(src);
 632     // detect if the live range ends or not
 633     if (liveout->member(src) == false) {
 634       lrg_ends = true;
 635       for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
 636         Node* m = src_n->fast_out(j); // Get user
 637         if (m == n) continue;
 638         if (!m->is_Mach()) continue;
 639         MachNode *mach = m->as_Mach();
 640         bool src_matches = false;
 641         int iop = mach->ideal_Opcode();
 642 
 643         switch (iop) {
 644         case Op_StoreB:
 645         case Op_StoreC:
 646         case Op_StoreCM:
 647         case Op_StoreD:
 648         case Op_StoreF:
 649         case Op_StoreI:
 650         case Op_StoreL:
 651         case Op_StoreP:
 652         case Op_StoreN:
 653         case Op_StoreVector:
 654         case Op_StoreNKlass:
 655           for (uint k = 1; k < m->req(); k++) {
 656             Node *in = m->in(k);
 657             if (in == src_n) {
 658               src_matches = true;
 659               break;
 660             }
 661           }
 662           break;
 663 
 664         default:
 665           src_matches = true;
 666           break;
 667         }
 668 
 669         // If we have a store as our use, ignore the non source operands
 670         if (src_matches == false) continue;
 671 
 672         // Mark every unscheduled use which is not n with a recalculation
 673         if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
 674           if (finalize_mode && !m->is_Phi()) {
 675             recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
 676           }
 677           lrg_ends = false;
 678         }
 679       }
 680     }
 681     // if none, this live range ends and we can adjust register pressure
 682     if (lrg_ends) {
 683       if (finalize_mode) {
 684         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 685       } else {
 686         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 687       }
 688     }
 689   }
 690 
 691   // now add the register pressure from the dest and evaluate which heuristic we should use:
 692   // 1.) The default, latency scheduling
 693   // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
 694   uint dst = _regalloc->_lrg_map.find(n);
 695   if (dst != 0) {
 696     LRG& lrg_dst = _regalloc->lrgs(dst);
 697     if (finalize_mode) {
 698       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 699       // check to see if we fall over the register pressure cliff here
 700       if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 701         _scheduling_for_pressure = true;
 702       } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 703         _scheduling_for_pressure = true;
 704       } else {
 705         // restore latency scheduling mode
 706         _scheduling_for_pressure = false;
 707       }
 708     } else {
 709       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 710     }
 711   }
 712 }
 713 
 714 //------------------------------set_next_call----------------------------------
 715 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
 716   if( next_call.test_set(n->_idx) ) return;
 717   for( uint i=0; i<n->len(); i++ ) {
 718     Node *m = n->in(i);
 719     if( !m ) continue;  // must see all nodes in block that precede call
 720     if (get_block_for_node(m) == block) {
 721       set_next_call(block, m, next_call);
 722     }
 723   }
 724 }
 725 
 726 //------------------------------needed_for_next_call---------------------------
 727 // Set the flag 'next_call' for each Node that is needed for the next call to
 728 // be scheduled.  This flag lets me bias scheduling so Nodes needed for the
 729 // next subroutine call get priority - basically it moves things NOT needed
 730 // for the next call till after the call.  This prevents me from trying to
 731 // carry lots of stuff live across a call.
 732 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
 733   // Find the next control-defining Node in this block
 734   Node* call = NULL;
 735   for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
 736     Node* m = this_call->fast_out(i);
 737     if (get_block_for_node(m) == block && // Local-block user
 738         m != this_call &&       // Not self-start node
 739         m->is_MachCall()) {
 740       call = m;
 741       break;
 742     }
 743   }
 744   if (call == NULL)  return;    // No next call (e.g., block end is near)
 745   // Set next-call for all inputs to this call
 746   set_next_call(block, call, next_call);
 747 }
 748 
 749 //------------------------------add_call_kills-------------------------------------
 750 // helper function that adds caller save registers to MachProjNode
 751 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
 752   // Fill in the kill mask for the call
 753   for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
 754     if( !regs.Member(r) ) {     // Not already defined by the call
 755       // Save-on-call register?
 756       if ((save_policy[r] == 'C') ||
 757           (save_policy[r] == 'A') ||
 758           ((save_policy[r] == 'E') && exclude_soe)) {
 759         proj->_rout.Insert(r);
 760       }
 761     }
 762   }
 763 }
 764 
 765 
 766 //------------------------------sched_call-------------------------------------
 767 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
 768   RegMask regs;
 769 
 770   // Schedule all the users of the call right now.  All the users are
 771   // projection Nodes, so they must be scheduled next to the call.
 772   // Collect all the defined registers.
 773   for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
 774     Node* n = mcall->fast_out(i);
 775     assert( n->is_MachProj(), "" );
 776     int n_cnt = ready_cnt.at(n->_idx)-1;
 777     ready_cnt.at_put(n->_idx, n_cnt);
 778     assert( n_cnt == 0, "" );
 779     // Schedule next to call
 780     block->map_node(n, node_cnt++);
 781     // Collect defined registers
 782     regs.OR(n->out_RegMask());
 783     // Check for scheduling the next control-definer
 784     if( n->bottom_type() == Type::CONTROL )
 785       // Warm up next pile of heuristic bits
 786       needed_for_next_call(block, n, next_call);
 787 
 788     // Children of projections are now all ready
 789     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 790       Node* m = n->fast_out(j); // Get user
 791       if(get_block_for_node(m) != block) {
 792         continue;
 793       }
 794       if( m->is_Phi() ) continue;
 795       int m_cnt = ready_cnt.at(m->_idx) - 1;
 796       ready_cnt.at_put(m->_idx, m_cnt);
 797       if( m_cnt == 0 )
 798         worklist.push(m);
 799     }
 800 
 801   }
 802 
 803   // Act as if the call defines the Frame Pointer.
 804   // Certainly the FP is alive and well after the call.
 805   regs.Insert(_matcher.c_frame_pointer());
 806 
 807   // Set all registers killed and not already defined by the call.
 808   uint r_cnt = mcall->tf()->range()->cnt();
 809   int op = mcall->ideal_Opcode();
 810   MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
 811   map_node_to_block(proj, block);
 812   block->insert_node(proj, node_cnt++);
 813 
 814   // Select the right register save policy.
 815   const char *save_policy = NULL;
 816   switch (op) {
 817     case Op_CallRuntime:
 818     case Op_CallLeaf:
 819     case Op_CallLeafNoFP:
 820       // Calling C code so use C calling convention
 821       save_policy = _matcher._c_reg_save_policy;
 822       break;
 823 
 824     case Op_CallStaticJava:
 825     case Op_CallDynamicJava:
 826       // Calling Java code so use Java calling convention
 827       save_policy = _matcher._register_save_policy;
 828       break;
 829 
 830     default:
 831       ShouldNotReachHere();
 832   }
 833 
 834   // When using CallRuntime mark SOE registers as killed by the call
 835   // so values that could show up in the RegisterMap aren't live in a
 836   // callee saved register since the register wouldn't know where to
 837   // find them.  CallLeaf and CallLeafNoFP are ok because they can't
 838   // have debug info on them.  Strictly speaking this only needs to be
 839   // done for oops since idealreg2debugmask takes care of debug info
 840   // references but there no way to handle oops differently than other
 841   // pointers as far as the kill mask goes.
 842   bool exclude_soe = op == Op_CallRuntime;
 843 
 844   // If the call is a MethodHandle invoke, we need to exclude the
 845   // register which is used to save the SP value over MH invokes from
 846   // the mask.  Otherwise this register could be used for
 847   // deoptimization information.
 848   if (op == Op_CallStaticJava) {
 849     MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
 850     if (mcallstaticjava->_method_handle_invoke)
 851       proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
 852   }
 853 
 854   add_call_kills(proj, regs, save_policy, exclude_soe);
 855 
 856   return node_cnt;
 857 }
 858 
 859 
 860 //------------------------------schedule_local---------------------------------
 861 // Topological sort within a block.  Someday become a real scheduler.
 862 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
 863   // Already "sorted" are the block start Node (as the first entry), and
 864   // the block-ending Node and any trailing control projections.  We leave
 865   // these alone.  PhiNodes and ParmNodes are made to follow the block start
 866   // Node.  Everything else gets topo-sorted.
 867 
 868 #ifndef PRODUCT
 869     if (trace_opto_pipelining()) {
 870       tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
 871       for (uint i = 0;i < block->number_of_nodes(); i++) {
 872         tty->print("# ");
 873         block->get_node(i)->fast_dump();
 874       }
 875       tty->print_cr("#");
 876     }
 877 #endif
 878 
 879   // RootNode is already sorted
 880   if (block->number_of_nodes() == 1) {
 881     return true;
 882   }
 883 
 884   bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
 885 
 886   // We track the uses of local definitions as input dependences so that
 887   // we know when a given instruction is avialable to be scheduled.
 888   uint i;
 889   if (OptoRegScheduling && block_size_threshold_ok) {
 890     for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
 891       Node *n = block->get_node(i);
 892       n->remove_flag(Node::Flag_is_scheduled);
 893       if (!n->is_Phi()) {
 894         recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
 895       }
 896     }
 897   }
 898 
 899   // Move PhiNodes and ParmNodes from 1 to cnt up to the start
 900   uint node_cnt = block->end_idx();
 901   uint phi_cnt = 1;
 902   for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
 903     Node *n = block->get_node(i);
 904     if( n->is_Phi() ||          // Found a PhiNode or ParmNode
 905         (n->is_Proj()  && n->in(0) == block->head()) ) {
 906       // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
 907       block->map_node(block->get_node(phi_cnt), i);
 908       block->map_node(n, phi_cnt++);  // swap Phi/Parm up front
 909       if (OptoRegScheduling && block_size_threshold_ok) {
 910         // mark n as scheduled
 911         n->add_flag(Node::Flag_is_scheduled);
 912       }
 913     } else {                    // All others
 914       // Count block-local inputs to 'n'
 915       uint cnt = n->len();      // Input count
 916       uint local = 0;
 917       for( uint j=0; j<cnt; j++ ) {
 918         Node *m = n->in(j);
 919         if( m && get_block_for_node(m) == block && !m->is_top() )
 920           local++;              // One more block-local input
 921       }
 922       ready_cnt.at_put(n->_idx, local); // Count em up
 923 
 924 #ifdef ASSERT
 925       if( UseConcMarkSweepGC || UseG1GC ) {
 926         if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
 927           // Check the precedence edges
 928           for (uint prec = n->req(); prec < n->len(); prec++) {
 929             Node* oop_store = n->in(prec);
 930             if (oop_store != NULL) {
 931               assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
 932             }
 933           }
 934         }
 935       }
 936 #endif
 937 
 938       // A few node types require changing a required edge to a precedence edge
 939       // before allocation.
 940       if( n->is_Mach() && n->req() > TypeFunc::Parms &&
 941           (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
 942            n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
 943         // MemBarAcquire could be created without Precedent edge.
 944         // del_req() replaces the specified edge with the last input edge
 945         // and then removes the last edge. If the specified edge > number of
 946         // edges the last edge will be moved outside of the input edges array
 947         // and the edge will be lost. This is why this code should be
 948         // executed only when Precedent (== TypeFunc::Parms) edge is present.
 949         Node *x = n->in(TypeFunc::Parms);
 950         n->del_req(TypeFunc::Parms);
 951         n->add_prec(x);
 952       }
 953     }
 954   }
 955   for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
 956     ready_cnt.at_put(block->get_node(i2)->_idx, 0);
 957 
 958   // All the prescheduled guys do not hold back internal nodes
 959   uint i3;
 960   for (i3 = 0; i3 < phi_cnt; i3++) {  // For all pre-scheduled
 961     Node *n = block->get_node(i3);       // Get pre-scheduled
 962     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 963       Node* m = n->fast_out(j);
 964       if (get_block_for_node(m) == block) { // Local-block user
 965         int m_cnt = ready_cnt.at(m->_idx)-1;
 966         if (OptoRegScheduling && block_size_threshold_ok) {
 967           // mark m as scheduled
 968           if (m_cnt < 0) {
 969             m->add_flag(Node::Flag_is_scheduled);
 970           }
 971         }
 972         ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
 973       }
 974     }
 975   }
 976 
 977   Node_List delay;
 978   // Make a worklist
 979   Node_List worklist;
 980   for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
 981     Node *m = block->get_node(i4);
 982     if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
 983       if (m->is_iteratively_computed()) {
 984         // Push induction variable increments last to allow other uses
 985         // of the phi to be scheduled first. The select() method breaks
 986         // ties in scheduling by worklist order.
 987         delay.push(m);
 988       } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
 989         // Force the CreateEx to the top of the list so it's processed
 990         // first and ends up at the start of the block.
 991         worklist.insert(0, m);
 992       } else {
 993         worklist.push(m);         // Then on to worklist!
 994       }
 995     }
 996   }
 997   while (delay.size()) {
 998     Node* d = delay.pop();
 999     worklist.push(d);
1000   }
1001 
1002   if (OptoRegScheduling && block_size_threshold_ok) {
1003     // To stage register pressure calculations we need to examine the live set variables
1004     // breaking them up by register class to compartmentalize the calculations.
1005     uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1006     _regalloc->_sched_int_pressure.init(INTPRESSURE);
1007     _regalloc->_sched_float_pressure.init(float_pressure);
1008     _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1009     _regalloc->_scratch_float_pressure.init(float_pressure);
1010 
1011     _regalloc->compute_entry_block_pressure(block);
1012   }
1013 
1014   // Warm up the 'next_call' heuristic bits
1015   needed_for_next_call(block, block->head(), next_call);
1016 
1017 #ifndef PRODUCT
1018     if (trace_opto_pipelining()) {
1019       for (uint j=0; j< block->number_of_nodes(); j++) {
1020         Node     *n = block->get_node(j);
1021         int     idx = n->_idx;
1022         tty->print("#   ready cnt:%3d  ", ready_cnt.at(idx));
1023         tty->print("latency:%3d  ", get_latency_for_node(n));
1024         tty->print("%4d: %s\n", idx, n->Name());
1025       }
1026     }
1027 #endif
1028 
1029   uint max_idx = (uint)ready_cnt.length();
1030   // Pull from worklist and schedule
1031   while( worklist.size() ) {    // Worklist is not ready
1032 
1033 #ifndef PRODUCT
1034     if (trace_opto_pipelining()) {
1035       tty->print("#   ready list:");
1036       for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1037         Node *n = worklist[i];      // Get Node on worklist
1038         tty->print(" %d", n->_idx);
1039       }
1040       tty->cr();
1041     }
1042 #endif
1043 
1044     // Select and pop a ready guy from worklist
1045     Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1046     block->map_node(n, phi_cnt++);    // Schedule him next
1047 
1048     if (OptoRegScheduling && block_size_threshold_ok) {
1049       n->add_flag(Node::Flag_is_scheduled);
1050 
1051       // Now adjust the resister pressure with the node we selected
1052       if (!n->is_Phi()) {
1053         adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1054       }
1055     }
1056 
1057 #ifndef PRODUCT
1058     if (trace_opto_pipelining()) {
1059       tty->print("#    select %d: %s", n->_idx, n->Name());
1060       tty->print(", latency:%d", get_latency_for_node(n));
1061       n->dump();
1062       if (Verbose) {
1063         tty->print("#   ready list:");
1064         for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1065           Node *n = worklist[i];      // Get Node on worklist
1066           tty->print(" %d", n->_idx);
1067         }
1068         tty->cr();
1069       }
1070     }
1071 
1072 #endif
1073     if( n->is_MachCall() ) {
1074       MachCallNode *mcall = n->as_MachCall();
1075       phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1076       continue;
1077     }
1078 
1079     if (n->is_Mach() && n->as_Mach()->has_call()) {
1080       RegMask regs;
1081       regs.Insert(_matcher.c_frame_pointer());
1082       regs.OR(n->out_RegMask());
1083 
1084       MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1085       map_node_to_block(proj, block);
1086       block->insert_node(proj, phi_cnt++);
1087 
1088       add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1089     }
1090 
1091     // Children are now all ready
1092     for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1093       Node* m = n->fast_out(i5); // Get user
1094       if (get_block_for_node(m) != block) {
1095         continue;
1096       }
1097       if( m->is_Phi() ) continue;
1098       if (m->_idx >= max_idx) { // new node, skip it
1099         assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1100         continue;
1101       }
1102       int m_cnt = ready_cnt.at(m->_idx) - 1;
1103       ready_cnt.at_put(m->_idx, m_cnt);
1104       if( m_cnt == 0 )
1105         worklist.push(m);
1106     }
1107   }
1108 
1109   if( phi_cnt != block->end_idx() ) {
1110     // did not schedule all.  Retry, Bailout, or Die
1111     if (C->subsume_loads() == true && !C->failing()) {
1112       // Retry with subsume_loads == false
1113       // If this is the first failure, the sentinel string will "stick"
1114       // to the Compile object, and the C2Compiler will see it and retry.
1115       C->record_failure(C2Compiler::retry_no_subsuming_loads());
1116     }
1117     // assert( phi_cnt == end_idx(), "did not schedule all" );
1118     return false;
1119   }
1120 
1121   if (OptoRegScheduling && block_size_threshold_ok) {
1122     _regalloc->compute_exit_block_pressure(block);
1123     block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1124     block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1125   }
1126 
1127 #ifndef PRODUCT
1128   if (trace_opto_pipelining()) {
1129     tty->print_cr("#");
1130     tty->print_cr("# after schedule_local");
1131     for (uint i = 0;i < block->number_of_nodes();i++) {
1132       tty->print("# ");
1133       block->get_node(i)->fast_dump();
1134     }
1135     tty->print_cr("# ");
1136 
1137     if (OptoRegScheduling && block_size_threshold_ok) {
1138       tty->print_cr("# pressure info : %d", block->_pre_order);
1139       _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1140       _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1141     }
1142     tty->cr();
1143   }
1144 #endif
1145 
1146   return true;
1147 }
1148 
1149 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1150 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1151   for (uint l = 0; l < use->len(); l++) {
1152     if (use->in(l) == old_def) {
1153       if (l < use->req()) {
1154         use->set_req(l, new_def);
1155       } else {
1156         use->rm_prec(l);
1157         use->add_prec(new_def);
1158         l--;
1159       }
1160     }
1161   }
1162 }
1163 
1164 //------------------------------catch_cleanup_find_cloned_def------------------
1165 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1166   assert( use_blk != def_blk, "Inter-block cleanup only");
1167 
1168   // The use is some block below the Catch.  Find and return the clone of the def
1169   // that dominates the use. If there is no clone in a dominating block, then
1170   // create a phi for the def in a dominating block.
1171 
1172   // Find which successor block dominates this use.  The successor
1173   // blocks must all be single-entry (from the Catch only; I will have
1174   // split blocks to make this so), hence they all dominate.
1175   while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1176     use_blk = use_blk->_idom;
1177 
1178   // Find the successor
1179   Node *fixup = NULL;
1180 
1181   uint j;
1182   for( j = 0; j < def_blk->_num_succs; j++ )
1183     if( use_blk == def_blk->_succs[j] )
1184       break;
1185 
1186   if( j == def_blk->_num_succs ) {
1187     // Block at same level in dom-tree is not a successor.  It needs a
1188     // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1189     Node_Array inputs = new Node_List(Thread::current()->resource_area());
1190     for(uint k = 1; k < use_blk->num_preds(); k++) {
1191       Block* block = get_block_for_node(use_blk->pred(k));
1192       inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1193     }
1194 
1195     // Check to see if the use_blk already has an identical phi inserted.
1196     // If it exists, it will be at the first position since all uses of a
1197     // def are processed together.
1198     Node *phi = use_blk->get_node(1);
1199     if( phi->is_Phi() ) {
1200       fixup = phi;
1201       for (uint k = 1; k < use_blk->num_preds(); k++) {
1202         if (phi->in(k) != inputs[k]) {
1203           // Not a match
1204           fixup = NULL;
1205           break;
1206         }
1207       }
1208     }
1209 
1210     // If an existing PhiNode was not found, make a new one.
1211     if (fixup == NULL) {
1212       Node *new_phi = PhiNode::make(use_blk->head(), def);
1213       use_blk->insert_node(new_phi, 1);
1214       map_node_to_block(new_phi, use_blk);
1215       for (uint k = 1; k < use_blk->num_preds(); k++) {
1216         new_phi->set_req(k, inputs[k]);
1217       }
1218       fixup = new_phi;
1219     }
1220 
1221   } else {
1222     // Found the use just below the Catch.  Make it use the clone.
1223     fixup = use_blk->get_node(n_clone_idx);
1224   }
1225 
1226   return fixup;
1227 }
1228 
1229 //--------------------------catch_cleanup_intra_block--------------------------
1230 // Fix all input edges in use that reference "def".  The use is in the same
1231 // block as the def and both have been cloned in each successor block.
1232 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1233 
1234   // Both the use and def have been cloned. For each successor block,
1235   // get the clone of the use, and make its input the clone of the def
1236   // found in that block.
1237 
1238   uint use_idx = blk->find_node(use);
1239   uint offset_idx = use_idx - beg;
1240   for( uint k = 0; k < blk->_num_succs; k++ ) {
1241     // Get clone in each successor block
1242     Block *sb = blk->_succs[k];
1243     Node *clone = sb->get_node(offset_idx+1);
1244     assert( clone->Opcode() == use->Opcode(), "" );
1245 
1246     // Make use-clone reference the def-clone
1247     catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1248   }
1249 }
1250 
1251 //------------------------------catch_cleanup_inter_block---------------------
1252 // Fix all input edges in use that reference "def".  The use is in a different
1253 // block than the def.
1254 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1255   if( !use_blk ) return;        // Can happen if the use is a precedence edge
1256 
1257   Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1258   catch_cleanup_fix_all_inputs(use, def, new_def);
1259 }
1260 
1261 //------------------------------call_catch_cleanup-----------------------------
1262 // If we inserted any instructions between a Call and his CatchNode,
1263 // clone the instructions on all paths below the Catch.
1264 void PhaseCFG::call_catch_cleanup(Block* block) {
1265 
1266   // End of region to clone
1267   uint end = block->end_idx();
1268   if( !block->get_node(end)->is_Catch() ) return;
1269   // Start of region to clone
1270   uint beg = end;
1271   while(!block->get_node(beg-1)->is_MachProj() ||
1272         !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1273     beg--;
1274     assert(beg > 0,"Catch cleanup walking beyond block boundary");
1275   }
1276   // Range of inserted instructions is [beg, end)
1277   if( beg == end ) return;
1278 
1279   // Clone along all Catch output paths.  Clone area between the 'beg' and
1280   // 'end' indices.
1281   for( uint i = 0; i < block->_num_succs; i++ ) {
1282     Block *sb = block->_succs[i];
1283     // Clone the entire area; ignoring the edge fixup for now.
1284     for( uint j = end; j > beg; j-- ) {
1285       // It is safe here to clone a node with anti_dependence
1286       // since clones dominate on each path.
1287       Node *clone = block->get_node(j-1)->clone();
1288       sb->insert_node(clone, 1);
1289       map_node_to_block(clone, sb);
1290     }
1291   }
1292 
1293 
1294   // Fixup edges.  Check the def-use info per cloned Node
1295   for(uint i2 = beg; i2 < end; i2++ ) {
1296     uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1297     Node *n = block->get_node(i2);        // Node that got cloned
1298     // Need DU safe iterator because of edge manipulation in calls.
1299     Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
1300     for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1301       out->push(n->fast_out(j1));
1302     }
1303     uint max = out->size();
1304     for (uint j = 0; j < max; j++) {// For all users
1305       Node *use = out->pop();
1306       Block *buse = get_block_for_node(use);
1307       if( use->is_Phi() ) {
1308         for( uint k = 1; k < use->req(); k++ )
1309           if( use->in(k) == n ) {
1310             Block* b = get_block_for_node(buse->pred(k));
1311             Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1312             use->set_req(k, fixup);
1313           }
1314       } else {
1315         if (block == buse) {
1316           catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1317         } else {
1318           catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1319         }
1320       }
1321     } // End for all users
1322 
1323   } // End of for all Nodes in cloned area
1324 
1325   // Remove the now-dead cloned ops
1326   for(uint i3 = beg; i3 < end; i3++ ) {
1327     block->get_node(beg)->disconnect_inputs(NULL, C);
1328     block->remove_node(beg);
1329   }
1330 
1331   // If the successor blocks have a CreateEx node, move it back to the top
1332   for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1333     Block *sb = block->_succs[i4];
1334     uint new_cnt = end - beg;
1335     // Remove any newly created, but dead, nodes.
1336     for( uint j = new_cnt; j > 0; j-- ) {
1337       Node *n = sb->get_node(j);
1338       if (n->outcnt() == 0 &&
1339           (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1340         n->disconnect_inputs(NULL, C);
1341         sb->remove_node(j);
1342         new_cnt--;
1343       }
1344     }
1345     // If any newly created nodes remain, move the CreateEx node to the top
1346     if (new_cnt > 0) {
1347       Node *cex = sb->get_node(1+new_cnt);
1348       if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1349         sb->remove_node(1+new_cnt);
1350         sb->insert_node(cex, 1);
1351       }
1352     }
1353   }
1354 }