1 /*
   2  * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #ifndef OS_CPU_AIX_PPC_VM_PREFETCH_AIX_PPC_INLINE_HPP
  27 #define OS_CPU_AIX_PPC_VM_PREFETCH_AIX_PPC_INLINE_HPP
  28 
  29 #include "runtime/prefetch.hpp"
  30 
  31 
  32 inline void Prefetch::read(void *loc, intx interval) {
  33 #if !defined(USE_XLC_BUILTINS)
  34   __asm__ __volatile__ (
  35     "   dcbt   0, %0       \n"
  36     :
  37     : /*%0*/"r" ( ((address)loc) +((long)interval) )
  38     //:
  39     );
  40 #else
  41   __dcbt(((address)loc) +((long)interval));
  42 #endif
  43 }
  44 
  45 inline void Prefetch::write(void *loc, intx interval) {
  46 #if !defined(USE_XLC_PREFETCH_WRITE_BUILTIN)
  47   __asm__ __volatile__ (
  48     "   dcbtst 0, %0       \n"
  49     :
  50     : /*%0*/"r" ( ((address)loc) +((long)interval) )
  51     //:
  52     );
  53 #else
  54   __dcbtst( ((address)loc) +((long)interval) );
  55 #endif
  56 }
  57 
  58 #endif // OS_CPU_AIX_PPC_VM_PREFETCH_AIX_PPC_INLINE_HPP