25 #include "precompiled.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/sharedRuntime.hpp"
32
33 Register LIR_OprDesc::as_register() const {
34 return FrameMap::cpu_rnr2reg(cpu_regnr());
35 }
36
37 Register LIR_OprDesc::as_register_lo() const {
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
39 }
40
41 Register LIR_OprDesc::as_register_hi() const {
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
43 }
44
45 #if defined(X86)
46
47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
48 return FrameMap::nr2xmmreg(xmm_regnr());
49 }
50
51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
52 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
53 return FrameMap::nr2xmmreg(xmm_regnrLo());
54 }
55
56 #endif // X86
57
58 #if defined(SPARC) || defined(PPC32)
59
60 FloatRegister LIR_OprDesc::as_float_reg() const {
61 return FrameMap::nr2floatreg(fpu_regnr());
62 }
63
64 FloatRegister LIR_OprDesc::as_double_reg() const {
65 return FrameMap::nr2floatreg(fpu_regnrHi());
66 }
67
68 #endif
69
70 #if defined(ARM) || defined(AARCH64) || defined(PPC64)
71
72 FloatRegister LIR_OprDesc::as_float_reg() const {
73 return as_FloatRegister(fpu_regnr());
74 }
75
76 FloatRegister LIR_OprDesc::as_double_reg() const {
77 return as_FloatRegister(fpu_regnrLo());
78 }
79
80 #endif
81
82
83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
84
85 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
86 ValueTag tag = type->tag();
87 switch (tag) {
88 case metaDataTag : {
89 ClassConstant* c = type->as_ClassConstant();
90 if (c != NULL && !c->value()->is_loaded()) {
91 return LIR_OprFact::metadataConst(NULL);
92 } else if (c != NULL) {
93 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
94 } else {
95 MethodConstant* m = type->as_MethodConstant();
96 assert (m != NULL, "not a class or a method?");
97 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
98 }
99 }
100 case objectTag : {
122 }
123 return illegalOpr;
124 }
125
126
127
128 //---------------------------------------------------
129
130
131 LIR_Address::Scale LIR_Address::scale(BasicType type) {
132 int elem_size = type2aelembytes(type);
133 switch (elem_size) {
134 case 1: return LIR_Address::times_1;
135 case 2: return LIR_Address::times_2;
136 case 4: return LIR_Address::times_4;
137 case 8: return LIR_Address::times_8;
138 }
139 ShouldNotReachHere();
140 return LIR_Address::times_1;
141 }
142
143
144 #ifndef PRODUCT
145 void LIR_Address::verify0() const {
146 #if defined(SPARC) || defined(PPC)
147 assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
148 assert(disp() == 0 || index()->is_illegal(), "can't have both");
149 #endif
150 #ifdef _LP64
151 assert(base()->is_cpu_register(), "wrong base operand");
152 #ifndef AARCH64
153 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
154 #else
155 assert(index()->is_illegal() || index()->is_double_cpu() || index()->is_single_cpu(), "wrong index operand");
156 #endif
157 assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
158 "wrong type for addresses");
159 #else
160 assert(base()->is_single_cpu(), "wrong base operand");
161 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
162 assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
163 "wrong type for addresses");
164 #endif
165 }
166 #endif
167
168
169 //---------------------------------------------------
170
171 char LIR_OprDesc::type_char(BasicType t) {
172 switch (t) {
173 case T_ARRAY:
174 t = T_OBJECT;
175 case T_BOOLEAN:
176 case T_CHAR:
177 case T_FLOAT:
178 case T_DOUBLE:
179 case T_BYTE:
180 case T_SHORT:
181 case T_INT:
182 case T_LONG:
183 case T_OBJECT:
184 case T_ADDRESS:
185 case T_VOID:
186 return ::type2char(t);
187 case T_METADATA:
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25 #include "precompiled.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/sharedRuntime.hpp"
32
33 Register LIR_OprDesc::as_register() const {
34 return FrameMap::cpu_rnr2reg(cpu_regnr());
35 }
36
37 Register LIR_OprDesc::as_register_lo() const {
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
39 }
40
41 Register LIR_OprDesc::as_register_hi() const {
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
43 }
44
45 #ifdef PPC32
46 FloatRegister LIR_OprDesc::as_float_reg() const {
47 return FrameMap::nr2floatreg(fpu_regnr());
48 }
49
50 FloatRegister LIR_OprDesc::as_double_reg() const {
51 return FrameMap::nr2floatreg(fpu_regnrHi());
52 }
53 // Reg2 unused.
54 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) {
55 assert(reg2 == -1 /*fnoreg*/, "Not used on this platform");
56 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
57 (reg << LIR_OprDesc::reg2_shift) |
58 LIR_OprDesc::double_type |
59 LIR_OprDesc::fpu_register |
60 LIR_OprDesc::double_size);
61 }
62 #ifndef PRODUCT
63 #if defined(LIR_ADDRESS_PD_VERIFY)
64 void LIR_Address::verify() const { pd_verify(); }
65 #else
66 void LIR_Address::verify() const {
67 assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
68 assert(disp() == 0 || index()->is_illegal(), "can't have both");
69 assert(base()->is_single_cpu(), "wrong base operand");
70 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
71 assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
72 "wrong type for addresses");
73 }
74 #endif // (LIR_ADDRESS_PD_VERIFY
75 #endif // PRODUCT
76 #endif // PPC32
77
78 #ifdef ARM
79 FloatRegister LIR_OprDesc::as_float_reg() const {
80 return as_FloatRegister(fpu_regnr());
81 }
82 FloatRegister LIR_OprDesc::as_double_reg() const {
83 return as_FloatRegister(fpu_regnrLo());
84 }
85 #ifndef PRODUCT
86 #if defined(LIR_ADDRESS_PD_VERIFY)
87 void verify() const { pd_verify(); }
88 #else
89 void LIR_Address::verify() const {
90 assert(base()->is_single_cpu(), "wrong base operand");
91 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
92 assert(scale() == times_1, "Scaled addressing mode not available on PPC and should not be used");
93 assert(disp() == 0 || index()->is_illegal(), "can't have both");
94 assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
95 "wrong type for addresses");
96 }
97 #endif // LIR_ADDRESS_PD_VERIFY
98 #endif // PRODUCT
99 #endif // ARM
100 #ifdef ARM32
101 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) {
102 assert(reg2 != fnoreg->encoding(), "Arm32 holds double in two regs.");
103 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
104 (reg2 << LIR_OprDesc::reg2_shift) |
105 LIR_OprDesc::double_type |
106 LIR_OprDesc::fpu_register |
107 LIR_OprDesc::double_size);
108 }
109 #endif // ARM32
110
111
112 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
113
114 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
115 ValueTag tag = type->tag();
116 switch (tag) {
117 case metaDataTag : {
118 ClassConstant* c = type->as_ClassConstant();
119 if (c != NULL && !c->value()->is_loaded()) {
120 return LIR_OprFact::metadataConst(NULL);
121 } else if (c != NULL) {
122 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
123 } else {
124 MethodConstant* m = type->as_MethodConstant();
125 assert (m != NULL, "not a class or a method?");
126 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
127 }
128 }
129 case objectTag : {
151 }
152 return illegalOpr;
153 }
154
155
156
157 //---------------------------------------------------
158
159
160 LIR_Address::Scale LIR_Address::scale(BasicType type) {
161 int elem_size = type2aelembytes(type);
162 switch (elem_size) {
163 case 1: return LIR_Address::times_1;
164 case 2: return LIR_Address::times_2;
165 case 4: return LIR_Address::times_4;
166 case 8: return LIR_Address::times_8;
167 }
168 ShouldNotReachHere();
169 return LIR_Address::times_1;
170 }
171
172 //---------------------------------------------------
173
174 char LIR_OprDesc::type_char(BasicType t) {
175 switch (t) {
176 case T_ARRAY:
177 t = T_OBJECT;
178 case T_BOOLEAN:
179 case T_CHAR:
180 case T_FLOAT:
181 case T_DOUBLE:
182 case T_BYTE:
183 case T_SHORT:
184 case T_INT:
185 case T_LONG:
186 case T_OBJECT:
187 case T_ADDRESS:
188 case T_VOID:
189 return ::type2char(t);
190 case T_METADATA:
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