rev 12113 : 8166561: [s390] Adaptions needed for s390 port in C1 and C2.

   1 /*
   2  * Copyright (c) 2000, 2016, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_InstructionPrinter.hpp"
  27 #include "c1/c1_LIR.hpp"
  28 #include "c1/c1_LIRAssembler.hpp"
  29 #include "c1/c1_ValueStack.hpp"
  30 #include "ci/ciInstance.hpp"
  31 #include "runtime/sharedRuntime.hpp"
  32 
  33 Register LIR_OprDesc::as_register() const {
  34   return FrameMap::cpu_rnr2reg(cpu_regnr());
  35 }
  36 
  37 Register LIR_OprDesc::as_register_lo() const {
  38   return FrameMap::cpu_rnr2reg(cpu_regnrLo());
  39 }
  40 
  41 Register LIR_OprDesc::as_register_hi() const {
  42   return FrameMap::cpu_rnr2reg(cpu_regnrHi());
  43 }
  44 
  45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
  46 
  47 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
  48   ValueTag tag = type->tag();
  49   switch (tag) {
  50   case metaDataTag : {
  51     ClassConstant* c = type->as_ClassConstant();
  52     if (c != NULL && !c->value()->is_loaded()) {
  53       return LIR_OprFact::metadataConst(NULL);
  54     } else if (c != NULL) {
  55       return LIR_OprFact::metadataConst(c->value()->constant_encoding());
  56     } else {
  57       MethodConstant* m = type->as_MethodConstant();
  58       assert (m != NULL, "not a class or a method?");
  59       return LIR_OprFact::metadataConst(m->value()->constant_encoding());
  60     }
  61   }
  62   case objectTag : {
  63       return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
  64     }
  65   case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
  66   case intTag    : return LIR_OprFact::intConst(type->as_IntConstant()->value());
  67   case floatTag  : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
  68   case longTag   : return LIR_OprFact::longConst(type->as_LongConstant()->value());
  69   case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
  70   default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
  71   }
  72 }
  73 
  74 
  75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
  76   switch (type->tag()) {
  77     case objectTag: return LIR_OprFact::oopConst(NULL);
  78     case addressTag:return LIR_OprFact::addressConst(0);
  79     case intTag:    return LIR_OprFact::intConst(0);
  80     case floatTag:  return LIR_OprFact::floatConst(0.0);
  81     case longTag:   return LIR_OprFact::longConst(0);
  82     case doubleTag: return LIR_OprFact::doubleConst(0.0);
  83     default:        ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
  84   }
  85   return illegalOpr;
  86 }
  87 
  88 
  89 
  90 //---------------------------------------------------
  91 
  92 
  93 LIR_Address::Scale LIR_Address::scale(BasicType type) {
  94   int elem_size = type2aelembytes(type);
  95   switch (elem_size) {
  96   case 1: return LIR_Address::times_1;
  97   case 2: return LIR_Address::times_2;
  98   case 4: return LIR_Address::times_4;
  99   case 8: return LIR_Address::times_8;
 100   }
 101   ShouldNotReachHere();
 102   return LIR_Address::times_1;
 103 }
 104 
 105 //---------------------------------------------------
 106 
 107 char LIR_OprDesc::type_char(BasicType t) {
 108   switch (t) {
 109     case T_ARRAY:
 110       t = T_OBJECT;
 111     case T_BOOLEAN:
 112     case T_CHAR:
 113     case T_FLOAT:
 114     case T_DOUBLE:
 115     case T_BYTE:
 116     case T_SHORT:
 117     case T_INT:
 118     case T_LONG:
 119     case T_OBJECT:
 120     case T_ADDRESS:
 121     case T_VOID:
 122       return ::type2char(t);
 123     case T_METADATA:
 124       return 'M';
 125     case T_ILLEGAL:
 126       return '?';
 127 
 128     default:
 129       ShouldNotReachHere();
 130       return '?';
 131   }
 132 }
 133 
 134 #ifndef PRODUCT
 135 void LIR_OprDesc::validate_type() const {
 136 
 137 #ifdef ASSERT
 138   if (!is_pointer() && !is_illegal()) {
 139     OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
 140     switch (as_BasicType(type_field())) {
 141     case T_LONG:
 142       assert((kindfield == cpu_register || kindfield == stack_value) &&
 143              size_field() == double_size, "must match");
 144       break;
 145     case T_FLOAT:
 146       // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
 147       assert((kindfield == fpu_register || kindfield == stack_value
 148              ARM_ONLY(|| kindfield == cpu_register)
 149              PPC32_ONLY(|| kindfield == cpu_register) ) &&
 150              size_field() == single_size, "must match");
 151       break;
 152     case T_DOUBLE:
 153       // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
 154       assert((kindfield == fpu_register || kindfield == stack_value
 155              ARM_ONLY(|| kindfield == cpu_register)
 156              PPC32_ONLY(|| kindfield == cpu_register) ) &&
 157              size_field() == double_size, "must match");
 158       break;
 159     case T_BOOLEAN:
 160     case T_CHAR:
 161     case T_BYTE:
 162     case T_SHORT:
 163     case T_INT:
 164     case T_ADDRESS:
 165     case T_OBJECT:
 166     case T_METADATA:
 167     case T_ARRAY:
 168       assert((kindfield == cpu_register || kindfield == stack_value) &&
 169              size_field() == single_size, "must match");
 170       break;
 171 
 172     case T_ILLEGAL:
 173       // XXX TKR also means unknown right now
 174       // assert(is_illegal(), "must match");
 175       break;
 176 
 177     default:
 178       ShouldNotReachHere();
 179     }
 180   }
 181 #endif
 182 
 183 }
 184 #endif // PRODUCT
 185 
 186 
 187 bool LIR_OprDesc::is_oop() const {
 188   if (is_pointer()) {
 189     return pointer()->is_oop_pointer();
 190   } else {
 191     OprType t= type_field();
 192     assert(t != unknown_type, "not set");
 193     return t == object_type;
 194   }
 195 }
 196 
 197 
 198 
 199 void LIR_Op2::verify() const {
 200 #ifdef ASSERT
 201   switch (code()) {
 202     case lir_cmove:
 203     case lir_xchg:
 204       break;
 205 
 206     default:
 207       assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
 208              "can't produce oops from arith");
 209   }
 210 
 211   if (TwoOperandLIRForm) {
 212 
 213 #ifdef ASSERT
 214     bool threeOperandForm = false;
 215 #ifdef S390
 216     // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
 217     threeOperandForm =
 218       code() == lir_shl ||
 219       ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
 220 #endif
 221 #endif
 222 
 223     switch (code()) {
 224     case lir_add:
 225     case lir_sub:
 226     case lir_mul:
 227     case lir_mul_strictfp:
 228     case lir_div:
 229     case lir_div_strictfp:
 230     case lir_rem:
 231     case lir_logic_and:
 232     case lir_logic_or:
 233     case lir_logic_xor:
 234     case lir_shl:
 235     case lir_shr:
 236       assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
 237       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 238       break;
 239 
 240     // special handling for lir_ushr because of write barriers
 241     case lir_ushr:
 242       assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
 243       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 244       break;
 245 
 246     }
 247   }
 248 #endif
 249 }
 250 
 251 
 252 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
 253   : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 254   , _cond(cond)
 255   , _type(type)
 256   , _label(block->label())
 257   , _block(block)
 258   , _ublock(NULL)
 259   , _stub(NULL) {
 260 }
 261 
 262 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
 263   LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 264   , _cond(cond)
 265   , _type(type)
 266   , _label(stub->entry())
 267   , _block(NULL)
 268   , _ublock(NULL)
 269   , _stub(stub) {
 270 }
 271 
 272 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
 273   : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 274   , _cond(cond)
 275   , _type(type)
 276   , _label(block->label())
 277   , _block(block)
 278   , _ublock(ublock)
 279   , _stub(NULL)
 280 {
 281 }
 282 
 283 void LIR_OpBranch::change_block(BlockBegin* b) {
 284   assert(_block != NULL, "must have old block");
 285   assert(_block->label() == label(), "must be equal");
 286 
 287   _block = b;
 288   _label = b->label();
 289 }
 290 
 291 void LIR_OpBranch::change_ublock(BlockBegin* b) {
 292   assert(_ublock != NULL, "must have old block");
 293   _ublock = b;
 294 }
 295 
 296 void LIR_OpBranch::negate_cond() {
 297   switch (_cond) {
 298     case lir_cond_equal:        _cond = lir_cond_notEqual;     break;
 299     case lir_cond_notEqual:     _cond = lir_cond_equal;        break;
 300     case lir_cond_less:         _cond = lir_cond_greaterEqual; break;
 301     case lir_cond_lessEqual:    _cond = lir_cond_greater;      break;
 302     case lir_cond_greaterEqual: _cond = lir_cond_less;         break;
 303     case lir_cond_greater:      _cond = lir_cond_lessEqual;    break;
 304     default: ShouldNotReachHere();
 305   }
 306 }
 307 
 308 
 309 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
 310                                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
 311                                  bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
 312                                  CodeStub* stub)
 313 
 314   : LIR_Op(code, result, NULL)
 315   , _object(object)
 316   , _array(LIR_OprFact::illegalOpr)
 317   , _klass(klass)
 318   , _tmp1(tmp1)
 319   , _tmp2(tmp2)
 320   , _tmp3(tmp3)
 321   , _fast_check(fast_check)
 322   , _stub(stub)
 323   , _info_for_patch(info_for_patch)
 324   , _info_for_exception(info_for_exception)
 325   , _profiled_method(NULL)
 326   , _profiled_bci(-1)
 327   , _should_profile(false)
 328 {
 329   if (code == lir_checkcast) {
 330     assert(info_for_exception != NULL, "checkcast throws exceptions");
 331   } else if (code == lir_instanceof) {
 332     assert(info_for_exception == NULL, "instanceof throws no exceptions");
 333   } else {
 334     ShouldNotReachHere();
 335   }
 336 }
 337 
 338 
 339 
 340 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
 341   : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
 342   , _object(object)
 343   , _array(array)
 344   , _klass(NULL)
 345   , _tmp1(tmp1)
 346   , _tmp2(tmp2)
 347   , _tmp3(tmp3)
 348   , _fast_check(false)
 349   , _stub(NULL)
 350   , _info_for_patch(NULL)
 351   , _info_for_exception(info_for_exception)
 352   , _profiled_method(NULL)
 353   , _profiled_bci(-1)
 354   , _should_profile(false)
 355 {
 356   if (code == lir_store_check) {
 357     _stub = new ArrayStoreExceptionStub(object, info_for_exception);
 358     assert(info_for_exception != NULL, "store_check throws exceptions");
 359   } else {
 360     ShouldNotReachHere();
 361   }
 362 }
 363 
 364 
 365 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
 366                                  LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
 367   : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
 368   , _tmp(tmp)
 369   , _src(src)
 370   , _src_pos(src_pos)
 371   , _dst(dst)
 372   , _dst_pos(dst_pos)
 373   , _flags(flags)
 374   , _expected_type(expected_type)
 375   , _length(length) {
 376   _stub = new ArrayCopyStub(this);
 377 }
 378 
 379 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
 380   : LIR_Op(lir_updatecrc32, res, NULL)
 381   , _crc(crc)
 382   , _val(val) {
 383 }
 384 
 385 //-------------------verify--------------------------
 386 
 387 void LIR_Op1::verify() const {
 388   switch(code()) {
 389   case lir_move:
 390     assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
 391     break;
 392   case lir_null_check:
 393     assert(in_opr()->is_register(), "must be");
 394     break;
 395   case lir_return:
 396     assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
 397     break;
 398   }
 399 }
 400 
 401 void LIR_OpRTCall::verify() const {
 402   assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
 403 }
 404 
 405 //-------------------visits--------------------------
 406 
 407 // complete rework of LIR instruction visitor.
 408 // The virtual call for each instruction type is replaced by a big
 409 // switch that adds the operands for each instruction
 410 
 411 void LIR_OpVisitState::visit(LIR_Op* op) {
 412   // copy information from the LIR_Op
 413   reset();
 414   set_op(op);
 415 
 416   switch (op->code()) {
 417 
 418 // LIR_Op0
 419     case lir_word_align:               // result and info always invalid
 420     case lir_backwardbranch_target:    // result and info always invalid
 421     case lir_build_frame:              // result and info always invalid
 422     case lir_fpop_raw:                 // result and info always invalid
 423     case lir_24bit_FPU:                // result and info always invalid
 424     case lir_reset_FPU:                // result and info always invalid
 425     case lir_breakpoint:               // result and info always invalid
 426     case lir_membar:                   // result and info always invalid
 427     case lir_membar_acquire:           // result and info always invalid
 428     case lir_membar_release:           // result and info always invalid
 429     case lir_membar_loadload:          // result and info always invalid
 430     case lir_membar_storestore:        // result and info always invalid
 431     case lir_membar_loadstore:         // result and info always invalid
 432     case lir_membar_storeload:         // result and info always invalid
 433     case lir_on_spin_wait:
 434     {
 435       assert(op->as_Op0() != NULL, "must be");
 436       assert(op->_info == NULL, "info not used by this instruction");
 437       assert(op->_result->is_illegal(), "not used");
 438       break;
 439     }
 440 
 441     case lir_nop:                      // may have info, result always invalid
 442     case lir_std_entry:                // may have result, info always invalid
 443     case lir_osr_entry:                // may have result, info always invalid
 444     case lir_get_thread:               // may have result, info always invalid
 445     {
 446       assert(op->as_Op0() != NULL, "must be");
 447       if (op->_info != NULL)           do_info(op->_info);
 448       if (op->_result->is_valid())     do_output(op->_result);
 449       break;
 450     }
 451 
 452 
 453 // LIR_OpLabel
 454     case lir_label:                    // result and info always invalid
 455     {
 456       assert(op->as_OpLabel() != NULL, "must be");
 457       assert(op->_info == NULL, "info not used by this instruction");
 458       assert(op->_result->is_illegal(), "not used");
 459       break;
 460     }
 461 
 462 
 463 // LIR_Op1
 464     case lir_fxch:           // input always valid, result and info always invalid
 465     case lir_fld:            // input always valid, result and info always invalid
 466     case lir_ffree:          // input always valid, result and info always invalid
 467     case lir_push:           // input always valid, result and info always invalid
 468     case lir_pop:            // input always valid, result and info always invalid
 469     case lir_return:         // input always valid, result and info always invalid
 470     case lir_leal:           // input and result always valid, info always invalid
 471     case lir_neg:            // input and result always valid, info always invalid
 472     case lir_monaddr:        // input and result always valid, info always invalid
 473     case lir_null_check:     // input and info always valid, result always invalid
 474     case lir_move:           // input and result always valid, may have info
 475     case lir_pack64:         // input and result always valid
 476     case lir_unpack64:       // input and result always valid
 477     {
 478       assert(op->as_Op1() != NULL, "must be");
 479       LIR_Op1* op1 = (LIR_Op1*)op;
 480 
 481       if (op1->_info)                  do_info(op1->_info);
 482       if (op1->_opr->is_valid())       do_input(op1->_opr);
 483       if (op1->_result->is_valid())    do_output(op1->_result);
 484 
 485       break;
 486     }
 487 
 488     case lir_safepoint:
 489     {
 490       assert(op->as_Op1() != NULL, "must be");
 491       LIR_Op1* op1 = (LIR_Op1*)op;
 492 
 493       assert(op1->_info != NULL, "");  do_info(op1->_info);
 494       if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
 495       assert(op1->_result->is_illegal(), "safepoint does not produce value");
 496 
 497       break;
 498     }
 499 
 500 // LIR_OpConvert;
 501     case lir_convert:        // input and result always valid, info always invalid
 502     {
 503       assert(op->as_OpConvert() != NULL, "must be");
 504       LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
 505 
 506       assert(opConvert->_info == NULL, "must be");
 507       if (opConvert->_opr->is_valid())       do_input(opConvert->_opr);
 508       if (opConvert->_result->is_valid())    do_output(opConvert->_result);
 509 #ifdef PPC32
 510       if (opConvert->_tmp1->is_valid())      do_temp(opConvert->_tmp1);
 511       if (opConvert->_tmp2->is_valid())      do_temp(opConvert->_tmp2);
 512 #endif
 513       do_stub(opConvert->_stub);
 514 
 515       break;
 516     }
 517 
 518 // LIR_OpBranch;
 519     case lir_branch:                   // may have info, input and result register always invalid
 520     case lir_cond_float_branch:        // may have info, input and result register always invalid
 521     {
 522       assert(op->as_OpBranch() != NULL, "must be");
 523       LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
 524 
 525       if (opBranch->_info != NULL)     do_info(opBranch->_info);
 526       assert(opBranch->_result->is_illegal(), "not used");
 527       if (opBranch->_stub != NULL)     opBranch->stub()->visit(this);
 528 
 529       break;
 530     }
 531 
 532 
 533 // LIR_OpAllocObj
 534     case lir_alloc_object:
 535     {
 536       assert(op->as_OpAllocObj() != NULL, "must be");
 537       LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
 538 
 539       if (opAllocObj->_info)                     do_info(opAllocObj->_info);
 540       if (opAllocObj->_opr->is_valid()) {        do_input(opAllocObj->_opr);
 541                                                  do_temp(opAllocObj->_opr);
 542                                         }
 543       if (opAllocObj->_tmp1->is_valid())         do_temp(opAllocObj->_tmp1);
 544       if (opAllocObj->_tmp2->is_valid())         do_temp(opAllocObj->_tmp2);
 545       if (opAllocObj->_tmp3->is_valid())         do_temp(opAllocObj->_tmp3);
 546       if (opAllocObj->_tmp4->is_valid())         do_temp(opAllocObj->_tmp4);
 547       if (opAllocObj->_result->is_valid())       do_output(opAllocObj->_result);
 548                                                  do_stub(opAllocObj->_stub);
 549       break;
 550     }
 551 
 552 
 553 // LIR_OpRoundFP;
 554     case lir_roundfp: {
 555       assert(op->as_OpRoundFP() != NULL, "must be");
 556       LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
 557 
 558       assert(op->_info == NULL, "info not used by this instruction");
 559       assert(opRoundFP->_tmp->is_illegal(), "not used");
 560       do_input(opRoundFP->_opr);
 561       do_output(opRoundFP->_result);
 562 
 563       break;
 564     }
 565 
 566 
 567 // LIR_Op2
 568     case lir_cmp:
 569     case lir_cmp_l2i:
 570     case lir_ucmp_fd2i:
 571     case lir_cmp_fd2i:
 572     case lir_add:
 573     case lir_sub:
 574     case lir_mul:
 575     case lir_div:
 576     case lir_rem:
 577     case lir_sqrt:
 578     case lir_abs:
 579     case lir_logic_and:
 580     case lir_logic_or:
 581     case lir_logic_xor:
 582     case lir_shl:
 583     case lir_shr:
 584     case lir_ushr:
 585     case lir_xadd:
 586     case lir_xchg:
 587     case lir_assert:
 588     {
 589       assert(op->as_Op2() != NULL, "must be");
 590       LIR_Op2* op2 = (LIR_Op2*)op;
 591       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 592              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 593 
 594       if (op2->_info)                     do_info(op2->_info);
 595       if (op2->_opr1->is_valid())         do_input(op2->_opr1);
 596       if (op2->_opr2->is_valid())         do_input(op2->_opr2);
 597       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 598       if (op2->_result->is_valid())       do_output(op2->_result);
 599       if (op->code() == lir_xchg || op->code() == lir_xadd) {
 600         // on ARM and PPC, return value is loaded first so could
 601         // destroy inputs. On other platforms that implement those
 602         // (x86, sparc), the extra constrainsts are harmless.
 603         if (op2->_opr1->is_valid())       do_temp(op2->_opr1);
 604         if (op2->_opr2->is_valid())       do_temp(op2->_opr2);
 605       }
 606 
 607       break;
 608     }
 609 
 610     // special handling for cmove: right input operand must not be equal
 611     // to the result operand, otherwise the backend fails
 612     case lir_cmove:
 613     {
 614       assert(op->as_Op2() != NULL, "must be");
 615       LIR_Op2* op2 = (LIR_Op2*)op;
 616 
 617       assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
 618              op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 619       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
 620 
 621       do_input(op2->_opr1);
 622       do_input(op2->_opr2);
 623       do_temp(op2->_opr2);
 624       do_output(op2->_result);
 625 
 626       break;
 627     }
 628 
 629     // vspecial handling for strict operations: register input operands
 630     // as temp to guarantee that they do not overlap with other
 631     // registers
 632     case lir_mul_strictfp:
 633     case lir_div_strictfp:
 634     {
 635       assert(op->as_Op2() != NULL, "must be");
 636       LIR_Op2* op2 = (LIR_Op2*)op;
 637 
 638       assert(op2->_info == NULL, "not used");
 639       assert(op2->_opr1->is_valid(), "used");
 640       assert(op2->_opr2->is_valid(), "used");
 641       assert(op2->_result->is_valid(), "used");
 642       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 643              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 644 
 645       do_input(op2->_opr1); do_temp(op2->_opr1);
 646       do_input(op2->_opr2); do_temp(op2->_opr2);
 647       if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
 648       do_output(op2->_result);
 649 
 650       break;
 651     }
 652 
 653     case lir_throw: {
 654       assert(op->as_Op2() != NULL, "must be");
 655       LIR_Op2* op2 = (LIR_Op2*)op;
 656 
 657       if (op2->_info)                     do_info(op2->_info);
 658       if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
 659       if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
 660       assert(op2->_result->is_illegal(), "no result");
 661       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 662              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 663 
 664       break;
 665     }
 666 
 667     case lir_unwind: {
 668       assert(op->as_Op1() != NULL, "must be");
 669       LIR_Op1* op1 = (LIR_Op1*)op;
 670 
 671       assert(op1->_info == NULL, "no info");
 672       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
 673       assert(op1->_result->is_illegal(), "no result");
 674 
 675       break;
 676     }
 677 
 678 // LIR_Op3
 679     case lir_idiv:
 680     case lir_irem:
 681     case lir_fmad:
 682     case lir_fmaf: {
 683       assert(op->as_Op3() != NULL, "must be");
 684       LIR_Op3* op3= (LIR_Op3*)op;
 685 
 686       if (op3->_info)                     do_info(op3->_info);
 687       if (op3->_opr1->is_valid())         do_input(op3->_opr1);
 688 
 689       // second operand is input and temp, so ensure that second operand
 690       // and third operand get not the same register
 691       if (op3->_opr2->is_valid())         do_input(op3->_opr2);
 692       if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
 693       if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
 694 
 695       if (op3->_result->is_valid())       do_output(op3->_result);
 696 
 697       break;
 698     }
 699 
 700 
 701 // LIR_OpJavaCall
 702     case lir_static_call:
 703     case lir_optvirtual_call:
 704     case lir_icvirtual_call:
 705     case lir_virtual_call:
 706     case lir_dynamic_call: {
 707       LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
 708       assert(opJavaCall != NULL, "must be");
 709 
 710       if (opJavaCall->_receiver->is_valid())     do_input(opJavaCall->_receiver);
 711 
 712       // only visit register parameters
 713       int n = opJavaCall->_arguments->length();
 714       for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
 715         if (!opJavaCall->_arguments->at(i)->is_pointer()) {
 716           do_input(*opJavaCall->_arguments->adr_at(i));
 717         }
 718       }
 719 
 720       if (opJavaCall->_info)                     do_info(opJavaCall->_info);
 721       if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
 722           opJavaCall->is_method_handle_invoke()) {
 723         opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
 724         do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
 725       }
 726       do_call();
 727       if (opJavaCall->_result->is_valid())       do_output(opJavaCall->_result);
 728 
 729       break;
 730     }
 731 
 732 
 733 // LIR_OpRTCall
 734     case lir_rtcall: {
 735       assert(op->as_OpRTCall() != NULL, "must be");
 736       LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
 737 
 738       // only visit register parameters
 739       int n = opRTCall->_arguments->length();
 740       for (int i = 0; i < n; i++) {
 741         if (!opRTCall->_arguments->at(i)->is_pointer()) {
 742           do_input(*opRTCall->_arguments->adr_at(i));
 743         }
 744       }
 745       if (opRTCall->_info)                     do_info(opRTCall->_info);
 746       if (opRTCall->_tmp->is_valid())          do_temp(opRTCall->_tmp);
 747       do_call();
 748       if (opRTCall->_result->is_valid())       do_output(opRTCall->_result);
 749 
 750       break;
 751     }
 752 
 753 
 754 // LIR_OpArrayCopy
 755     case lir_arraycopy: {
 756       assert(op->as_OpArrayCopy() != NULL, "must be");
 757       LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
 758 
 759       assert(opArrayCopy->_result->is_illegal(), "unused");
 760       assert(opArrayCopy->_src->is_valid(), "used");          do_input(opArrayCopy->_src);     do_temp(opArrayCopy->_src);
 761       assert(opArrayCopy->_src_pos->is_valid(), "used");      do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
 762       assert(opArrayCopy->_dst->is_valid(), "used");          do_input(opArrayCopy->_dst);     do_temp(opArrayCopy->_dst);
 763       assert(opArrayCopy->_dst_pos->is_valid(), "used");      do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
 764       assert(opArrayCopy->_length->is_valid(), "used");       do_input(opArrayCopy->_length);  do_temp(opArrayCopy->_length);
 765       assert(opArrayCopy->_tmp->is_valid(), "used");          do_temp(opArrayCopy->_tmp);
 766       if (opArrayCopy->_info)                     do_info(opArrayCopy->_info);
 767 
 768       // the implementation of arraycopy always has a call into the runtime
 769       do_call();
 770 
 771       break;
 772     }
 773 
 774 
 775 // LIR_OpUpdateCRC32
 776     case lir_updatecrc32: {
 777       assert(op->as_OpUpdateCRC32() != NULL, "must be");
 778       LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
 779 
 780       assert(opUp->_crc->is_valid(), "used");          do_input(opUp->_crc);     do_temp(opUp->_crc);
 781       assert(opUp->_val->is_valid(), "used");          do_input(opUp->_val);     do_temp(opUp->_val);
 782       assert(opUp->_result->is_valid(), "used");       do_output(opUp->_result);
 783       assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
 784 
 785       break;
 786     }
 787 
 788 
 789 // LIR_OpLock
 790     case lir_lock:
 791     case lir_unlock: {
 792       assert(op->as_OpLock() != NULL, "must be");
 793       LIR_OpLock* opLock = (LIR_OpLock*)op;
 794 
 795       if (opLock->_info)                          do_info(opLock->_info);
 796 
 797       // TODO: check if these operands really have to be temp
 798       // (or if input is sufficient). This may have influence on the oop map!
 799       assert(opLock->_lock->is_valid(), "used");  do_temp(opLock->_lock);
 800       assert(opLock->_hdr->is_valid(),  "used");  do_temp(opLock->_hdr);
 801       assert(opLock->_obj->is_valid(),  "used");  do_temp(opLock->_obj);
 802 
 803       if (opLock->_scratch->is_valid())           do_temp(opLock->_scratch);
 804       assert(opLock->_result->is_illegal(), "unused");
 805 
 806       do_stub(opLock->_stub);
 807 
 808       break;
 809     }
 810 
 811 
 812 // LIR_OpDelay
 813     case lir_delay_slot: {
 814       assert(op->as_OpDelay() != NULL, "must be");
 815       LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
 816 
 817       visit(opDelay->delay_op());
 818       break;
 819     }
 820 
 821 // LIR_OpTypeCheck
 822     case lir_instanceof:
 823     case lir_checkcast:
 824     case lir_store_check: {
 825       assert(op->as_OpTypeCheck() != NULL, "must be");
 826       LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
 827 
 828       if (opTypeCheck->_info_for_exception)       do_info(opTypeCheck->_info_for_exception);
 829       if (opTypeCheck->_info_for_patch)           do_info(opTypeCheck->_info_for_patch);
 830       if (opTypeCheck->_object->is_valid())       do_input(opTypeCheck->_object);
 831       if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
 832         do_temp(opTypeCheck->_object);
 833       }
 834       if (opTypeCheck->_array->is_valid())        do_input(opTypeCheck->_array);
 835       if (opTypeCheck->_tmp1->is_valid())         do_temp(opTypeCheck->_tmp1);
 836       if (opTypeCheck->_tmp2->is_valid())         do_temp(opTypeCheck->_tmp2);
 837       if (opTypeCheck->_tmp3->is_valid())         do_temp(opTypeCheck->_tmp3);
 838       if (opTypeCheck->_result->is_valid())       do_output(opTypeCheck->_result);
 839                                                   do_stub(opTypeCheck->_stub);
 840       break;
 841     }
 842 
 843 // LIR_OpCompareAndSwap
 844     case lir_cas_long:
 845     case lir_cas_obj:
 846     case lir_cas_int: {
 847       assert(op->as_OpCompareAndSwap() != NULL, "must be");
 848       LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
 849 
 850       assert(opCompareAndSwap->_addr->is_valid(),      "used");
 851       assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
 852       assert(opCompareAndSwap->_new_value->is_valid(), "used");
 853       if (opCompareAndSwap->_info)                    do_info(opCompareAndSwap->_info);
 854                                                       do_input(opCompareAndSwap->_addr);
 855                                                       do_temp(opCompareAndSwap->_addr);
 856                                                       do_input(opCompareAndSwap->_cmp_value);
 857                                                       do_temp(opCompareAndSwap->_cmp_value);
 858                                                       do_input(opCompareAndSwap->_new_value);
 859                                                       do_temp(opCompareAndSwap->_new_value);
 860       if (opCompareAndSwap->_tmp1->is_valid())        do_temp(opCompareAndSwap->_tmp1);
 861       if (opCompareAndSwap->_tmp2->is_valid())        do_temp(opCompareAndSwap->_tmp2);
 862       if (opCompareAndSwap->_result->is_valid())      do_output(opCompareAndSwap->_result);
 863 
 864       break;
 865     }
 866 
 867 
 868 // LIR_OpAllocArray;
 869     case lir_alloc_array: {
 870       assert(op->as_OpAllocArray() != NULL, "must be");
 871       LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
 872 
 873       if (opAllocArray->_info)                        do_info(opAllocArray->_info);
 874       if (opAllocArray->_klass->is_valid())           do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
 875       if (opAllocArray->_len->is_valid())             do_input(opAllocArray->_len);   do_temp(opAllocArray->_len);
 876       if (opAllocArray->_tmp1->is_valid())            do_temp(opAllocArray->_tmp1);
 877       if (opAllocArray->_tmp2->is_valid())            do_temp(opAllocArray->_tmp2);
 878       if (opAllocArray->_tmp3->is_valid())            do_temp(opAllocArray->_tmp3);
 879       if (opAllocArray->_tmp4->is_valid())            do_temp(opAllocArray->_tmp4);
 880       if (opAllocArray->_result->is_valid())          do_output(opAllocArray->_result);
 881                                                       do_stub(opAllocArray->_stub);
 882       break;
 883     }
 884 
 885 // LIR_OpProfileCall:
 886     case lir_profile_call: {
 887       assert(op->as_OpProfileCall() != NULL, "must be");
 888       LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
 889 
 890       if (opProfileCall->_recv->is_valid())              do_temp(opProfileCall->_recv);
 891       assert(opProfileCall->_mdo->is_valid(), "used");   do_temp(opProfileCall->_mdo);
 892       assert(opProfileCall->_tmp1->is_valid(), "used");  do_temp(opProfileCall->_tmp1);
 893       break;
 894     }
 895 
 896 // LIR_OpProfileType:
 897     case lir_profile_type: {
 898       assert(op->as_OpProfileType() != NULL, "must be");
 899       LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
 900 
 901       do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
 902       do_input(opProfileType->_obj);
 903       do_temp(opProfileType->_tmp);
 904       break;
 905     }
 906   default:
 907     ShouldNotReachHere();
 908   }
 909 }
 910 
 911 
 912 void LIR_OpVisitState::do_stub(CodeStub* stub) {
 913   if (stub != NULL) {
 914     stub->visit(this);
 915   }
 916 }
 917 
 918 XHandlers* LIR_OpVisitState::all_xhandler() {
 919   XHandlers* result = NULL;
 920 
 921   int i;
 922   for (i = 0; i < info_count(); i++) {
 923     if (info_at(i)->exception_handlers() != NULL) {
 924       result = info_at(i)->exception_handlers();
 925       break;
 926     }
 927   }
 928 
 929 #ifdef ASSERT
 930   for (i = 0; i < info_count(); i++) {
 931     assert(info_at(i)->exception_handlers() == NULL ||
 932            info_at(i)->exception_handlers() == result,
 933            "only one xhandler list allowed per LIR-operation");
 934   }
 935 #endif
 936 
 937   if (result != NULL) {
 938     return result;
 939   } else {
 940     return new XHandlers();
 941   }
 942 
 943   return result;
 944 }
 945 
 946 
 947 #ifdef ASSERT
 948 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
 949   visit(op);
 950 
 951   return opr_count(inputMode) == 0 &&
 952          opr_count(outputMode) == 0 &&
 953          opr_count(tempMode) == 0 &&
 954          info_count() == 0 &&
 955          !has_call() &&
 956          !has_slow_case();
 957 }
 958 #endif
 959 
 960 //---------------------------------------------------
 961 
 962 
 963 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
 964   masm->emit_call(this);
 965 }
 966 
 967 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
 968   masm->emit_rtcall(this);
 969 }
 970 
 971 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
 972   masm->emit_opLabel(this);
 973 }
 974 
 975 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
 976   masm->emit_arraycopy(this);
 977   masm->append_code_stub(stub());
 978 }
 979 
 980 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
 981   masm->emit_updatecrc32(this);
 982 }
 983 
 984 void LIR_Op0::emit_code(LIR_Assembler* masm) {
 985   masm->emit_op0(this);
 986 }
 987 
 988 void LIR_Op1::emit_code(LIR_Assembler* masm) {
 989   masm->emit_op1(this);
 990 }
 991 
 992 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
 993   masm->emit_alloc_obj(this);
 994   masm->append_code_stub(stub());
 995 }
 996 
 997 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
 998   masm->emit_opBranch(this);
 999   if (stub()) {
1000     masm->append_code_stub(stub());
1001   }
1002 }
1003 
1004 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1005   masm->emit_opConvert(this);
1006   if (stub() != NULL) {
1007     masm->append_code_stub(stub());
1008   }
1009 }
1010 
1011 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1012   masm->emit_op2(this);
1013 }
1014 
1015 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1016   masm->emit_alloc_array(this);
1017   masm->append_code_stub(stub());
1018 }
1019 
1020 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1021   masm->emit_opTypeCheck(this);
1022   if (stub()) {
1023     masm->append_code_stub(stub());
1024   }
1025 }
1026 
1027 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1028   masm->emit_compare_and_swap(this);
1029 }
1030 
1031 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1032   masm->emit_op3(this);
1033 }
1034 
1035 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1036   masm->emit_lock(this);
1037   if (stub()) {
1038     masm->append_code_stub(stub());
1039   }
1040 }
1041 
1042 #ifdef ASSERT
1043 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1044   masm->emit_assert(this);
1045 }
1046 #endif
1047 
1048 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1049   masm->emit_delay(this);
1050 }
1051 
1052 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1053   masm->emit_profile_call(this);
1054 }
1055 
1056 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1057   masm->emit_profile_type(this);
1058 }
1059 
1060 // LIR_List
1061 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1062   : _operations(8)
1063   , _compilation(compilation)
1064 #ifndef PRODUCT
1065   , _block(block)
1066 #endif
1067 #ifdef ASSERT
1068   , _file(NULL)
1069   , _line(0)
1070 #endif
1071 { }
1072 
1073 
1074 #ifdef ASSERT
1075 void LIR_List::set_file_and_line(const char * file, int line) {
1076   const char * f = strrchr(file, '/');
1077   if (f == NULL) f = strrchr(file, '\\');
1078   if (f == NULL) {
1079     f = file;
1080   } else {
1081     f++;
1082   }
1083   _file = f;
1084   _line = line;
1085 }
1086 #endif
1087 
1088 
1089 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1090   assert(this == buffer->lir_list(), "wrong lir list");
1091   const int n = _operations.length();
1092 
1093   if (buffer->number_of_ops() > 0) {
1094     // increase size of instructions list
1095     _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1096     // insert ops from buffer into instructions list
1097     int op_index = buffer->number_of_ops() - 1;
1098     int ip_index = buffer->number_of_insertion_points() - 1;
1099     int from_index = n - 1;
1100     int to_index = _operations.length() - 1;
1101     for (; ip_index >= 0; ip_index --) {
1102       int index = buffer->index_at(ip_index);
1103       // make room after insertion point
1104       while (index < from_index) {
1105         _operations.at_put(to_index --, _operations.at(from_index --));
1106       }
1107       // insert ops from buffer
1108       for (int i = buffer->count_at(ip_index); i > 0; i --) {
1109         _operations.at_put(to_index --, buffer->op_at(op_index --));
1110       }
1111     }
1112   }
1113 
1114   buffer->finish();
1115 }
1116 
1117 
1118 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1119   assert(reg->type() == T_OBJECT, "bad reg");
1120   append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),  reg, T_OBJECT, lir_patch_normal, info));
1121 }
1122 
1123 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1124   assert(reg->type() == T_METADATA, "bad reg");
1125   append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1126 }
1127 
1128 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1129   append(new LIR_Op1(
1130             lir_move,
1131             LIR_OprFact::address(addr),
1132             src,
1133             addr->type(),
1134             patch_code,
1135             info));
1136 }
1137 
1138 
1139 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1140   append(new LIR_Op1(
1141             lir_move,
1142             LIR_OprFact::address(address),
1143             dst,
1144             address->type(),
1145             patch_code,
1146             info, lir_move_volatile));
1147 }
1148 
1149 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1150   append(new LIR_Op1(
1151             lir_move,
1152             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1153             dst,
1154             type,
1155             patch_code,
1156             info, lir_move_volatile));
1157 }
1158 
1159 
1160 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1161   append(new LIR_Op1(
1162             lir_move,
1163             LIR_OprFact::intConst(v),
1164             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1165             type,
1166             patch_code,
1167             info));
1168 }
1169 
1170 
1171 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1172   append(new LIR_Op1(
1173             lir_move,
1174             LIR_OprFact::oopConst(o),
1175             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1176             type,
1177             patch_code,
1178             info));
1179 }
1180 
1181 
1182 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1183   append(new LIR_Op1(
1184             lir_move,
1185             src,
1186             LIR_OprFact::address(addr),
1187             addr->type(),
1188             patch_code,
1189             info));
1190 }
1191 
1192 
1193 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1194   append(new LIR_Op1(
1195             lir_move,
1196             src,
1197             LIR_OprFact::address(addr),
1198             addr->type(),
1199             patch_code,
1200             info,
1201             lir_move_volatile));
1202 }
1203 
1204 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1205   append(new LIR_Op1(
1206             lir_move,
1207             src,
1208             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1209             type,
1210             patch_code,
1211             info, lir_move_volatile));
1212 }
1213 
1214 
1215 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1216   append(new LIR_Op3(
1217                     lir_idiv,
1218                     left,
1219                     right,
1220                     tmp,
1221                     res,
1222                     info));
1223 }
1224 
1225 
1226 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1227   append(new LIR_Op3(
1228                     lir_idiv,
1229                     left,
1230                     LIR_OprFact::intConst(right),
1231                     tmp,
1232                     res,
1233                     info));
1234 }
1235 
1236 
1237 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1238   append(new LIR_Op3(
1239                     lir_irem,
1240                     left,
1241                     right,
1242                     tmp,
1243                     res,
1244                     info));
1245 }
1246 
1247 
1248 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1249   append(new LIR_Op3(
1250                     lir_irem,
1251                     left,
1252                     LIR_OprFact::intConst(right),
1253                     tmp,
1254                     res,
1255                     info));
1256 }
1257 
1258 
1259 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1260   append(new LIR_Op2(
1261                     lir_cmp,
1262                     condition,
1263                     LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1264                     LIR_OprFact::intConst(c),
1265                     info));
1266 }
1267 
1268 
1269 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1270   append(new LIR_Op2(
1271                     lir_cmp,
1272                     condition,
1273                     reg,
1274                     LIR_OprFact::address(addr),
1275                     info));
1276 }
1277 
1278 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1279                                int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1280   append(new LIR_OpAllocObj(
1281                            klass,
1282                            dst,
1283                            t1,
1284                            t2,
1285                            t3,
1286                            t4,
1287                            header_size,
1288                            object_size,
1289                            init_check,
1290                            stub));
1291 }
1292 
1293 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1294   append(new LIR_OpAllocArray(
1295                            klass,
1296                            len,
1297                            dst,
1298                            t1,
1299                            t2,
1300                            t3,
1301                            t4,
1302                            type,
1303                            stub));
1304 }
1305 
1306 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1307  append(new LIR_Op2(
1308                     lir_shl,
1309                     value,
1310                     count,
1311                     dst,
1312                     tmp));
1313 }
1314 
1315 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1316  append(new LIR_Op2(
1317                     lir_shr,
1318                     value,
1319                     count,
1320                     dst,
1321                     tmp));
1322 }
1323 
1324 
1325 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1326  append(new LIR_Op2(
1327                     lir_ushr,
1328                     value,
1329                     count,
1330                     dst,
1331                     tmp));
1332 }
1333 
1334 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1335   append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1336                      left,
1337                      right,
1338                      dst));
1339 }
1340 
1341 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1342   append(new LIR_OpLock(
1343                     lir_lock,
1344                     hdr,
1345                     obj,
1346                     lock,
1347                     scratch,
1348                     stub,
1349                     info));
1350 }
1351 
1352 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1353   append(new LIR_OpLock(
1354                     lir_unlock,
1355                     hdr,
1356                     obj,
1357                     lock,
1358                     scratch,
1359                     stub,
1360                     NULL));
1361 }
1362 
1363 
1364 void check_LIR() {
1365   // cannot do the proper checking as PRODUCT and other modes return different results
1366   // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1367 }
1368 
1369 
1370 
1371 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1372                           LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1373                           CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1374                           ciMethod* profiled_method, int profiled_bci) {
1375   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1376                                            tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1377   if (profiled_method != NULL) {
1378     c->set_profiled_method(profiled_method);
1379     c->set_profiled_bci(profiled_bci);
1380     c->set_should_profile(true);
1381   }
1382   append(c);
1383 }
1384 
1385 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1386   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1387   if (profiled_method != NULL) {
1388     c->set_profiled_method(profiled_method);
1389     c->set_profiled_bci(profiled_bci);
1390     c->set_should_profile(true);
1391   }
1392   append(c);
1393 }
1394 
1395 
1396 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1397                            CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1398   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1399   if (profiled_method != NULL) {
1400     c->set_profiled_method(profiled_method);
1401     c->set_profiled_bci(profiled_bci);
1402     c->set_should_profile(true);
1403   }
1404   append(c);
1405 }
1406 
1407 
1408 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1409                         LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1410   append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1411 }
1412 
1413 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1414                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1415   append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1416 }
1417 
1418 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1419                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1420   append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1421 }
1422 
1423 
1424 #ifdef PRODUCT
1425 
1426 void print_LIR(BlockList* blocks) {
1427 }
1428 
1429 #else
1430 // LIR_OprDesc
1431 void LIR_OprDesc::print() const {
1432   print(tty);
1433 }
1434 
1435 void LIR_OprDesc::print(outputStream* out) const {
1436   if (is_illegal()) {
1437     return;
1438   }
1439 
1440   out->print("[");
1441   if (is_pointer()) {
1442     pointer()->print_value_on(out);
1443   } else if (is_single_stack()) {
1444     out->print("stack:%d", single_stack_ix());
1445   } else if (is_double_stack()) {
1446     out->print("dbl_stack:%d",double_stack_ix());
1447   } else if (is_virtual()) {
1448     out->print("R%d", vreg_number());
1449   } else if (is_single_cpu()) {
1450     out->print("%s", as_register()->name());
1451   } else if (is_double_cpu()) {
1452     out->print("%s", as_register_hi()->name());
1453     out->print("%s", as_register_lo()->name());
1454 #if defined(X86)
1455   } else if (is_single_xmm()) {
1456     out->print("%s", as_xmm_float_reg()->name());
1457   } else if (is_double_xmm()) {
1458     out->print("%s", as_xmm_double_reg()->name());
1459   } else if (is_single_fpu()) {
1460     out->print("fpu%d", fpu_regnr());
1461   } else if (is_double_fpu()) {
1462     out->print("fpu%d", fpu_regnrLo());
1463 #elif defined(AARCH64)
1464   } else if (is_single_fpu()) {
1465     out->print("fpu%d", fpu_regnr());
1466   } else if (is_double_fpu()) {
1467     out->print("fpu%d", fpu_regnrLo());
1468 #elif defined(ARM)
1469   } else if (is_single_fpu()) {
1470     out->print("s%d", fpu_regnr());
1471   } else if (is_double_fpu()) {
1472     out->print("d%d", fpu_regnrLo() >> 1);
1473 #else
1474   } else if (is_single_fpu()) {
1475     out->print("%s", as_float_reg()->name());
1476   } else if (is_double_fpu()) {
1477     out->print("%s", as_double_reg()->name());
1478 #endif
1479 
1480   } else if (is_illegal()) {
1481     out->print("-");
1482   } else {
1483     out->print("Unknown Operand");
1484   }
1485   if (!is_illegal()) {
1486     out->print("|%c", type_char());
1487   }
1488   if (is_register() && is_last_use()) {
1489     out->print("(last_use)");
1490   }
1491   out->print("]");
1492 }
1493 
1494 
1495 // LIR_Address
1496 void LIR_Const::print_value_on(outputStream* out) const {
1497   switch (type()) {
1498     case T_ADDRESS:out->print("address:%d",as_jint());          break;
1499     case T_INT:    out->print("int:%d",   as_jint());           break;
1500     case T_LONG:   out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1501     case T_FLOAT:  out->print("flt:%f",   as_jfloat());         break;
1502     case T_DOUBLE: out->print("dbl:%f",   as_jdouble());        break;
1503     case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject()));        break;
1504     case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1505     default:       out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1506   }
1507 }
1508 
1509 // LIR_Address
1510 void LIR_Address::print_value_on(outputStream* out) const {
1511   out->print("Base:"); _base->print(out);
1512   if (!_index->is_illegal()) {
1513     out->print(" Index:"); _index->print(out);
1514     switch (scale()) {
1515     case times_1: break;
1516     case times_2: out->print(" * 2"); break;
1517     case times_4: out->print(" * 4"); break;
1518     case times_8: out->print(" * 8"); break;
1519     }
1520   }
1521   out->print(" Disp: " INTX_FORMAT, _disp);
1522 }
1523 
1524 // debug output of block header without InstructionPrinter
1525 //       (because phi functions are not necessary for LIR)
1526 static void print_block(BlockBegin* x) {
1527   // print block id
1528   BlockEnd* end = x->end();
1529   tty->print("B%d ", x->block_id());
1530 
1531   // print flags
1532   if (x->is_set(BlockBegin::std_entry_flag))               tty->print("std ");
1533   if (x->is_set(BlockBegin::osr_entry_flag))               tty->print("osr ");
1534   if (x->is_set(BlockBegin::exception_entry_flag))         tty->print("ex ");
1535   if (x->is_set(BlockBegin::subroutine_entry_flag))        tty->print("jsr ");
1536   if (x->is_set(BlockBegin::backward_branch_target_flag))  tty->print("bb ");
1537   if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1538   if (x->is_set(BlockBegin::linear_scan_loop_end_flag))    tty->print("le ");
1539 
1540   // print block bci range
1541   tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1542 
1543   // print predecessors and successors
1544   if (x->number_of_preds() > 0) {
1545     tty->print("preds: ");
1546     for (int i = 0; i < x->number_of_preds(); i ++) {
1547       tty->print("B%d ", x->pred_at(i)->block_id());
1548     }
1549   }
1550 
1551   if (x->number_of_sux() > 0) {
1552     tty->print("sux: ");
1553     for (int i = 0; i < x->number_of_sux(); i ++) {
1554       tty->print("B%d ", x->sux_at(i)->block_id());
1555     }
1556   }
1557 
1558   // print exception handlers
1559   if (x->number_of_exception_handlers() > 0) {
1560     tty->print("xhandler: ");
1561     for (int i = 0; i < x->number_of_exception_handlers();  i++) {
1562       tty->print("B%d ", x->exception_handler_at(i)->block_id());
1563     }
1564   }
1565 
1566   tty->cr();
1567 }
1568 
1569 void print_LIR(BlockList* blocks) {
1570   tty->print_cr("LIR:");
1571   int i;
1572   for (i = 0; i < blocks->length(); i++) {
1573     BlockBegin* bb = blocks->at(i);
1574     print_block(bb);
1575     tty->print("__id_Instruction___________________________________________"); tty->cr();
1576     bb->lir()->print_instructions();
1577   }
1578 }
1579 
1580 void LIR_List::print_instructions() {
1581   for (int i = 0; i < _operations.length(); i++) {
1582     _operations.at(i)->print(); tty->cr();
1583   }
1584   tty->cr();
1585 }
1586 
1587 // LIR_Ops printing routines
1588 // LIR_Op
1589 void LIR_Op::print_on(outputStream* out) const {
1590   if (id() != -1 || PrintCFGToFile) {
1591     out->print("%4d ", id());
1592   } else {
1593     out->print("     ");
1594   }
1595   out->print("%s ", name());
1596   print_instr(out);
1597   if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1598 #ifdef ASSERT
1599   if (Verbose && _file != NULL) {
1600     out->print(" (%s:%d)", _file, _line);
1601   }
1602 #endif
1603 }
1604 
1605 const char * LIR_Op::name() const {
1606   const char* s = NULL;
1607   switch(code()) {
1608      // LIR_Op0
1609      case lir_membar:                s = "membar";        break;
1610      case lir_membar_acquire:        s = "membar_acquire"; break;
1611      case lir_membar_release:        s = "membar_release"; break;
1612      case lir_membar_loadload:       s = "membar_loadload";   break;
1613      case lir_membar_storestore:     s = "membar_storestore"; break;
1614      case lir_membar_loadstore:      s = "membar_loadstore";  break;
1615      case lir_membar_storeload:      s = "membar_storeload";  break;
1616      case lir_word_align:            s = "word_align";    break;
1617      case lir_label:                 s = "label";         break;
1618      case lir_nop:                   s = "nop";           break;
1619      case lir_on_spin_wait:          s = "on_spin_wait";  break;
1620      case lir_backwardbranch_target: s = "backbranch";    break;
1621      case lir_std_entry:             s = "std_entry";     break;
1622      case lir_osr_entry:             s = "osr_entry";     break;
1623      case lir_build_frame:           s = "build_frm";     break;
1624      case lir_fpop_raw:              s = "fpop_raw";      break;
1625      case lir_24bit_FPU:             s = "24bit_FPU";     break;
1626      case lir_reset_FPU:             s = "reset_FPU";     break;
1627      case lir_breakpoint:            s = "breakpoint";    break;
1628      case lir_get_thread:            s = "get_thread";    break;
1629      // LIR_Op1
1630      case lir_fxch:                  s = "fxch";          break;
1631      case lir_fld:                   s = "fld";           break;
1632      case lir_ffree:                 s = "ffree";         break;
1633      case lir_push:                  s = "push";          break;
1634      case lir_pop:                   s = "pop";           break;
1635      case lir_null_check:            s = "null_check";    break;
1636      case lir_return:                s = "return";        break;
1637      case lir_safepoint:             s = "safepoint";     break;
1638      case lir_neg:                   s = "neg";           break;
1639      case lir_leal:                  s = "leal";          break;
1640      case lir_branch:                s = "branch";        break;
1641      case lir_cond_float_branch:     s = "flt_cond_br";   break;
1642      case lir_move:                  s = "move";          break;
1643      case lir_roundfp:               s = "roundfp";       break;
1644      case lir_rtcall:                s = "rtcall";        break;
1645      case lir_throw:                 s = "throw";         break;
1646      case lir_unwind:                s = "unwind";        break;
1647      case lir_convert:               s = "convert";       break;
1648      case lir_alloc_object:          s = "alloc_obj";     break;
1649      case lir_monaddr:               s = "mon_addr";      break;
1650      case lir_pack64:                s = "pack64";        break;
1651      case lir_unpack64:              s = "unpack64";      break;
1652      // LIR_Op2
1653      case lir_cmp:                   s = "cmp";           break;
1654      case lir_cmp_l2i:               s = "cmp_l2i";       break;
1655      case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
1656      case lir_cmp_fd2i:              s = "comp_fd2i";     break;
1657      case lir_cmove:                 s = "cmove";         break;
1658      case lir_add:                   s = "add";           break;
1659      case lir_sub:                   s = "sub";           break;
1660      case lir_mul:                   s = "mul";           break;
1661      case lir_mul_strictfp:          s = "mul_strictfp";  break;
1662      case lir_div:                   s = "div";           break;
1663      case lir_div_strictfp:          s = "div_strictfp";  break;
1664      case lir_rem:                   s = "rem";           break;
1665      case lir_abs:                   s = "abs";           break;
1666      case lir_sqrt:                  s = "sqrt";          break;
1667      case lir_logic_and:             s = "logic_and";     break;
1668      case lir_logic_or:              s = "logic_or";      break;
1669      case lir_logic_xor:             s = "logic_xor";     break;
1670      case lir_shl:                   s = "shift_left";    break;
1671      case lir_shr:                   s = "shift_right";   break;
1672      case lir_ushr:                  s = "ushift_right";  break;
1673      case lir_alloc_array:           s = "alloc_array";   break;
1674      case lir_xadd:                  s = "xadd";          break;
1675      case lir_xchg:                  s = "xchg";          break;
1676      // LIR_Op3
1677      case lir_idiv:                  s = "idiv";          break;
1678      case lir_irem:                  s = "irem";          break;
1679      case lir_fmad:                  s = "fmad";          break;
1680      case lir_fmaf:                  s = "fmaf";          break;
1681      // LIR_OpJavaCall
1682      case lir_static_call:           s = "static";        break;
1683      case lir_optvirtual_call:       s = "optvirtual";    break;
1684      case lir_icvirtual_call:        s = "icvirtual";     break;
1685      case lir_virtual_call:          s = "virtual";       break;
1686      case lir_dynamic_call:          s = "dynamic";       break;
1687      // LIR_OpArrayCopy
1688      case lir_arraycopy:             s = "arraycopy";     break;
1689      // LIR_OpUpdateCRC32
1690      case lir_updatecrc32:           s = "updatecrc32";   break;
1691      // LIR_OpLock
1692      case lir_lock:                  s = "lock";          break;
1693      case lir_unlock:                s = "unlock";        break;
1694      // LIR_OpDelay
1695      case lir_delay_slot:            s = "delay";         break;
1696      // LIR_OpTypeCheck
1697      case lir_instanceof:            s = "instanceof";    break;
1698      case lir_checkcast:             s = "checkcast";     break;
1699      case lir_store_check:           s = "store_check";   break;
1700      // LIR_OpCompareAndSwap
1701      case lir_cas_long:              s = "cas_long";      break;
1702      case lir_cas_obj:               s = "cas_obj";      break;
1703      case lir_cas_int:               s = "cas_int";      break;
1704      // LIR_OpProfileCall
1705      case lir_profile_call:          s = "profile_call";  break;
1706      // LIR_OpProfileType
1707      case lir_profile_type:          s = "profile_type";  break;
1708      // LIR_OpAssert
1709 #ifdef ASSERT
1710      case lir_assert:                s = "assert";        break;
1711 #endif
1712      case lir_none:                  ShouldNotReachHere();break;
1713     default:                         s = "illegal_op";    break;
1714   }
1715   return s;
1716 }
1717 
1718 // LIR_OpJavaCall
1719 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1720   out->print("call: ");
1721   out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1722   if (receiver()->is_valid()) {
1723     out->print(" [recv: ");   receiver()->print(out);   out->print("]");
1724   }
1725   if (result_opr()->is_valid()) {
1726     out->print(" [result: "); result_opr()->print(out); out->print("]");
1727   }
1728 }
1729 
1730 // LIR_OpLabel
1731 void LIR_OpLabel::print_instr(outputStream* out) const {
1732   out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1733 }
1734 
1735 // LIR_OpArrayCopy
1736 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1737   src()->print(out);     out->print(" ");
1738   src_pos()->print(out); out->print(" ");
1739   dst()->print(out);     out->print(" ");
1740   dst_pos()->print(out); out->print(" ");
1741   length()->print(out);  out->print(" ");
1742   tmp()->print(out);     out->print(" ");
1743 }
1744 
1745 // LIR_OpUpdateCRC32
1746 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1747   crc()->print(out);     out->print(" ");
1748   val()->print(out);     out->print(" ");
1749   result_opr()->print(out); out->print(" ");
1750 }
1751 
1752 // LIR_OpCompareAndSwap
1753 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1754   addr()->print(out);      out->print(" ");
1755   cmp_value()->print(out); out->print(" ");
1756   new_value()->print(out); out->print(" ");
1757   tmp1()->print(out);      out->print(" ");
1758   tmp2()->print(out);      out->print(" ");
1759 
1760 }
1761 
1762 // LIR_Op0
1763 void LIR_Op0::print_instr(outputStream* out) const {
1764   result_opr()->print(out);
1765 }
1766 
1767 // LIR_Op1
1768 const char * LIR_Op1::name() const {
1769   if (code() == lir_move) {
1770     switch (move_kind()) {
1771     case lir_move_normal:
1772       return "move";
1773     case lir_move_unaligned:
1774       return "unaligned move";
1775     case lir_move_volatile:
1776       return "volatile_move";
1777     case lir_move_wide:
1778       return "wide_move";
1779     default:
1780       ShouldNotReachHere();
1781     return "illegal_op";
1782     }
1783   } else {
1784     return LIR_Op::name();
1785   }
1786 }
1787 
1788 
1789 void LIR_Op1::print_instr(outputStream* out) const {
1790   _opr->print(out);         out->print(" ");
1791   result_opr()->print(out); out->print(" ");
1792   print_patch_code(out, patch_code());
1793 }
1794 
1795 
1796 // LIR_Op1
1797 void LIR_OpRTCall::print_instr(outputStream* out) const {
1798   intx a = (intx)addr();
1799   out->print("%s", Runtime1::name_for_address(addr()));
1800   out->print(" ");
1801   tmp()->print(out);
1802 }
1803 
1804 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1805   switch(code) {
1806     case lir_patch_none:                                 break;
1807     case lir_patch_low:    out->print("[patch_low]");    break;
1808     case lir_patch_high:   out->print("[patch_high]");   break;
1809     case lir_patch_normal: out->print("[patch_normal]"); break;
1810     default: ShouldNotReachHere();
1811   }
1812 }
1813 
1814 // LIR_OpBranch
1815 void LIR_OpBranch::print_instr(outputStream* out) const {
1816   print_condition(out, cond());             out->print(" ");
1817   if (block() != NULL) {
1818     out->print("[B%d] ", block()->block_id());
1819   } else if (stub() != NULL) {
1820     out->print("[");
1821     stub()->print_name(out);
1822     out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1823     if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1824   } else {
1825     out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1826   }
1827   if (ublock() != NULL) {
1828     out->print("unordered: [B%d] ", ublock()->block_id());
1829   }
1830 }
1831 
1832 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1833   switch(cond) {
1834     case lir_cond_equal:           out->print("[EQ]");      break;
1835     case lir_cond_notEqual:        out->print("[NE]");      break;
1836     case lir_cond_less:            out->print("[LT]");      break;
1837     case lir_cond_lessEqual:       out->print("[LE]");      break;
1838     case lir_cond_greaterEqual:    out->print("[GE]");      break;
1839     case lir_cond_greater:         out->print("[GT]");      break;
1840     case lir_cond_belowEqual:      out->print("[BE]");      break;
1841     case lir_cond_aboveEqual:      out->print("[AE]");      break;
1842     case lir_cond_always:          out->print("[AL]");      break;
1843     default:                       out->print("[%d]",cond); break;
1844   }
1845 }
1846 
1847 // LIR_OpConvert
1848 void LIR_OpConvert::print_instr(outputStream* out) const {
1849   print_bytecode(out, bytecode());
1850   in_opr()->print(out);                  out->print(" ");
1851   result_opr()->print(out);              out->print(" ");
1852 #ifdef PPC32
1853   if(tmp1()->is_valid()) {
1854     tmp1()->print(out); out->print(" ");
1855     tmp2()->print(out); out->print(" ");
1856   }
1857 #endif
1858 }
1859 
1860 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1861   switch(code) {
1862     case Bytecodes::_d2f: out->print("[d2f] "); break;
1863     case Bytecodes::_d2i: out->print("[d2i] "); break;
1864     case Bytecodes::_d2l: out->print("[d2l] "); break;
1865     case Bytecodes::_f2d: out->print("[f2d] "); break;
1866     case Bytecodes::_f2i: out->print("[f2i] "); break;
1867     case Bytecodes::_f2l: out->print("[f2l] "); break;
1868     case Bytecodes::_i2b: out->print("[i2b] "); break;
1869     case Bytecodes::_i2c: out->print("[i2c] "); break;
1870     case Bytecodes::_i2d: out->print("[i2d] "); break;
1871     case Bytecodes::_i2f: out->print("[i2f] "); break;
1872     case Bytecodes::_i2l: out->print("[i2l] "); break;
1873     case Bytecodes::_i2s: out->print("[i2s] "); break;
1874     case Bytecodes::_l2i: out->print("[l2i] "); break;
1875     case Bytecodes::_l2f: out->print("[l2f] "); break;
1876     case Bytecodes::_l2d: out->print("[l2d] "); break;
1877     default:
1878       out->print("[?%d]",code);
1879     break;
1880   }
1881 }
1882 
1883 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1884   klass()->print(out);                      out->print(" ");
1885   obj()->print(out);                        out->print(" ");
1886   tmp1()->print(out);                       out->print(" ");
1887   tmp2()->print(out);                       out->print(" ");
1888   tmp3()->print(out);                       out->print(" ");
1889   tmp4()->print(out);                       out->print(" ");
1890   out->print("[hdr:%d]", header_size()); out->print(" ");
1891   out->print("[obj:%d]", object_size()); out->print(" ");
1892   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1893 }
1894 
1895 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1896   _opr->print(out);         out->print(" ");
1897   tmp()->print(out);        out->print(" ");
1898   result_opr()->print(out); out->print(" ");
1899 }
1900 
1901 // LIR_Op2
1902 void LIR_Op2::print_instr(outputStream* out) const {
1903   if (code() == lir_cmove || code() == lir_cmp) {
1904     print_condition(out, condition());         out->print(" ");
1905   }
1906   in_opr1()->print(out);    out->print(" ");
1907   in_opr2()->print(out);    out->print(" ");
1908   if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
1909   if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
1910   if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
1911   if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
1912   if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
1913   result_opr()->print(out);
1914 }
1915 
1916 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1917   klass()->print(out);                   out->print(" ");
1918   len()->print(out);                     out->print(" ");
1919   obj()->print(out);                     out->print(" ");
1920   tmp1()->print(out);                    out->print(" ");
1921   tmp2()->print(out);                    out->print(" ");
1922   tmp3()->print(out);                    out->print(" ");
1923   tmp4()->print(out);                    out->print(" ");
1924   out->print("[type:0x%x]", type());     out->print(" ");
1925   out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1926 }
1927 
1928 
1929 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1930   object()->print(out);                  out->print(" ");
1931   if (code() == lir_store_check) {
1932     array()->print(out);                 out->print(" ");
1933   }
1934   if (code() != lir_store_check) {
1935     klass()->print_name_on(out);         out->print(" ");
1936     if (fast_check())                 out->print("fast_check ");
1937   }
1938   tmp1()->print(out);                    out->print(" ");
1939   tmp2()->print(out);                    out->print(" ");
1940   tmp3()->print(out);                    out->print(" ");
1941   result_opr()->print(out);              out->print(" ");
1942   if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1943 }
1944 
1945 
1946 // LIR_Op3
1947 void LIR_Op3::print_instr(outputStream* out) const {
1948   in_opr1()->print(out);    out->print(" ");
1949   in_opr2()->print(out);    out->print(" ");
1950   in_opr3()->print(out);    out->print(" ");
1951   result_opr()->print(out);
1952 }
1953 
1954 
1955 void LIR_OpLock::print_instr(outputStream* out) const {
1956   hdr_opr()->print(out);   out->print(" ");
1957   obj_opr()->print(out);   out->print(" ");
1958   lock_opr()->print(out);  out->print(" ");
1959   if (_scratch->is_valid()) {
1960     _scratch->print(out);  out->print(" ");
1961   }
1962   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1963 }
1964 
1965 #ifdef ASSERT
1966 void LIR_OpAssert::print_instr(outputStream* out) const {
1967   print_condition(out, condition()); out->print(" ");
1968   in_opr1()->print(out);             out->print(" ");
1969   in_opr2()->print(out);             out->print(", \"");
1970   out->print("%s", msg());          out->print("\"");
1971 }
1972 #endif
1973 
1974 
1975 void LIR_OpDelay::print_instr(outputStream* out) const {
1976   _op->print_on(out);
1977 }
1978 
1979 
1980 // LIR_OpProfileCall
1981 void LIR_OpProfileCall::print_instr(outputStream* out) const {
1982   profiled_method()->name()->print_symbol_on(out);
1983   out->print(".");
1984   profiled_method()->holder()->name()->print_symbol_on(out);
1985   out->print(" @ %d ", profiled_bci());
1986   mdo()->print(out);           out->print(" ");
1987   recv()->print(out);          out->print(" ");
1988   tmp1()->print(out);          out->print(" ");
1989 }
1990 
1991 // LIR_OpProfileType
1992 void LIR_OpProfileType::print_instr(outputStream* out) const {
1993   out->print("exact = ");
1994   if  (exact_klass() == NULL) {
1995     out->print("unknown");
1996   } else {
1997     exact_klass()->print_name_on(out);
1998   }
1999   out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2000   out->print(" ");
2001   mdp()->print(out);          out->print(" ");
2002   obj()->print(out);          out->print(" ");
2003   tmp()->print(out);          out->print(" ");
2004 }
2005 
2006 #endif // PRODUCT
2007 
2008 // Implementation of LIR_InsertionBuffer
2009 
2010 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2011   assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2012 
2013   int i = number_of_insertion_points() - 1;
2014   if (i < 0 || index_at(i) < index) {
2015     append_new(index, 1);
2016   } else {
2017     assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2018     assert(count_at(i) > 0, "check");
2019     set_count_at(i, count_at(i) + 1);
2020   }
2021   _ops.push(op);
2022 
2023   DEBUG_ONLY(verify());
2024 }
2025 
2026 #ifdef ASSERT
2027 void LIR_InsertionBuffer::verify() {
2028   int sum = 0;
2029   int prev_idx = -1;
2030 
2031   for (int i = 0; i < number_of_insertion_points(); i++) {
2032     assert(prev_idx < index_at(i), "index must be ordered ascending");
2033     sum += count_at(i);
2034   }
2035   assert(sum == number_of_ops(), "wrong total sum");
2036 }
2037 #endif
--- EOF ---