< prev index next >

src/share/vm/c1/c1_LinearScan.cpp

Print this page
rev 12113 : 8166561: [s390] Adaptions needed for s390 port in C1 and C2.

*** 1075,1096 **** return shouldHaveRegister; } } ! #ifdef X86 if (op->code() == lir_cmove) { // conditional moves can handle stack operands assert(op->result_opr()->is_register(), "result must always be in a register"); return shouldHaveRegister; } // optimizations for second input operand of arithmehtic operations on Intel // this operand is allowed to be on the stack in some cases BasicType opr_type = opr->type_register(); if (opr_type == T_FLOAT || opr_type == T_DOUBLE) { ! if ((UseSSE == 1 && opr_type == T_FLOAT) || UseSSE >= 2) { // SSE float instruction (T_DOUBLE only supported with SSE2) switch (op->code()) { case lir_cmp: case lir_add: case lir_sub: --- 1075,1096 ---- return shouldHaveRegister; } } ! #if defined(X86) || defined(S390) if (op->code() == lir_cmove) { // conditional moves can handle stack operands assert(op->result_opr()->is_register(), "result must always be in a register"); return shouldHaveRegister; } // optimizations for second input operand of arithmehtic operations on Intel // this operand is allowed to be on the stack in some cases BasicType opr_type = opr->type_register(); if (opr_type == T_FLOAT || opr_type == T_DOUBLE) { ! if ((UseSSE == 1 && opr_type == T_FLOAT) || UseSSE >= 2 S390_ONLY(|| true)) { // SSE float instruction (T_DOUBLE only supported with SSE2) switch (op->code()) { case lir_cmp: case lir_add: case lir_sub:
*** 1142,1152 **** return shouldHaveRegister; } } } } ! #endif // X86 // all other operands require a register return mustHaveRegister; } --- 1142,1152 ---- return shouldHaveRegister; } } } } ! #endif // X86 S390 // all other operands require a register return mustHaveRegister; }
*** 2651,2660 **** --- 2651,2665 ---- Location::Type loc_type = float_saved_as_double ? Location::float_in_dbl : Location::normal; VMReg rname = frame_map()->fpu_regname(opr->fpu_regnr()); #ifndef __SOFTFP__ #ifndef VM_LITTLE_ENDIAN + // On S390 a (single precision) float value occupies only the high + // word of the full double register. So when the double register is + // stored to memory (e.g. by the RegisterSaver), then the float value + // is found at offset 0. I.e. the code below is not needed on S390. + #ifndef S390 if (! float_saved_as_double) { // On big endian system, we may have an issue if float registers use only // the low half of the (same) double registers. // Both the float and the double could have the same regnr but would correspond // to two different addresses once saved.
*** 2665,2674 **** --- 2670,2680 ---- (next->as_FloatRegister() == rname->as_FloatRegister())) { // the back-end does use the same numbering for the double and the float rname = next; // VMReg for the low bits, e.g. the real VMReg for the float } } + #endif // !S390 #endif #endif LocationValue* sv = new LocationValue(Location::new_reg_loc(loc_type, rname)); scope_values->append(sv);
< prev index next >