1 /*
2 * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/assembler.inline.hpp"
28 #include "compiler/disassembler.hpp"
29 #include "code/compiledIC.hpp"
30 #include "memory/resourceArea.hpp"
31 #include "runtime/java.hpp"
32 #include "runtime/stubCodeGenerator.hpp"
33 #include "vm_version_s390.hpp"
34
35 # include <sys/sysinfo.h>
36
37 bool VM_Version::_is_determine_features_test_running = false;
38
39 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0};
40 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0};
41 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0};
42 unsigned int VM_Version::_nfeatures = 0;
43 unsigned int VM_Version::_ncipher_features = 0;
44 unsigned int VM_Version::_nmsgdigest_features = 0;
45 unsigned int VM_Version::_Dcache_lineSize = 256;
46 unsigned int VM_Version::_Icache_lineSize = 256;
47
48 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" };
49 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" };
50 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" };
51
52 void VM_Version::initialize() {
53 determine_features(); // Get processor capabilities.
54 set_features_string(); // Set a descriptive feature indication.
55
56 if (Verbose) {
57 print_features();
58 }
59
60 intx cache_line_size = Dcache_lineSize(0);
61
62 MaxVectorSize = 8;
63
64 if (has_PrefetchRaw()) {
65 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset
66 // 0 = no prefetch.
67 // 1 = Prefetch instructions for each allocation.
68 // 2 = Use TLAB watermark to gate allocation prefetch.
69 AllocatePrefetchStyle = 1;
70 }
71
72 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all?
73 // Distance to prefetch ahead of allocation pointer.
74 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset
75 AllocatePrefetchDistance = 0;
76 }
77
78 // Number of lines to prefetch ahead of allocation pointer.
79 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset
80 AllocatePrefetchLines = 3;
81 }
82
83 // Step size in bytes of sequential prefetch instructions.
84 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset
85 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
86 } else if (AllocatePrefetchStepSize < cache_line_size) {
87 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
88 } else {
89 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
90 }
91 } else {
92 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
93 AllocatePrefetchDistance = 0;
94 AllocatePrefetchLines = 0;
95 // Can't be zero. Will SIGFPE during constraints checking.
96 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
97 }
98
99 } else {
100 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
101 AllocatePrefetchDistance = 0;
102 AllocatePrefetchLines = 0;
103 // Can't be zero. Will SIGFPE during constraints checking.
104 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
105 }
106
107 // TODO:
108 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need
109 // to keep contended members that far apart? Performance tests are required.
110 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) {
111 ContendedPaddingWidth = cache_line_size;
112 }
113
114 // On z/Architecture, the CRC32 intrinsics had to be implemented "by hand".
115 // They cannot be based on the CHECKSUM instruction which has been there
116 // since the very beginning (of z/Architecture). It computes "some kind of" a checksum
117 // which has nothing to do with the CRC32 algorithm.
118 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
119 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
120 }
121
122 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics.
123 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set
124 // depending on the actual machine capabilities.
125 // Explicitly setting them via CmdLine option takes precedence, of course.
126 // TODO: UseAESIntrinsics must be made keylength specific.
127 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions.
128 // Therefore, UseAESIntrinsics is of minimal use at the moment.
129 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) {
130 FLAG_SET_DEFAULT(UseAES, true);
131 }
132 if (UseAES && !has_Crypto_AES()) {
133 warning("AES instructions are not available on this CPU");
134 FLAG_SET_DEFAULT(UseAES, false);
135 }
136 if (UseAES) {
137 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
138 FLAG_SET_DEFAULT(UseAESIntrinsics, true);
139 }
140 }
141 if (UseAESIntrinsics && !has_Crypto_AES()) {
142 warning("AES intrinsics are not available on this CPU");
143 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
144 }
145
146 // TODO: implement AES/CTR intrinsics
147 if (UseAESCTRIntrinsics) {
148 warning("AES/CTR intrinsics are not available on this CPU");
149 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
150 }
151
152 // TODO: implement GHASH intrinsics
153 if (UseGHASHIntrinsics) {
154 warning("GHASH intrinsics are not available on this CPU");
155 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
156 }
157
158 if (UseFMA) {
159 warning("FMA instructions are not available on this CPU");
160 FLAG_SET_DEFAULT(UseFMA, false);
161 }
162
163 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics.
164 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual
165 // machine capabilities.
166 // Explicitly setting them via CmdLine option takes precedence, of course.
167 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) {
168 FLAG_SET_DEFAULT(UseSHA, true);
169 }
170 if (UseSHA && !has_Crypto_SHA()) {
171 warning("SHA instructions are not available on this CPU");
172 FLAG_SET_DEFAULT(UseSHA, false);
173 }
174 if (UseSHA && has_Crypto_SHA1()) {
175 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
176 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
177 }
178 } else if (UseSHA1Intrinsics) {
179 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
180 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
181 }
182 if (UseSHA && has_Crypto_SHA256()) {
183 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
184 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
185 }
186 } else if (UseSHA256Intrinsics) {
187 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
188 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
189 }
190 if (UseSHA && has_Crypto_SHA512()) {
191 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
192 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
193 }
194 } else if (UseSHA512Intrinsics) {
195 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
196 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
197 }
198
199 if (UseAdler32Intrinsics) {
200 warning("Adler32Intrinsics not available on this CPU.");
201 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
202 }
203
204 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
205 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true);
206 }
207 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
208 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true);
209 }
210 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
211 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true);
212 }
213 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
214 FLAG_SET_DEFAULT(UsePopCountInstruction, true);
215 }
216
217 // z/Architecture supports 8-byte compare-exchange operations
218 // (see Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr)
219 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
220 _supports_cx8 = true;
221
222 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1();
223 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1();
224
225 // z/Architecture supports unaligned memory accesses.
226 // Performance penalty is negligible. An additional tick or so
227 // is lost if the accessed data spans a cache line boundary.
228 // Unaligned accesses are not atomic, of course.
229 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
230 FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
231 }
232 }
233
234
235 void VM_Version::set_features_string() {
236
237 unsigned int ambiguity = 0;
238 if (is_z13()) {
239 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)";
240 ambiguity++;
241 }
242 if (is_ec12()) {
243 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)";
244 ambiguity++;
245 }
246 if (is_z196()) {
247 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)";
248 ambiguity++;
249 }
250 if (is_z10()) {
251 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)";
252 ambiguity++;
253 }
254 if (is_z9()) {
255 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01";
256 ambiguity++;
257 }
258 if (is_z990()) {
259 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01";
260 ambiguity++;
261 }
262 if (is_z900()) {
263 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01";
264 ambiguity++;
265 }
266
267 if (ambiguity == 0) {
268 _features_string = "z/Architecture (unknown generation)";
269 } else if (ambiguity > 1) {
270 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity);
271 tty->print_cr(" oldest detected generation is %s", _features_string);
272 _features_string = "z/Architecture (ambiguous detection)";
273 }
274 }
275
276 // featureBuffer - bit array indicating availability of various features
277 // featureNum - bit index of feature to be tested
278 // Featurenum < 0 requests test for any nonzero bit in featureBuffer.
279 // bufLen - length of featureBuffer in bits
280 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) {
281 assert(bufLen > 0, "buffer len must be positive");
282 assert((bufLen & 0x0007) == 0, "unaligned buffer len");
283 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer");
284 if (featureNum < 0) {
285 // Any bit set at all?
286 bool anyBit = false;
287 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) {
288 anyBit = anyBit || (featureBuffer[i] != 0);
289 }
290 return anyBit;
291 } else {
292 assert((unsigned int)featureNum < bufLen, "feature index out of range");
293 unsigned char* byteBuffer = (unsigned char*)featureBuffer;
294 int byteIndex = featureNum/(8*sizeof(char));
295 int bitIndex = featureNum%(8*sizeof(char));
296 // Indexed bit set?
297 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0;
298 }
299 }
300
301 void VM_Version::print_features_internal(const char* text, bool print_anyway) {
302 tty->print_cr("%s %s", text, features_string());
303 tty->print("%s", text);
304 for (unsigned int i = 0; i < _nfeatures; i++) {
305 tty->print(" 0x%16.16lx", _features[i]);
306 }
307 tty->cr();
308
309 if (Verbose || print_anyway) {
310 // z900
311 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility");
312 // z990
313 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf");
314 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3");
315 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility");
316 // z9
317 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility");
318 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended");
319 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast");
320 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements");
321 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements");
322 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility");
323 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility");
324 // z10
325 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements");
326 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime");
327 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore");
328 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions");
329 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch");
330 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap");
331 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store");
332 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32");
333 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch");
334 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory");
335 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate");
336 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes");
337 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions");
338 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements");
339 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint");
340 // z196
341 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands");
342 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)");
343 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount");
344 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional");
345 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions");
346 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)");
347 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate");
348 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions");
349 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3");
350 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4");
351 // EC12
352 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions");
353 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)");
354 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists");
355 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap");
356 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory");
357 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)");
358 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions");
359 // z13
360 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2");
361 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5");
362 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions");
363 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility");
364 // test switches
365 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl");
366 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl");
367 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl");
368 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl");
369
370 if (has_Crypto()) {
371 tty->cr();
372 tty->print_cr("detailled availability of %s capabilities:", "CryptoFacility");
373 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) {
374 tty->cr();
375 tty->print_cr(" available: %s", "Message Cipher Functions");
376 }
377 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) {
378 tty->print_cr(" available Crypto Features of KM (Cipher Message):");
379 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
380 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) {
381 switch (i) {
382 case Cipher::_Query: tty->print_cr(" available: KM Query"); break;
383 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break;
384 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break;
385 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break;
386 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break;
387 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break;
388 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break;
389 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break;
390 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break;
391 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break;
392 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break;
393 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break;
394 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break;
395 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break;
396 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break;
397 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break;
398 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break;
399 default: tty->print_cr(" available: unknown KM code %d", i); break;
400 }
401 }
402 }
403 }
404 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) {
405 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):");
406 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
407 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) {
408 switch (i) {
409 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break;
410 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break;
411 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break;
412 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break;
413 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break;
414 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break;
415 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break;
416 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break;
417 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break;
418 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break;
419 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break;
420 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break;
421 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break;
422 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break;
423 default: tty->print_cr(" available: unknown KMC code %d", i); break;
424 }
425 }
426 }
427 }
428
429 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) {
430 tty->cr();
431 tty->print_cr(" available: %s", "Message Digest Functions for SHA");
432 }
433 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) {
434 tty->print_cr(" available Features of KIMD (Msg Digest):");
435 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
436 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) {
437 switch (i) {
438 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break;
439 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break;
440 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break;
441 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break;
442 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break;
443 default: tty->print_cr(" available: unknown code %d", i); break;
444 }
445 }
446 }
447 }
448 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) {
449 tty->print_cr(" available Features of KLMD (Msg Digest):");
450 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
451 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) {
452 switch (i) {
453 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break;
454 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break;
455 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break;
456 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break;
457 default: tty->print_cr(" available: unknown code %d", i); break;
458 }
459 }
460 }
461 }
462 }
463 if (ContendedPaddingWidth > 0) {
464 tty->cr();
465 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth);
466 }
467 }
468 }
469
470 void VM_Version::print_features() {
471 print_features_internal("Version:");
472 }
473
474 void VM_Version::reset_features(bool reset) {
475 if (reset) {
476 for (unsigned int i = 0; i < _features_buffer_len; i++) {
477 VM_Version::_features[i] = 0;
478 }
479 }
480 }
481
482
483 void VM_Version::set_features_z900(bool reset) {
484 reset_features(reset);
485
486 set_has_long_displacement();
487 set_has_ETF2();
488 }
489
490 void VM_Version::set_features_z990(bool reset) {
491 reset_features(reset);
492
493 set_features_z900(false);
494 set_has_ETF3();
495 set_has_long_displacement_fast();
496 set_has_HFPMultiplyAndAdd();
497 }
498
499 void VM_Version::set_features_z9(bool reset) {
500 reset_features(reset);
501
502 set_features_z990(false);
503 set_has_StoreFacilityListExtended();
504 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately.
505 set_has_ETF2Enhancements();
506 set_has_ETF3Enhancements();
507 set_has_extended_immediate();
508 set_has_StoreClockFast();
509 set_has_HFPUnnormalized();
510 }
511
512 void VM_Version::set_features_z10(bool reset) {
513 reset_features(reset);
514
515 set_features_z9(false);
516 set_has_CompareSwapStore();
517 set_has_RelativeLoadStore();
518 set_has_CompareBranch();
519 set_has_CompareTrap();
520 set_has_MultiplySingleImm32();
521 set_has_Prefetch();
522 set_has_MoveImmToMem();
523 set_has_MemWithImmALUOps();
524 set_has_ExecuteExtensions();
525 set_has_FPSupportEnhancements();
526 set_has_DecimalFloatingPoint();
527 set_has_ExtractCPUtime();
528 set_has_CryptoExt3();
529 }
530
531 void VM_Version::set_features_z196(bool reset) {
532 reset_features(reset);
533
534 set_features_z10(false);
535 set_has_InterlockedAccessV1();
536 set_has_PopCount();
537 set_has_LoadStoreConditional();
538 set_has_HighWordInstr();
539 set_has_FastSync();
540 set_has_FPExtensions();
541 set_has_DistinctOpnds();
542 set_has_CryptoExt4();
543 }
544
545 void VM_Version::set_features_ec12(bool reset) {
546 reset_features(reset);
547
548 set_features_z196(false);
549 set_has_MiscInstrExt();
550 set_has_InterlockedAccessV2();
551 set_has_LoadAndALUAtomicV2();
552 set_has_TxMem();
553 }
554
555 void VM_Version::set_features_z13(bool reset) {
556 reset_features(reset);
557
558 set_features_ec12(false);
559 set_has_LoadStoreConditional2();
560 set_has_CryptoExt5();
561 set_has_VectorFacility();
562 }
563
564 void VM_Version::set_features_from(const char* march) {
565 bool err = false;
566 bool prt = false;
567
568 if ((march != NULL) && (march[0] != '\0')) {
569 const int buf_len = 16;
570 const int hdr_len = 5;
571 char buf[buf_len];
572 if (strlen(march) >= hdr_len) {
573 memcpy(buf, march, hdr_len);
574 buf[hdr_len] = '\00';
575 } else {
576 buf[0] = '\00';
577 }
578
579 if (!strcmp(march, "z900")) {
580 set_features_z900();
581 } else if (!strcmp(march, "z990")) {
582 set_features_z990();
583 } else if (!strcmp(march, "z9")) {
584 set_features_z9();
585 } else if (!strcmp(march, "z10")) {
586 set_features_z10();
587 } else if (!strcmp(march, "z196")) {
588 set_features_z196();
589 } else if (!strcmp(march, "ec12")) {
590 set_features_ec12();
591 } else if (!strcmp(march, "z13")) {
592 set_features_z13();
593 } else if (!strcmp(buf, "ztest")) {
594 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict");
595 if (strlen(march) > hdr_len) {
596 int itest = 0;
597 if ((strlen(march)-hdr_len) >= buf_len) err = true;
598 if (!err) {
599 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len);
600 buf[strlen(march)-hdr_len] = '\00';
601 for (size_t i = 0; !err && (i < strlen(buf)); i++) {
602 itest = itest*10 + buf[i]-'0';
603 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15);
604 }
605 }
606 if (!err) {
607 prt = true;
608 if (itest & 0x01) { set_has_TestFeature1Impl(); }
609 if (itest & 0x02) { set_has_TestFeature2Impl(); }
610 if (itest & 0x04) { set_has_TestFeature4Impl(); }
611 if (itest & 0x08) { set_has_TestFeature8Impl(); }
612 }
613 } else {
614 prt = true;
615 set_has_TestFeature1Impl();
616 set_has_TestFeature2Impl();
617 set_has_TestFeature4Impl();
618 set_has_TestFeature8Impl();
619 }
620 } else {
621 err = true;
622 }
623 if (!err) {
624 set_features_string();
625 if (prt || PrintAssembly) {
626 print_features_internal("CPU Version as set by cmdline option:", prt);
627 }
628 } else {
629 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march);
630 }
631 }
632
633 }
634
635 static long (*getFeatures)(unsigned long*, int, int) = NULL;
636
637 void VM_Version::set_getFeatures(address entryPoint) {
638 if (getFeatures == NULL) {
639 getFeatures = (long(*)(unsigned long*, int, int))entryPoint;
640 }
641 }
642
643 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) {
644 VM_Version::_is_determine_features_test_running = true;
645 long functionResult = (*getFeatures)(buffer, buflen, functionCode);
646 VM_Version::_is_determine_features_test_running = false;
647 return functionResult;
648 }
649
650 // Helper function for "extract cache attribute" instruction.
651 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication,
652 unsigned int levelIndication,
653 unsigned int typeIndication) {
654 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication;
655 }
656
657 void VM_Version::determine_features() {
658
659 const int cbuf_size = _code_buffer_len;
660 const int buf_len = _features_buffer_len;
661
662 // Allocate code buffer space for the detection code.
663 ResourceMark rm;
664 CodeBuffer cbuf("determine CPU features", cbuf_size, 0);
665 MacroAssembler* a = new MacroAssembler(&cbuf);
666
667 // Emit code.
668 set_getFeatures(a->pc());
669 address code = a->pc();
670
671 // Try STFLE. Possible INVOP will cause defaults to be used.
672 Label getFEATURES;
673 Label getCPUFEATURES; // fcode = -1 (cache)
674 Label getCIPHERFEATURES; // fcode = -2 (cipher)
675 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA)
676 Label checkLongDispFast;
677 Label noLongDisp;
678 Label posDisp, negDisp;
679 Label errRTN;
680 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test.
681 a->z_brl(getFEATURES); // negative -> Get machine features.
682 a->z_brz(checkLongDispFast); // zero -> Check for high-speed Long Displacement Facility.
683 a->z_aghi(Z_R0, -1);
684 a->z_stfle(0, Z_ARG1);
685 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list.
686 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success.
687 a->z_la(Z_RET, 1, Z_RET);
688 a->z_brnz(errRTN); // Instr failed if non-zero CC.
689 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0.
690 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return.
691
692 a->bind(errRTN);
693 a->z_lngr(Z_RET, Z_RET);
694 a->z_ltgr(Z_R1, Z_R1);
695 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small".
696 a->z_xgr(Z_RET, Z_RET);
697 a->z_br(Z_R14); // Return "operation aborted".
698
699 a->bind(getFEATURES);
700 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only.
701 a->z_bre(getCPUFEATURES);
702 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions).
703 a->z_bre(getCIPHERFEATURES);
704 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions).
705 a->z_bre(getMSGDIGESTFEATURES);
706
707 a->z_xgr(Z_RET, Z_RET); // Not a valid function code.
708 a->z_br(Z_R14); // Return "operation aborted".
709
710 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions.
711 a->bind(getMSGDIGESTFEATURES);
712 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code
713 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size
714 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk).
715 a->z_la(Z_R1,16,Z_R1); // next param block addr
716 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk).
717 a->z_lghi(Z_RET,4);
718 a->z_br(Z_R14);
719
720 // Try KM/KMC query function to get details about crypto instructions.
721 a->bind(getCIPHERFEATURES);
722 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code
723 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output)
724 a->z_km(Z_R2,Z_R2); // get available KM functions
725 a->z_la(Z_R1,16,Z_R1); // next param block addr
726 a->z_kmc(Z_R2,Z_R2); // get available KMC functions
727 a->z_lghi(Z_RET,4);
728 a->z_br(Z_R14);
729
730 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout.
731 a->bind(getCPUFEATURES);
732 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation
733 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents.
734 a->z_br(Z_R14);
735
736 // Check the performance of the Long Displacement Facility, i.e. find out if we are running on z900 or newer.
737 a->bind(checkLongDispFast);
738 a->z_llill(Z_R0, 0xffff); // preset #iterations
739 a->z_larl(Z_R1, posDisp);
740 a->z_stck(0, Z_ARG1); // Get begin timestamp.
741
742 a->bind(posDisp); // Positive disp loop.
743 a->z_lg(Z_ARG2, 0, Z_ARG1);
744 a->z_bctgr(Z_R0, Z_R1);
745
746 a->z_stck(0, Z_ARG1); // Get end timestamp.
747 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calculate elapsed time.
748 a->z_lcgr(Z_ARG2, Z_ARG2);
749 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds
750 a->z_stg(Z_ARG2, 8, Z_ARG1); // Store difference in buffer[1].
751
752 a->z_llill(Z_R0, 0xffff); // preset #iterations
753 a->z_larl(Z_R1, negDisp);
754 a->z_xgr(Z_ARG2, Z_ARG2); // Clear to detect absence of LongDisp facility.
755 a->z_stck(0, Z_ARG1); // Get begin timestamp.
756 a->z_la(Z_ARG1, 8, Z_ARG1);
757
758 a->bind(negDisp); // Negative disp loop.
759 a->z_lg(Z_ARG2, -8, Z_ARG1);
760 a->z_bctgr(Z_R0, Z_R1);
761
762 a->z_aghi(Z_ARG1, -8);
763 a->z_stck(0, Z_ARG1); // Get end timestamp.
764 a->z_ltgr(Z_ARG2, Z_ARG2); // Check for absence of LongDisp facility.
765 a->z_brz(noLongDisp);
766 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calc elapsed time.
767 a->z_lcgr(Z_ARG2, Z_ARG2);
768 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds
769 a->z_stg(Z_ARG2, 0, Z_ARG1); // store difference in buffer[0]
770
771 a->z_llill(Z_RET,0xffff);
772 a->z_br(Z_R14);
773
774 a->bind(noLongDisp);
775 a->z_lghi(Z_RET,-1);
776 a->z_br(Z_R14);
777
778 address code_end = a->pc();
779 a->flush();
780
781 // Print the detection code.
782 bool printVerbose = Verbose || PrintAssembly || PrintStubCode;
783 if (printVerbose) {
784 ttyLocker ttyl;
785 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
786 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.",
787 code_end-code, cbuf_size, cbuf_size-(code_end-code));
788
789 // Use existing decode function. This enables the [Code] format which is needed to DecodeErrorFile.
790 Disassembler::decode((u_char*)code, (u_char*)code_end, tty);
791 }
792
793 // Prepare for detection code execution and clear work buffer.
794 _nfeatures = 0;
795 _ncipher_features = 0;
796 unsigned long buffer[buf_len];
797
798 for (int i = 0; i < buf_len; i++) {
799 buffer[i] = 0L;
800 }
801
802 // execute code
803 // Illegal instructions will be replaced by 0 in signal handler.
804 // In case of problems, call_getFeatures will return a not-positive result.
805 long used_len = call_getFeatures(buffer, buf_len, 0);
806
807 bool ok;
808 if (used_len == 1) {
809 ok = true;
810 } else if (used_len > 1) {
811 unsigned int used_lenU = (unsigned int)used_len;
812 ok = true;
813 for (unsigned int i = 1; i < used_lenU; i++) {
814 ok = ok && (buffer[i] == 0L);
815 }
816 if (printVerbose && !ok) {
817 bool compact = false;
818 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU);
819 if (compact) {
820 tty->print("non-zero feature list elements:");
821 for (unsigned int i = 0; i < used_lenU; i++) {
822 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]);
823 }
824 tty->cr();
825 } else {
826 for (unsigned int i = 0; i < used_lenU; i++) {
827 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]);
828 }
829 }
830
831 if (compact) {
832 tty->print_cr("Active features (compact view):");
833 for (unsigned int k = 0; k < used_lenU; k++) {
834 tty->print_cr(" buffer[%d]:", k);
835 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
836 bool line = false;
837 for (unsigned int i = j*8; i < (j+1)*8; i++) {
838 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
839 if (bit) {
840 if (!line) {
841 tty->print(" byte[%d]:", j);
842 line = true;
843 }
844 tty->print(" [%3.3d]", i);
845 }
846 }
847 if (line) {
848 tty->cr();
849 }
850 }
851 }
852 } else {
853 tty->print_cr("Active features (full view):");
854 for (unsigned int k = 0; k < used_lenU; k++) {
855 tty->print_cr(" buffer[%d]:", k);
856 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
857 tty->print(" byte[%d]:", j);
858 for (unsigned int i = j*8; i < (j+1)*8; i++) {
859 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
860 if (bit) {
861 tty->print(" [%3.3d]", i);
862 } else {
863 tty->print(" ");
864 }
865 }
866 tty->cr();
867 }
868 }
869 }
870 }
871 ok = true;
872 } else { // No features retrieved if we reach here. Buffer too short or instr not available.
873 if (used_len < 0) {
874 ok = false;
875 if (printVerbose) {
876 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len);
877 }
878 } else {
879 if (printVerbose) {
880 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out...");
881 }
882 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!!
883
884 ok = used_len > 0;
885 if (ok) {
886 if (buffer[1]*10 < buffer[0]) {
887 set_features_z900();
888 } else {
889 set_features_z990();
890 }
891
892 if (printVerbose) {
893 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len);
894 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]);
895 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]);
896 if (has_long_displacement_fast()) {
897 tty->print_cr(" assuming high-speed long displacement IS available.");
898 } else {
899 tty->print_cr(" assuming high-speed long displacement is NOT available.");
900 }
901 }
902 } else {
903 if (printVerbose) {
904 tty->print_cr("Note: high-speed long displacement test was not successful.");
905 tty->print_cr(" assuming long displacement is NOT available.");
906 }
907 }
908 return; // Do not copy buffer to _features, no test for cipher features.
909 }
910 }
911
912 if (ok) {
913 // Fill features buffer.
914 // Clear work buffer.
915 for (int i = 0; i < buf_len; i++) {
916 _features[i] = buffer[i];
917 _cipher_features[i] = 0;
918 _msgdigest_features[i] = 0;
919 buffer[i] = 0L;
920 }
921 _nfeatures = used_len;
922 } else {
923 for (int i = 0; i < buf_len; i++) {
924 _features[i] = 0;
925 _cipher_features[i] = 0;
926 _msgdigest_features[i] = 0;
927 buffer[i] = 0L;
928 }
929 _nfeatures = 0;
930 }
931
932 // Extract Crypto Facility details.
933 if (has_Crypto()) {
934 // Get cipher features.
935 used_len = call_getFeatures(buffer, -2, 0);
936 for (int i = 0; i < buf_len; i++) {
937 _cipher_features[i] = buffer[i];
938 }
939 _ncipher_features = used_len;
940
941 // Get msg digest features.
942 used_len = call_getFeatures(buffer, -3, 0);
943 for (int i = 0; i < buf_len; i++) {
944 _msgdigest_features[i] = buffer[i];
945 }
946 _nmsgdigest_features = used_len;
947 }
948
949 static int levelProperties[_max_cache_levels]; // All property indications per level.
950 static int levelScope[_max_cache_levels]; // private/shared
951 static const char* levelScopeText[4] = {"No cache ",
952 "CPU private",
953 "shared ",
954 "reserved "};
955
956 static int levelType[_max_cache_levels]; // D/I/mixed
957 static const char* levelTypeText[4] = {"separate D and I caches",
958 "I cache only ",
959 "D-cache only ",
960 "combined D/I cache "};
961
962 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits
963 static unsigned int levelLineSize[_max_cache_levels];
964 static unsigned int levelTotalSize[_max_cache_levels];
965 static unsigned int levelAssociativity[_max_cache_levels];
966
967
968 // Extract Cache Layout details.
969 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now.
970 bool lineSize_mismatch;
971 bool print_something;
972 long functionResult;
973 unsigned int attributeIndication = 0; // 0..15
974 unsigned int levelIndication = 0; // 0..8
975 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache)
976 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication);
977
978 // Get cache topology.
979 functionResult = call_getFeatures(buffer, -1, functionCode);
980
981 for (unsigned int i = 0; i < _max_cache_levels; i++) {
982 if (functionResult > 0) {
983 int shiftVal = 8*(_max_cache_levels-(i+1));
984 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal;
985 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4;
986 levelScope[i] = (levelProperties[i] & 0x0c) >> 2;
987 levelType[i] = (levelProperties[i] & 0x03);
988 } else {
989 levelProperties[i] = 0;
990 levelReserved[i] = 0;
991 levelScope[i] = 0;
992 levelType[i] = 0;
993 }
994 levelLineSize[i] = 0;
995 levelTotalSize[i] = 0;
996 levelAssociativity[i] = 0;
997 }
998
999 tty->cr();
1000 tty->print_cr("------------------------------------");
1001 tty->print_cr("--- Cache Topology Information ---");
1002 tty->print_cr("------------------------------------");
1003 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1004 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s",
1005 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]);
1006 }
1007
1008 // Get D-cache details per level.
1009 _Dcache_lineSize = 0;
1010 lineSize_mismatch = false;
1011 print_something = false;
1012 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1013 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1014 if ((levelType[i] == 0) || (levelType[i] == 2)) {
1015 print_something = true;
1016
1017 // Get cache line size of level i.
1018 attributeIndication = 1;
1019 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1020 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1021
1022 // Get cache total size of level i.
1023 attributeIndication = 2;
1024 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1025 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1026
1027 // Get cache associativity of level i.
1028 attributeIndication = 3;
1029 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1030 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1031
1032 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1033 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]);
1034 } else {
1035 levelLineSize[i] = 0;
1036 }
1037 }
1038
1039 if (print_something) {
1040 tty->cr();
1041 tty->print_cr("------------------------------------");
1042 tty->print_cr("--- D-Cache Detail Information ---");
1043 tty->print_cr("------------------------------------");
1044 if (lineSize_mismatch) {
1045 tty->print_cr("WARNING: D-Cache line size mismatch!");
1046 }
1047 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1048 if (levelLineSize[i] > 0) {
1049 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1050 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1051 }
1052 }
1053 }
1054
1055 // Get I-cache details per level.
1056 _Icache_lineSize = 0;
1057 lineSize_mismatch = false;
1058 print_something = false;
1059 typeIndication = 1; // 0..1 (D-Cache, I-Cache)
1060 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1061 if ((levelType[i] == 0) || (levelType[i] == 1)) {
1062 print_something = true;
1063
1064 // Get cache line size of level i.
1065 attributeIndication = 1;
1066 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1067 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1068
1069 // Get cache total size of level i.
1070 attributeIndication = 2;
1071 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1072 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1073
1074 // Get cache associativity of level i.
1075 attributeIndication = 3;
1076 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1077 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1078
1079 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1080 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]);
1081 } else {
1082 levelLineSize[i] = 0;
1083 }
1084 }
1085
1086 if (print_something) {
1087 tty->cr();
1088 tty->print_cr("------------------------------------");
1089 tty->print_cr("--- I-Cache Detail Information ---");
1090 tty->print_cr("------------------------------------");
1091 if (lineSize_mismatch) {
1092 tty->print_cr("WARNING: I-Cache line size mismatch!");
1093 }
1094 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1095 if (levelLineSize[i] > 0) {
1096 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1097 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1098 }
1099 }
1100 }
1101
1102 // Get D/I-cache details per level.
1103 lineSize_mismatch = false;
1104 print_something = false;
1105 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1106 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1107 if (levelType[i] == 3) {
1108 print_something = true;
1109
1110 // Get cache line size of level i.
1111 attributeIndication = 1;
1112 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1113 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1114
1115 // Get cache total size of level i.
1116 attributeIndication = 2;
1117 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1118 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1119
1120 // Get cache associativity of level i.
1121 attributeIndication = 3;
1122 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1123 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1124
1125 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1126 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1127 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i])
1128 || (_Icache_lineSize != levelLineSize[i]);
1129 } else {
1130 levelLineSize[i] = 0;
1131 }
1132 }
1133
1134 if (print_something) {
1135 tty->cr();
1136 tty->print_cr("--------------------------------------");
1137 tty->print_cr("--- D/I-Cache Detail Information ---");
1138 tty->print_cr("--------------------------------------");
1139 if (lineSize_mismatch) {
1140 tty->print_cr("WARNING: D/I-Cache line size mismatch!");
1141 }
1142 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1143 if (levelLineSize[i] > 0) {
1144 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1145 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1146 }
1147 }
1148 }
1149 tty->cr();
1150 }
1151 return;
1152 }
1153
1154 unsigned long VM_Version::z_SIGILL() {
1155 unsigned long ZeroBuffer = 0;
1156 unsigned long work;
1157 asm(
1158 " LA %[work],%[buffer] \n\t" // Load address of buffer.
1159 " LARL 14,+6 \n\t" // Load address of faulting instruction.
1160 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there.
1161 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1162 , [work] "=&a" (work) /* outputs */
1163 : /* inputs */
1164 : "cc" /* clobbered */
1165 );
1166 return ZeroBuffer;
1167 }
1168
1169 unsigned long VM_Version::z_SIGSEGV() {
1170 unsigned long ZeroBuffer = 0;
1171 unsigned long work;
1172 asm(
1173 " LG %[work],%[buffer] \n\t" // Load zero address.
1174 " STG %[work],0(,%[work])\n\t" // Store to address zero.
1175 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1176 , [work] "=&a" (work) /* outputs */
1177 : /* inputs */
1178 : "cc" /* clobbered */
1179 );
1180 return ZeroBuffer;
1181 }
1182