src/share/vm/c1/c1_LIR.cpp

rev 12121 : [mq]: all_changes.patch

@@ -207,10 +207,21 @@
       assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
              "can't produce oops from arith");
   }
 
   if (TwoOperandLIRForm) {
+
+#ifdef ASSERT
+    bool threeOperandForm = false;
+#ifdef S390
+    // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
+    threeOperandForm =
+      code() == lir_shl ||
+      ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
+#endif
+#endif
+
     switch (code()) {
     case lir_add:
     case lir_sub:
     case lir_mul:
     case lir_mul_strictfp:

@@ -220,17 +231,17 @@
     case lir_logic_and:
     case lir_logic_or:
     case lir_logic_xor:
     case lir_shl:
     case lir_shr:
-      assert(in_opr1() == result_opr(), "opr1 and result must match");
+      assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
       break;
 
     // special handling for lir_ushr because of write barriers
     case lir_ushr:
-      assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
+      assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
       break;
 
     }
   }