1 /* 2 * Copyright (c) 2016, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2016 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "asm/assembler.inline.hpp" 28 #include "compiler/disassembler.hpp" 29 #include "code/compiledIC.hpp" 30 #include "memory/resourceArea.hpp" 31 #include "runtime/java.hpp" 32 #include "runtime/stubCodeGenerator.hpp" 33 #include "vm_version_s390.hpp" 34 35 # include <sys/sysinfo.h> 36 37 bool VM_Version::_is_determine_features_test_running = false; 38 39 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0}; 40 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0}; 41 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0}; 42 unsigned int VM_Version::_nfeatures = 0; 43 unsigned int VM_Version::_ncipher_features = 0; 44 unsigned int VM_Version::_nmsgdigest_features = 0; 45 unsigned int VM_Version::_Dcache_lineSize = 256; 46 unsigned int VM_Version::_Icache_lineSize = 256; 47 48 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" }; 49 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" }; 50 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" }; 51 52 void VM_Version::initialize() { 53 determine_features(); // Get processor capabilities. 54 set_features_string(); // Set a descriptive feature indication. 55 56 if (Verbose) { 57 print_features(); 58 } 59 60 intx cache_line_size = Dcache_lineSize(0); 61 62 MaxVectorSize = 8; 63 64 if (has_PrefetchRaw()) { 65 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset 66 // 0 = no prefetch. 67 // 1 = Prefetch instructions for each allocation. 68 // 2 = Use TLAB watermark to gate allocation prefetch. 69 AllocatePrefetchStyle = 1; 70 } 71 72 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all? 73 // Distance to prefetch ahead of allocation pointer. 74 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset 75 AllocatePrefetchDistance = 0; 76 } 77 78 // Number of lines to prefetch ahead of allocation pointer. 79 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset 80 AllocatePrefetchLines = 3; 81 } 82 83 // Step size in bytes of sequential prefetch instructions. 84 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset 85 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 86 } else if (AllocatePrefetchStepSize < cache_line_size) { 87 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 88 } else { 89 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 90 } 91 } else { 92 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 93 AllocatePrefetchDistance = 0; 94 AllocatePrefetchLines = 0; 95 // Can't be zero. Will SIGFPE during constraints checking. 96 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 97 } 98 99 } else { 100 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 101 AllocatePrefetchDistance = 0; 102 AllocatePrefetchLines = 0; 103 // Can't be zero. Will SIGFPE during constraints checking. 104 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 105 } 106 107 // TODO: 108 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need 109 // to keep contended members that far apart? Performance tests are required. 110 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) { 111 ContendedPaddingWidth = cache_line_size; 112 } 113 114 // On z/Architecture, the CRC32 intrinsics had to be implemented "by hand". 115 // They cannot be based on the CHECKSUM instruction which has been there 116 // since the very beginning (of z/Architecture). It computes "some kind of" a checksum 117 // which has nothing to do with the CRC32 algorithm. 118 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { 119 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true); 120 } 121 122 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics. 123 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set 124 // depending on the actual machine capabilities. 125 // Explicitly setting them via CmdLine option takes precedence, of course. 126 // TODO: UseAESIntrinsics must be made keylength specific. 127 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions. 128 // Therefore, UseAESIntrinsics is of minimal use at the moment. 129 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) { 130 FLAG_SET_DEFAULT(UseAES, true); 131 } 132 if (UseAES && !has_Crypto_AES()) { 133 warning("AES instructions are not available on this CPU"); 134 FLAG_SET_DEFAULT(UseAES, false); 135 } 136 if (UseAES) { 137 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { 138 FLAG_SET_DEFAULT(UseAESIntrinsics, true); 139 } 140 } 141 if (UseAESIntrinsics && !has_Crypto_AES()) { 142 warning("AES intrinsics are not available on this CPU"); 143 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 144 } 145 146 // TODO: implement AES/CTR intrinsics 147 if (UseAESCTRIntrinsics) { 148 warning("AES/CTR intrinsics are not available on this CPU"); 149 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); 150 } 151 152 // TODO: implement GHASH intrinsics 153 if (UseGHASHIntrinsics) { 154 warning("GHASH intrinsics are not available on this CPU"); 155 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false); 156 } 157 158 if (UseFMA) { 159 warning("FMA instructions are not available on this CPU"); 160 FLAG_SET_DEFAULT(UseFMA, false); 161 } 162 163 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics. 164 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual 165 // machine capabilities. 166 // Explicitly setting them via CmdLine option takes precedence, of course. 167 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) { 168 FLAG_SET_DEFAULT(UseSHA, true); 169 } 170 if (UseSHA && !has_Crypto_SHA()) { 171 warning("SHA instructions are not available on this CPU"); 172 FLAG_SET_DEFAULT(UseSHA, false); 173 } 174 if (UseSHA && has_Crypto_SHA1()) { 175 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) { 176 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true); 177 } 178 } else if (UseSHA1Intrinsics) { 179 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU."); 180 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); 181 } 182 if (UseSHA && has_Crypto_SHA256()) { 183 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) { 184 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true); 185 } 186 } else if (UseSHA256Intrinsics) { 187 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU."); 188 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); 189 } 190 if (UseSHA && has_Crypto_SHA512()) { 191 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) { 192 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true); 193 } 194 } else if (UseSHA512Intrinsics) { 195 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU."); 196 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); 197 } 198 199 if (UseAdler32Intrinsics) { 200 warning("Adler32Intrinsics not available on this CPU."); 201 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false); 202 } 203 204 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) { 205 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true); 206 } 207 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) { 208 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true); 209 } 210 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { 211 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true); 212 } 213 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { 214 FLAG_SET_DEFAULT(UsePopCountInstruction, true); 215 } 216 217 // z/Architecture supports 8-byte compare-exchange operations 218 // (see Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr) 219 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). 220 _supports_cx8 = true; 221 222 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1(); 223 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1(); 224 225 // z/Architecture supports unaligned memory accesses. 226 // Performance penalty is negligible. An additional tick or so 227 // is lost if the accessed data spans a cache line boundary. 228 // Unaligned accesses are not atomic, of course. 229 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { 230 FLAG_SET_DEFAULT(UseUnalignedAccesses, true); 231 } 232 } 233 234 235 void VM_Version::set_features_string() { 236 237 unsigned int ambiguity = 0; 238 if (is_z13()) { 239 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)"; 240 ambiguity++; 241 } 242 if (is_ec12()) { 243 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)"; 244 ambiguity++; 245 } 246 if (is_z196()) { 247 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)"; 248 ambiguity++; 249 } 250 if (is_z10()) { 251 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)"; 252 ambiguity++; 253 } 254 if (is_z9()) { 255 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01"; 256 ambiguity++; 257 } 258 if (is_z990()) { 259 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01"; 260 ambiguity++; 261 } 262 if (is_z900()) { 263 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01"; 264 ambiguity++; 265 } 266 267 if (ambiguity == 0) { 268 _features_string = "z/Architecture (unknown generation)"; 269 } else if (ambiguity > 1) { 270 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity); 271 tty->print_cr(" oldest detected generation is %s", _features_string); 272 _features_string = "z/Architecture (ambiguous detection)"; 273 } 274 275 if (has_Crypto_AES()) { 276 char buf[256]; 277 assert(strlen(_features_string) + 4 + 3*4 + 1 < sizeof(buf), "increase buffer size"); 278 jio_snprintf(buf, sizeof(buf), "%s aes%s%s%s", // String 'aes' must be surrounded by spaces so that jtreg tests recognize it. 279 _features_string, 280 has_Crypto_AES128() ? " 128" : "", 281 has_Crypto_AES192() ? " 192" : "", 282 has_Crypto_AES256() ? " 256" : ""); 283 _features_string = os::strdup(buf); 284 } 285 286 if (has_Crypto_SHA()) { 287 char buf[256]; 288 assert(strlen(_features_string) + 4 + 2 + 2*4 + 6 + 1 < sizeof(buf), "increase buffer size"); 289 // String 'sha1' etc must be surrounded by spaces so that jtreg tests recognize it. 290 jio_snprintf(buf, sizeof(buf), "%s %s%s%s%s", 291 _features_string, 292 has_Crypto_SHA1() ? " sha1" : "", 293 has_Crypto_SHA256() ? " sha256" : "", 294 has_Crypto_SHA512() ? " sha512" : "", 295 has_Crypto_GHASH() ? " ghash" : ""); 296 if (has_Crypto_AES()) { os::free((void *)_features_string); } 297 _features_string = os::strdup(buf); 298 } 299 } 300 301 // featureBuffer - bit array indicating availability of various features 302 // featureNum - bit index of feature to be tested 303 // Featurenum < 0 requests test for any nonzero bit in featureBuffer. 304 // bufLen - length of featureBuffer in bits 305 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) { 306 assert(bufLen > 0, "buffer len must be positive"); 307 assert((bufLen & 0x0007) == 0, "unaligned buffer len"); 308 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer"); 309 if (featureNum < 0) { 310 // Any bit set at all? 311 bool anyBit = false; 312 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) { 313 anyBit = anyBit || (featureBuffer[i] != 0); 314 } 315 return anyBit; 316 } else { 317 assert((unsigned int)featureNum < bufLen, "feature index out of range"); 318 unsigned char* byteBuffer = (unsigned char*)featureBuffer; 319 int byteIndex = featureNum/(8*sizeof(char)); 320 int bitIndex = featureNum%(8*sizeof(char)); 321 // Indexed bit set? 322 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0; 323 } 324 } 325 326 void VM_Version::print_features_internal(const char* text, bool print_anyway) { 327 tty->print_cr("%s %s", text, features_string()); 328 tty->print("%s", text); 329 for (unsigned int i = 0; i < _nfeatures; i++) { 330 tty->print(" 0x%16.16lx", _features[i]); 331 } 332 tty->cr(); 333 334 if (Verbose || print_anyway) { 335 // z900 336 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility"); 337 // z990 338 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf"); 339 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3"); 340 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility"); 341 // z9 342 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility"); 343 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended"); 344 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast"); 345 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements"); 346 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements"); 347 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility"); 348 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility"); 349 // z10 350 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements"); 351 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime"); 352 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore"); 353 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions"); 354 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch"); 355 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap"); 356 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store"); 357 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32"); 358 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch"); 359 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory"); 360 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate"); 361 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes"); 362 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions"); 363 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements"); 364 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint"); 365 // z196 366 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands"); 367 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)"); 368 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount"); 369 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional"); 370 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions"); 371 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)"); 372 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate"); 373 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions"); 374 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3"); 375 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4"); 376 // EC12 377 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions"); 378 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)"); 379 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists"); 380 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap"); 381 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory"); 382 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)"); 383 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions"); 384 // z13 385 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2"); 386 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5"); 387 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions"); 388 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility"); 389 // test switches 390 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl"); 391 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl"); 392 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl"); 393 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl"); 394 395 if (has_Crypto()) { 396 tty->cr(); 397 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility"); 398 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) { 399 tty->cr(); 400 tty->print_cr(" available: %s", "Message Cipher Functions"); 401 } 402 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) { 403 tty->print_cr(" available Crypto Features of KM (Cipher Message):"); 404 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 405 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) { 406 switch (i) { 407 case Cipher::_Query: tty->print_cr(" available: KM Query"); break; 408 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break; 409 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break; 410 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break; 411 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break; 412 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break; 413 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break; 414 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break; 415 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break; 416 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break; 417 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break; 418 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break; 419 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break; 420 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break; 421 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break; 422 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break; 423 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break; 424 default: tty->print_cr(" available: unknown KM code %d", i); break; 425 } 426 } 427 } 428 } 429 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) { 430 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):"); 431 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 432 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) { 433 switch (i) { 434 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break; 435 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break; 436 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break; 437 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break; 438 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break; 439 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break; 440 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break; 441 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break; 442 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break; 443 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break; 444 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break; 445 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break; 446 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break; 447 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break; 448 default: tty->print_cr(" available: unknown KMC code %d", i); break; 449 } 450 } 451 } 452 } 453 454 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) { 455 tty->cr(); 456 tty->print_cr(" available: %s", "Message Digest Functions for SHA"); 457 } 458 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) { 459 tty->print_cr(" available Features of KIMD (Msg Digest):"); 460 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 461 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) { 462 switch (i) { 463 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break; 464 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break; 465 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break; 466 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break; 467 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break; 468 default: tty->print_cr(" available: unknown code %d", i); break; 469 } 470 } 471 } 472 } 473 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) { 474 tty->print_cr(" available Features of KLMD (Msg Digest):"); 475 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 476 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) { 477 switch (i) { 478 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break; 479 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break; 480 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break; 481 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break; 482 default: tty->print_cr(" available: unknown code %d", i); break; 483 } 484 } 485 } 486 } 487 } 488 if (ContendedPaddingWidth > 0) { 489 tty->cr(); 490 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth); 491 } 492 } 493 } 494 495 void VM_Version::print_features() { 496 print_features_internal("Version:"); 497 } 498 499 void VM_Version::reset_features(bool reset) { 500 if (reset) { 501 for (unsigned int i = 0; i < _features_buffer_len; i++) { 502 VM_Version::_features[i] = 0; 503 } 504 } 505 } 506 507 void VM_Version::set_features_z900(bool reset) { 508 reset_features(reset); 509 510 set_has_long_displacement(); 511 set_has_ETF2(); 512 } 513 514 void VM_Version::set_features_z990(bool reset) { 515 reset_features(reset); 516 517 set_features_z900(false); 518 set_has_ETF3(); 519 set_has_long_displacement_fast(); 520 set_has_HFPMultiplyAndAdd(); 521 } 522 523 void VM_Version::set_features_z9(bool reset) { 524 reset_features(reset); 525 526 set_features_z990(false); 527 set_has_StoreFacilityListExtended(); 528 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately. 529 set_has_ETF2Enhancements(); 530 set_has_ETF3Enhancements(); 531 set_has_extended_immediate(); 532 set_has_StoreClockFast(); 533 set_has_HFPUnnormalized(); 534 } 535 536 void VM_Version::set_features_z10(bool reset) { 537 reset_features(reset); 538 539 set_features_z9(false); 540 set_has_CompareSwapStore(); 541 set_has_RelativeLoadStore(); 542 set_has_CompareBranch(); 543 set_has_CompareTrap(); 544 set_has_MultiplySingleImm32(); 545 set_has_Prefetch(); 546 set_has_MoveImmToMem(); 547 set_has_MemWithImmALUOps(); 548 set_has_ExecuteExtensions(); 549 set_has_FPSupportEnhancements(); 550 set_has_DecimalFloatingPoint(); 551 set_has_ExtractCPUtime(); 552 set_has_CryptoExt3(); 553 } 554 555 void VM_Version::set_features_z196(bool reset) { 556 reset_features(reset); 557 558 set_features_z10(false); 559 set_has_InterlockedAccessV1(); 560 set_has_PopCount(); 561 set_has_LoadStoreConditional(); 562 set_has_HighWordInstr(); 563 set_has_FastSync(); 564 set_has_FPExtensions(); 565 set_has_DistinctOpnds(); 566 set_has_CryptoExt4(); 567 } 568 569 void VM_Version::set_features_ec12(bool reset) { 570 reset_features(reset); 571 572 set_features_z196(false); 573 set_has_MiscInstrExt(); 574 set_has_InterlockedAccessV2(); 575 set_has_LoadAndALUAtomicV2(); 576 set_has_TxMem(); 577 } 578 579 void VM_Version::set_features_z13(bool reset) { 580 reset_features(reset); 581 582 set_features_ec12(false); 583 set_has_LoadStoreConditional2(); 584 set_has_CryptoExt5(); 585 set_has_VectorFacility(); 586 } 587 588 void VM_Version::set_features_from(const char* march) { 589 bool err = false; 590 bool prt = false; 591 592 if ((march != NULL) && (march[0] != '\0')) { 593 const int buf_len = 16; 594 const int hdr_len = 5; 595 char buf[buf_len]; 596 if (strlen(march) >= hdr_len) { 597 memcpy(buf, march, hdr_len); 598 buf[hdr_len] = '\00'; 599 } else { 600 buf[0] = '\00'; 601 } 602 603 if (!strcmp(march, "z900")) { 604 set_features_z900(); 605 } else if (!strcmp(march, "z990")) { 606 set_features_z990(); 607 } else if (!strcmp(march, "z9")) { 608 set_features_z9(); 609 } else if (!strcmp(march, "z10")) { 610 set_features_z10(); 611 } else if (!strcmp(march, "z196")) { 612 set_features_z196(); 613 } else if (!strcmp(march, "ec12")) { 614 set_features_ec12(); 615 } else if (!strcmp(march, "z13")) { 616 set_features_z13(); 617 } else if (!strcmp(buf, "ztest")) { 618 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict"); 619 if (strlen(march) > hdr_len) { 620 int itest = 0; 621 if ((strlen(march)-hdr_len) >= buf_len) err = true; 622 if (!err) { 623 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len); 624 buf[strlen(march)-hdr_len] = '\00'; 625 for (size_t i = 0; !err && (i < strlen(buf)); i++) { 626 itest = itest*10 + buf[i]-'0'; 627 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15); 628 } 629 } 630 if (!err) { 631 prt = true; 632 if (itest & 0x01) { set_has_TestFeature1Impl(); } 633 if (itest & 0x02) { set_has_TestFeature2Impl(); } 634 if (itest & 0x04) { set_has_TestFeature4Impl(); } 635 if (itest & 0x08) { set_has_TestFeature8Impl(); } 636 } 637 } else { 638 prt = true; 639 set_has_TestFeature1Impl(); 640 set_has_TestFeature2Impl(); 641 set_has_TestFeature4Impl(); 642 set_has_TestFeature8Impl(); 643 } 644 } else { 645 err = true; 646 } 647 if (!err) { 648 set_features_string(); 649 if (prt || PrintAssembly) { 650 print_features_internal("CPU Version as set by cmdline option:", prt); 651 } 652 } else { 653 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march); 654 } 655 } 656 657 } 658 659 static long (*getFeatures)(unsigned long*, int, int) = NULL; 660 661 void VM_Version::set_getFeatures(address entryPoint) { 662 if (getFeatures == NULL) { 663 getFeatures = (long(*)(unsigned long*, int, int))entryPoint; 664 } 665 } 666 667 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) { 668 VM_Version::_is_determine_features_test_running = true; 669 long functionResult = (*getFeatures)(buffer, buflen, functionCode); 670 VM_Version::_is_determine_features_test_running = false; 671 return functionResult; 672 } 673 674 // Helper function for "extract cache attribute" instruction. 675 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication, 676 unsigned int levelIndication, 677 unsigned int typeIndication) { 678 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication; 679 } 680 681 void VM_Version::determine_features() { 682 683 const int cbuf_size = _code_buffer_len; 684 const int buf_len = _features_buffer_len; 685 686 // Allocate code buffer space for the detection code. 687 ResourceMark rm; 688 CodeBuffer cbuf("determine CPU features", cbuf_size, 0); 689 MacroAssembler* a = new MacroAssembler(&cbuf); 690 691 // Emit code. 692 set_getFeatures(a->pc()); 693 address code = a->pc(); 694 695 // Try STFLE. Possible INVOP will cause defaults to be used. 696 Label getFEATURES; 697 Label getCPUFEATURES; // fcode = -1 (cache) 698 Label getCIPHERFEATURES; // fcode = -2 (cipher) 699 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA) 700 Label checkLongDispFast; 701 Label noLongDisp; 702 Label posDisp, negDisp; 703 Label errRTN; 704 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test. 705 a->z_brl(getFEATURES); // negative -> Get machine features. 706 a->z_brz(checkLongDispFast); // zero -> Check for high-speed Long Displacement Facility. 707 a->z_aghi(Z_R0, -1); 708 a->z_stfle(0, Z_ARG1); 709 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list. 710 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success. 711 a->z_la(Z_RET, 1, Z_RET); 712 a->z_brnz(errRTN); // Instr failed if non-zero CC. 713 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0. 714 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return. 715 716 a->bind(errRTN); 717 a->z_lngr(Z_RET, Z_RET); 718 a->z_ltgr(Z_R1, Z_R1); 719 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small". 720 a->z_xgr(Z_RET, Z_RET); 721 a->z_br(Z_R14); // Return "operation aborted". 722 723 a->bind(getFEATURES); 724 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only. 725 a->z_bre(getCPUFEATURES); 726 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions). 727 a->z_bre(getCIPHERFEATURES); 728 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions). 729 a->z_bre(getMSGDIGESTFEATURES); 730 731 a->z_xgr(Z_RET, Z_RET); // Not a valid function code. 732 a->z_br(Z_R14); // Return "operation aborted". 733 734 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions. 735 a->bind(getMSGDIGESTFEATURES); 736 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code 737 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size 738 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk). 739 a->z_la(Z_R1,16,Z_R1); // next param block addr 740 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk). 741 a->z_lghi(Z_RET,4); 742 a->z_br(Z_R14); 743 744 // Try KM/KMC query function to get details about crypto instructions. 745 a->bind(getCIPHERFEATURES); 746 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code 747 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output) 748 a->z_km(Z_R2,Z_R2); // get available KM functions 749 a->z_la(Z_R1,16,Z_R1); // next param block addr 750 a->z_kmc(Z_R2,Z_R2); // get available KMC functions 751 a->z_lghi(Z_RET,4); 752 a->z_br(Z_R14); 753 754 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout. 755 a->bind(getCPUFEATURES); 756 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation 757 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents. 758 a->z_br(Z_R14); 759 760 // Check the performance of the Long Displacement Facility, i.e. find out if we are running on z900 or newer. 761 a->bind(checkLongDispFast); 762 a->z_llill(Z_R0, 0xffff); // preset #iterations 763 a->z_larl(Z_R1, posDisp); 764 a->z_stck(0, Z_ARG1); // Get begin timestamp. 765 766 a->bind(posDisp); // Positive disp loop. 767 a->z_lg(Z_ARG2, 0, Z_ARG1); 768 a->z_bctgr(Z_R0, Z_R1); 769 770 a->z_stck(0, Z_ARG1); // Get end timestamp. 771 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calculate elapsed time. 772 a->z_lcgr(Z_ARG2, Z_ARG2); 773 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds 774 a->z_stg(Z_ARG2, 8, Z_ARG1); // Store difference in buffer[1]. 775 776 a->z_llill(Z_R0, 0xffff); // preset #iterations 777 a->z_larl(Z_R1, negDisp); 778 a->z_xgr(Z_ARG2, Z_ARG2); // Clear to detect absence of LongDisp facility. 779 a->z_stck(0, Z_ARG1); // Get begin timestamp. 780 a->z_la(Z_ARG1, 8, Z_ARG1); 781 782 a->bind(negDisp); // Negative disp loop. 783 a->z_lg(Z_ARG2, -8, Z_ARG1); 784 a->z_bctgr(Z_R0, Z_R1); 785 786 a->z_aghi(Z_ARG1, -8); 787 a->z_stck(0, Z_ARG1); // Get end timestamp. 788 a->z_ltgr(Z_ARG2, Z_ARG2); // Check for absence of LongDisp facility. 789 a->z_brz(noLongDisp); 790 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calc elapsed time. 791 a->z_lcgr(Z_ARG2, Z_ARG2); 792 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds 793 a->z_stg(Z_ARG2, 0, Z_ARG1); // store difference in buffer[0] 794 795 a->z_llill(Z_RET,0xffff); 796 a->z_br(Z_R14); 797 798 a->bind(noLongDisp); 799 a->z_lghi(Z_RET,-1); 800 a->z_br(Z_R14); 801 802 address code_end = a->pc(); 803 a->flush(); 804 805 // Print the detection code. 806 bool printVerbose = Verbose || PrintAssembly || PrintStubCode; 807 if (printVerbose) { 808 ttyLocker ttyl; 809 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 810 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.", 811 code_end-code, cbuf_size, cbuf_size-(code_end-code)); 812 813 // Use existing decode function. This enables the [Code] format which is needed to DecodeErrorFile. 814 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 815 } 816 817 // Prepare for detection code execution and clear work buffer. 818 _nfeatures = 0; 819 _ncipher_features = 0; 820 unsigned long buffer[buf_len]; 821 822 for (int i = 0; i < buf_len; i++) { 823 buffer[i] = 0L; 824 } 825 826 // execute code 827 // Illegal instructions will be replaced by 0 in signal handler. 828 // In case of problems, call_getFeatures will return a not-positive result. 829 long used_len = call_getFeatures(buffer, buf_len, 0); 830 831 bool ok; 832 if (used_len == 1) { 833 ok = true; 834 } else if (used_len > 1) { 835 unsigned int used_lenU = (unsigned int)used_len; 836 ok = true; 837 for (unsigned int i = 1; i < used_lenU; i++) { 838 ok = ok && (buffer[i] == 0L); 839 } 840 if (printVerbose && !ok) { 841 bool compact = false; 842 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU); 843 if (compact) { 844 tty->print("non-zero feature list elements:"); 845 for (unsigned int i = 0; i < used_lenU; i++) { 846 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]); 847 } 848 tty->cr(); 849 } else { 850 for (unsigned int i = 0; i < used_lenU; i++) { 851 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]); 852 } 853 } 854 855 if (compact) { 856 tty->print_cr("Active features (compact view):"); 857 for (unsigned int k = 0; k < used_lenU; k++) { 858 tty->print_cr(" buffer[%d]:", k); 859 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 860 bool line = false; 861 for (unsigned int i = j*8; i < (j+1)*8; i++) { 862 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 863 if (bit) { 864 if (!line) { 865 tty->print(" byte[%d]:", j); 866 line = true; 867 } 868 tty->print(" [%3.3d]", i); 869 } 870 } 871 if (line) { 872 tty->cr(); 873 } 874 } 875 } 876 } else { 877 tty->print_cr("Active features (full view):"); 878 for (unsigned int k = 0; k < used_lenU; k++) { 879 tty->print_cr(" buffer[%d]:", k); 880 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 881 tty->print(" byte[%d]:", j); 882 for (unsigned int i = j*8; i < (j+1)*8; i++) { 883 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 884 if (bit) { 885 tty->print(" [%3.3d]", i); 886 } else { 887 tty->print(" "); 888 } 889 } 890 tty->cr(); 891 } 892 } 893 } 894 } 895 ok = true; 896 } else { // No features retrieved if we reach here. Buffer too short or instr not available. 897 if (used_len < 0) { 898 ok = false; 899 if (printVerbose) { 900 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len); 901 } 902 } else { 903 if (printVerbose) { 904 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out..."); 905 } 906 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!! 907 908 ok = used_len > 0; 909 if (ok) { 910 if (buffer[1]*10 < buffer[0]) { 911 set_features_z900(); 912 } else { 913 set_features_z990(); 914 } 915 916 if (printVerbose) { 917 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len); 918 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]); 919 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]); 920 if (has_long_displacement_fast()) { 921 tty->print_cr(" assuming high-speed long displacement IS available."); 922 } else { 923 tty->print_cr(" assuming high-speed long displacement is NOT available."); 924 } 925 } 926 } else { 927 if (printVerbose) { 928 tty->print_cr("Note: high-speed long displacement test was not successful."); 929 tty->print_cr(" assuming long displacement is NOT available."); 930 } 931 } 932 return; // Do not copy buffer to _features, no test for cipher features. 933 } 934 } 935 936 if (ok) { 937 // Fill features buffer. 938 // Clear work buffer. 939 for (int i = 0; i < buf_len; i++) { 940 _features[i] = buffer[i]; 941 _cipher_features[i] = 0; 942 _msgdigest_features[i] = 0; 943 buffer[i] = 0L; 944 } 945 _nfeatures = used_len; 946 } else { 947 for (int i = 0; i < buf_len; i++) { 948 _features[i] = 0; 949 _cipher_features[i] = 0; 950 _msgdigest_features[i] = 0; 951 buffer[i] = 0L; 952 } 953 _nfeatures = 0; 954 } 955 956 // Extract Crypto Facility details. 957 if (has_Crypto()) { 958 // Get cipher features. 959 used_len = call_getFeatures(buffer, -2, 0); 960 for (int i = 0; i < buf_len; i++) { 961 _cipher_features[i] = buffer[i]; 962 } 963 _ncipher_features = used_len; 964 965 // Get msg digest features. 966 used_len = call_getFeatures(buffer, -3, 0); 967 for (int i = 0; i < buf_len; i++) { 968 _msgdigest_features[i] = buffer[i]; 969 } 970 _nmsgdigest_features = used_len; 971 } 972 973 static int levelProperties[_max_cache_levels]; // All property indications per level. 974 static int levelScope[_max_cache_levels]; // private/shared 975 static const char* levelScopeText[4] = {"No cache ", 976 "CPU private", 977 "shared ", 978 "reserved "}; 979 980 static int levelType[_max_cache_levels]; // D/I/mixed 981 static const char* levelTypeText[4] = {"separate D and I caches", 982 "I cache only ", 983 "D-cache only ", 984 "combined D/I cache "}; 985 986 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits 987 static unsigned int levelLineSize[_max_cache_levels]; 988 static unsigned int levelTotalSize[_max_cache_levels]; 989 static unsigned int levelAssociativity[_max_cache_levels]; 990 991 992 // Extract Cache Layout details. 993 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now. 994 bool lineSize_mismatch; 995 bool print_something; 996 long functionResult; 997 unsigned int attributeIndication = 0; // 0..15 998 unsigned int levelIndication = 0; // 0..8 999 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1000 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication); 1001 1002 // Get cache topology. 1003 functionResult = call_getFeatures(buffer, -1, functionCode); 1004 1005 for (unsigned int i = 0; i < _max_cache_levels; i++) { 1006 if (functionResult > 0) { 1007 int shiftVal = 8*(_max_cache_levels-(i+1)); 1008 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal; 1009 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4; 1010 levelScope[i] = (levelProperties[i] & 0x0c) >> 2; 1011 levelType[i] = (levelProperties[i] & 0x03); 1012 } else { 1013 levelProperties[i] = 0; 1014 levelReserved[i] = 0; 1015 levelScope[i] = 0; 1016 levelType[i] = 0; 1017 } 1018 levelLineSize[i] = 0; 1019 levelTotalSize[i] = 0; 1020 levelAssociativity[i] = 0; 1021 } 1022 1023 tty->cr(); 1024 tty->print_cr("------------------------------------"); 1025 tty->print_cr("--- Cache Topology Information ---"); 1026 tty->print_cr("------------------------------------"); 1027 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1028 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s", 1029 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]); 1030 } 1031 1032 // Get D-cache details per level. 1033 _Dcache_lineSize = 0; 1034 lineSize_mismatch = false; 1035 print_something = false; 1036 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1037 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1038 if ((levelType[i] == 0) || (levelType[i] == 2)) { 1039 print_something = true; 1040 1041 // Get cache line size of level i. 1042 attributeIndication = 1; 1043 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1044 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1045 1046 // Get cache total size of level i. 1047 attributeIndication = 2; 1048 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1049 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1050 1051 // Get cache associativity of level i. 1052 attributeIndication = 3; 1053 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1054 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1055 1056 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1057 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]); 1058 } else { 1059 levelLineSize[i] = 0; 1060 } 1061 } 1062 1063 if (print_something) { 1064 tty->cr(); 1065 tty->print_cr("------------------------------------"); 1066 tty->print_cr("--- D-Cache Detail Information ---"); 1067 tty->print_cr("------------------------------------"); 1068 if (lineSize_mismatch) { 1069 tty->print_cr("WARNING: D-Cache line size mismatch!"); 1070 } 1071 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1072 if (levelLineSize[i] > 0) { 1073 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1074 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1075 } 1076 } 1077 } 1078 1079 // Get I-cache details per level. 1080 _Icache_lineSize = 0; 1081 lineSize_mismatch = false; 1082 print_something = false; 1083 typeIndication = 1; // 0..1 (D-Cache, I-Cache) 1084 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1085 if ((levelType[i] == 0) || (levelType[i] == 1)) { 1086 print_something = true; 1087 1088 // Get cache line size of level i. 1089 attributeIndication = 1; 1090 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1091 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1092 1093 // Get cache total size of level i. 1094 attributeIndication = 2; 1095 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1096 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1097 1098 // Get cache associativity of level i. 1099 attributeIndication = 3; 1100 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1101 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1102 1103 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1104 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]); 1105 } else { 1106 levelLineSize[i] = 0; 1107 } 1108 } 1109 1110 if (print_something) { 1111 tty->cr(); 1112 tty->print_cr("------------------------------------"); 1113 tty->print_cr("--- I-Cache Detail Information ---"); 1114 tty->print_cr("------------------------------------"); 1115 if (lineSize_mismatch) { 1116 tty->print_cr("WARNING: I-Cache line size mismatch!"); 1117 } 1118 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1119 if (levelLineSize[i] > 0) { 1120 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1121 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1122 } 1123 } 1124 } 1125 1126 // Get D/I-cache details per level. 1127 lineSize_mismatch = false; 1128 print_something = false; 1129 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1130 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1131 if (levelType[i] == 3) { 1132 print_something = true; 1133 1134 // Get cache line size of level i. 1135 attributeIndication = 1; 1136 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1137 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1138 1139 // Get cache total size of level i. 1140 attributeIndication = 2; 1141 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1142 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1143 1144 // Get cache associativity of level i. 1145 attributeIndication = 3; 1146 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1147 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1148 1149 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1150 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1151 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]) 1152 || (_Icache_lineSize != levelLineSize[i]); 1153 } else { 1154 levelLineSize[i] = 0; 1155 } 1156 } 1157 1158 if (print_something) { 1159 tty->cr(); 1160 tty->print_cr("--------------------------------------"); 1161 tty->print_cr("--- D/I-Cache Detail Information ---"); 1162 tty->print_cr("--------------------------------------"); 1163 if (lineSize_mismatch) { 1164 tty->print_cr("WARNING: D/I-Cache line size mismatch!"); 1165 } 1166 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1167 if (levelLineSize[i] > 0) { 1168 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1169 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1170 } 1171 } 1172 } 1173 tty->cr(); 1174 } 1175 return; 1176 } 1177 1178 unsigned long VM_Version::z_SIGILL() { 1179 unsigned long ZeroBuffer = 0; 1180 unsigned long work; 1181 asm( 1182 " LA %[work],%[buffer] \n\t" // Load address of buffer. 1183 " LARL 14,+6 \n\t" // Load address of faulting instruction. 1184 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there. 1185 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1186 , [work] "=&a" (work) /* outputs */ 1187 : /* inputs */ 1188 : "cc" /* clobbered */ 1189 ); 1190 return ZeroBuffer; 1191 } 1192 1193 unsigned long VM_Version::z_SIGSEGV() { 1194 unsigned long ZeroBuffer = 0; 1195 unsigned long work; 1196 asm( 1197 " LG %[work],%[buffer] \n\t" // Load zero address. 1198 " STG %[work],0(,%[work])\n\t" // Store to address zero. 1199 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1200 , [work] "=&a" (work) /* outputs */ 1201 : /* inputs */ 1202 : "cc" /* clobbered */ 1203 ); 1204 return ZeroBuffer; 1205 } 1206