< prev index next >

src/share/vm/opto/mulnode.cpp

Print this page
rev 12503 : 8173470: [C2] Mask shift operands in ideal graph.
Reviewed-by: lucy, kvn


 613   if (op == Op_RShiftL) {
 614     const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 615     if( t12 && t12->is_con() ) { // Shift is by a constant
 616       int shift = t12->get_con();
 617       shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 618       const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
 619       // If the AND'ing of the 2 masks has no bits, then only original shifted
 620       // bits survive.  NO sign-extension bits survive the maskings.
 621       if( (sign_bits_mask & mask) == 0 ) {
 622         // Use zero-fill shift instead
 623         Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
 624         return new AndLNode(zshift, in(2));
 625       }
 626     }
 627   }
 628 
 629   return MulNode::Ideal(phase, can_reshape);
 630 }
 631 
 632 //=============================================================================



















 633 //------------------------------Identity---------------------------------------
 634 Node* LShiftINode::Identity(PhaseGVN* phase) {
 635   const TypeInt *ti = phase->type( in(2) )->isa_int();  // shift count is an int
 636   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
 637 }
 638 
 639 //------------------------------Ideal------------------------------------------
 640 // If the right input is a constant, and the left input is an add of a
 641 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 642 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 643   const Type *t  = phase->type( in(2) );
 644   if( t == Type::TOP ) return NULL;       // Right input is dead
 645   const TypeInt *t2 = t->isa_int();
 646   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 647   const int con = t2->get_con() & ( BitsPerInt - 1 );  // masked shift count
 648 
 649   if ( con == 0 )  return NULL; // let Identity() handle 0 shift count
 650 
 651   // Left input is an add of a constant?
 652   Node *add1 = in(1);
 653   int add1_op = add1->Opcode();
 654   if( add1_op == Op_AddI ) {    // Left input is an add?
 655     assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
 656     const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
 657     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 658       // Transform is legal, but check for profit.  Avoid breaking 'i2s'
 659       // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
 660       if( con < 16 ) {
 661         // Compute X << con0
 662         Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
 663         // Compute X<<con0 + (con1<<con0)
 664         return new AddINode( lsh, phase->intcon(t12->get_con() << con));
 665       }
 666     }
 667   }
 668 
 669   // Check for "(x>>c0)<<c0" which just masks off low bits


 727   // If the shift is a constant, shift the bounds of the type,
 728   // unless this could lead to an overflow.
 729   if (!r1->is_con()) {
 730     jint lo = r1->_lo, hi = r1->_hi;
 731     if (((lo << shift) >> shift) == lo &&
 732         ((hi << shift) >> shift) == hi) {
 733       // No overflow.  The range shifts up cleanly.
 734       return TypeInt::make((jint)lo << (jint)shift,
 735                            (jint)hi << (jint)shift,
 736                            MAX2(r1->_widen,r2->_widen));
 737     }
 738     return TypeInt::INT;
 739   }
 740 
 741   return TypeInt::make( (jint)r1->get_con() << (jint)shift );
 742 }
 743 
 744 //=============================================================================
 745 //------------------------------Identity---------------------------------------
 746 Node* LShiftLNode::Identity(PhaseGVN* phase) {
 747   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
 748   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
 749 }
 750 
 751 //------------------------------Ideal------------------------------------------
 752 // If the right input is a constant, and the left input is an add of a
 753 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 754 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 755   const Type *t  = phase->type( in(2) );
 756   if( t == Type::TOP ) return NULL;       // Right input is dead
 757   const TypeInt *t2 = t->isa_int();
 758   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 759   const int con = t2->get_con() & ( BitsPerLong - 1 );  // masked shift count
 760 
 761   if ( con == 0 ) return NULL;  // let Identity() handle 0 shift count
 762 
 763   // Left input is an add of a constant?
 764   Node *add1 = in(1);
 765   int add1_op = add1->Opcode();
 766   if( add1_op == Op_AddL ) {    // Left input is an add?
 767     // Avoid dead data cycles from dead loops
 768     assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
 769     const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
 770     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 771       // Compute X << con0
 772       Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
 773       // Compute X<<con0 + (con1<<con0)
 774       return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
 775     }
 776   }
 777 
 778   // Check for "(x>>c0)<<c0" which just masks off low bits
 779   if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
 780       add1->in(2) == in(2) )
 781     // Convert to "(x & -(1<<c0))"


 836   // If the shift is a constant, shift the bounds of the type,
 837   // unless this could lead to an overflow.
 838   if (!r1->is_con()) {
 839     jlong lo = r1->_lo, hi = r1->_hi;
 840     if (((lo << shift) >> shift) == lo &&
 841         ((hi << shift) >> shift) == hi) {
 842       // No overflow.  The range shifts up cleanly.
 843       return TypeLong::make((jlong)lo << (jint)shift,
 844                             (jlong)hi << (jint)shift,
 845                             MAX2(r1->_widen,r2->_widen));
 846     }
 847     return TypeLong::LONG;
 848   }
 849 
 850   return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
 851 }
 852 
 853 //=============================================================================
 854 //------------------------------Identity---------------------------------------
 855 Node* RShiftINode::Identity(PhaseGVN* phase) {
 856   const TypeInt *t2 = phase->type(in(2))->isa_int();
 857   if( !t2 ) return this;
 858   if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
 859     return in(1);
 860 
 861   // Check for useless sign-masking
 862   if( in(1)->Opcode() == Op_LShiftI &&
 863       in(1)->req() == 3 &&
 864       in(1)->in(2) == in(2) &&
 865       t2->is_con() ) {
 866     uint shift = t2->get_con();
 867     shift &= BitsPerJavaInteger-1; // semantics of Java shifts
 868     // Compute masks for which this shifting doesn't change
 869     int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
 870     int hi = ~lo;               // 00007FFF
 871     const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
 872     if( !t11 ) return this;
 873     // Does actual value fit inside of mask?
 874     if( lo <= t11->_lo && t11->_hi <= hi )
 875       return in(1)->in(1);      // Then shifting is a nop
 876   }
 877 
 878   return this;
 879 }
 880 
 881 //------------------------------Ideal------------------------------------------
 882 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 883   // Inputs may be TOP if they are dead.
 884   const TypeInt *t1 = phase->type( in(1) )->isa_int();
 885   if( !t1 ) return NULL;        // Left input is an integer
 886   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 887   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
 888   const TypeInt *t3;  // type of in(1).in(2)
 889   int shift = t2->get_con();
 890   shift &= BitsPerJavaInteger-1;  // semantics of Java shifts
 891 
 892   if ( shift == 0 ) return NULL;  // let Identity() handle 0 shift count
 893 
 894   // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
 895   // Such expressions arise normally from shift chains like (byte)(x >> 24).
 896   const Node *mask = in(1);
 897   if( mask->Opcode() == Op_AndI &&
 898       (t3 = phase->type(mask->in(2))->isa_int()) &&
 899       t3->is_con() ) {
 900     Node *x = mask->in(1);
 901     jint maskbits = t3->get_con();
 902     // Convert to "(x >> shift) & (mask >> shift)"
 903     Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
 904     return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
 905   }
 906 
 907   // Check for "(short[i] <<16)>>16" which simply sign-extends
 908   const Node *shl = in(1);
 909   if( shl->Opcode() != Op_LShiftI ) return NULL;
 910 
 911   if( shift == 16 &&
 912       (t3 = phase->type(shl->in(2))->isa_int()) &&


 986 #ifdef ASSERT
 987     // Make sure we get the sign-capture idiom correct.
 988     if (shift == BitsPerJavaInteger-1) {
 989       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO,    ">>31 of + is  0");
 990       if (r1->_hi <  0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
 991     }
 992 #endif
 993     return ti;
 994   }
 995 
 996   if( !r1->is_con() || !r2->is_con() )
 997     return TypeInt::INT;
 998 
 999   // Signed shift right
1000   return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1001 }
1002 
1003 //=============================================================================
1004 //------------------------------Identity---------------------------------------
1005 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1006   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1007   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1008 }
1009 
1010 //------------------------------Value------------------------------------------
1011 // A RShiftLNode shifts its input2 right by input1 amount.
1012 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1013   const Type *t1 = phase->type( in(1) );
1014   const Type *t2 = phase->type( in(2) );
1015   // Either input is TOP ==> the result is TOP
1016   if( t1 == Type::TOP ) return Type::TOP;
1017   if( t2 == Type::TOP ) return Type::TOP;
1018 
1019   // Left input is ZERO ==> the result is ZERO.
1020   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1021   // Shift by zero does nothing
1022   if( t2 == TypeInt::ZERO ) return t1;
1023 
1024   // Either input is BOTTOM ==> the result is BOTTOM
1025   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1026     return TypeLong::LONG;
1027 


1044     jlong lo = (jlong)r1->_lo >> (jlong)shift;
1045     jlong hi = (jlong)r1->_hi >> (jlong)shift;
1046     assert(lo <= hi, "must have valid bounds");
1047     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1048     #ifdef ASSERT
1049     // Make sure we get the sign-capture idiom correct.
1050     if (shift == (2*BitsPerJavaInteger)-1) {
1051       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO,    ">>63 of + is 0");
1052       if (r1->_hi < 0)  assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1053     }
1054     #endif
1055     return tl;
1056   }
1057 
1058   return TypeLong::LONG;                // Give up
1059 }
1060 
1061 //=============================================================================
1062 //------------------------------Identity---------------------------------------
1063 Node* URShiftINode::Identity(PhaseGVN* phase) {
1064   const TypeInt *ti = phase->type( in(2) )->isa_int();
1065   if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1066 
1067   // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1068   // Happens during new-array length computation.
1069   // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1070   Node *add = in(1);
1071   if( add->Opcode() == Op_AddI ) {
1072     const TypeInt *t2  = phase->type(add->in(2))->isa_int();
1073     if( t2 && t2->is_con(wordSize - 1) &&
1074         add->in(1)->Opcode() == Op_LShiftI ) {
1075       // Check that shift_counts are LogBytesPerWord
1076       Node          *lshift_count   = add->in(1)->in(2);
1077       const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1078       if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1079           t_lshift_count == phase->type(in(2)) ) {
1080         Node          *x   = add->in(1)->in(1);
1081         const TypeInt *t_x = phase->type(x)->isa_int();
1082         if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1083           return x;
1084         }
1085       }
1086     }
1087   }
1088 
1089   return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1090 }
1091 
1092 //------------------------------Ideal------------------------------------------
1093 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1094   const TypeInt *t2 = phase->type( in(2) )->isa_int();
1095   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1096   const int con = t2->get_con() & 31; // Shift count is always masked
1097   if ( con == 0 ) return NULL;  // let Identity() handle a 0 shift count

1098   // We'll be wanting the right-shift amount as a mask of that many bits
1099   const int mask = right_n_bits(BitsPerJavaInteger - con);
1100 
1101   int in1_op = in(1)->Opcode();
1102 
1103   // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1104   if( in1_op == Op_URShiftI ) {
1105     const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1106     if( t12 && t12->is_con() ) { // Right input is a constant
1107       assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1108       const int con2 = t12->get_con() & 31; // Shift count is always masked
1109       const int con3 = con+con2;
1110       if( con3 < 32 )           // Only merge shifts if total is < 32
1111         return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1112     }
1113   }
1114 
1115   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1116   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1117   // If Q is "X << z" the rounding is useless.  Look for patterns like
1118   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1119   Node *add = in(1);
1120   if( in1_op == Op_AddI ) {

1121     Node *lshl = add->in(1);
1122     if( lshl->Opcode() == Op_LShiftI &&
1123         phase->type(lshl->in(2)) == t2 ) {
1124       Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1125       Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1126       return new AndINode( sum, phase->intcon(mask) );
1127     }
1128   }
1129 
1130   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1131   // This shortens the mask.  Also, if we are extracting a high byte and
1132   // storing it to a buffer, the mask will be removed completely.
1133   Node *andi = in(1);
1134   if( in1_op == Op_AndI ) {
1135     const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1136     if( t3 && t3->is_con() ) { // Right input is a constant
1137       jint mask2 = t3->get_con();
1138       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1139       Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1140       return new AndINode(newshr, phase->intcon(mask2));


1214   // Do not support shifted oops in info for GC
1215   //
1216   // else if( t1->base() == Type::InstPtr ) {
1217   //
1218   //   const TypeInstPtr *o = t1->is_instptr();
1219   //   if( t1->singleton() )
1220   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1221   // }
1222   // else if( t1->base() == Type::KlassPtr ) {
1223   //   const TypeKlassPtr *o = t1->is_klassptr();
1224   //   if( t1->singleton() )
1225   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1226   // }
1227 
1228   return TypeInt::INT;
1229 }
1230 
1231 //=============================================================================
1232 //------------------------------Identity---------------------------------------
1233 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1234   const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1235   return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1236 }
1237 
1238 //------------------------------Ideal------------------------------------------
1239 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1240   const TypeInt *t2 = phase->type( in(2) )->isa_int();
1241   if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1242   const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1243   if ( con == 0 ) return NULL;  // let Identity() handle a 0 shift count
1244                               // note: mask computation below does not work for 0 shift count
1245   // We'll be wanting the right-shift amount as a mask of that many bits
1246   const jlong mask = jlong(max_julong >> con);
1247 
1248   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1249   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1250   // If Q is "X << z" the rounding is useless.  Look for patterns like
1251   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1252   Node *add = in(1);
1253   if( add->Opcode() == Op_AddL ) {

1254     Node *lshl = add->in(1);
1255     if( lshl->Opcode() == Op_LShiftL &&
1256         phase->type(lshl->in(2)) == t2 ) {
1257       Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1258       Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1259       return new AndLNode( sum, phase->longcon(mask) );
1260     }
1261   }
1262 
1263   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1264   // This shortens the mask.  Also, if we are extracting a high byte and
1265   // storing it to a buffer, the mask will be removed completely.
1266   Node *andi = in(1);
1267   if( andi->Opcode() == Op_AndL ) {
1268     const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1269     if( t3 && t3->is_con() ) { // Right input is a constant
1270       jlong mask2 = t3->get_con();
1271       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1272       Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1273       return new AndLNode(newshr, phase->longcon(mask2));




 613   if (op == Op_RShiftL) {
 614     const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
 615     if( t12 && t12->is_con() ) { // Shift is by a constant
 616       int shift = t12->get_con();
 617       shift &= BitsPerJavaLong - 1;  // semantics of Java shifts
 618       const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
 619       // If the AND'ing of the 2 masks has no bits, then only original shifted
 620       // bits survive.  NO sign-extension bits survive the maskings.
 621       if( (sign_bits_mask & mask) == 0 ) {
 622         // Use zero-fill shift instead
 623         Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
 624         return new AndLNode(zshift, in(2));
 625       }
 626     }
 627   }
 628 
 629   return MulNode::Ideal(phase, can_reshape);
 630 }
 631 
 632 //=============================================================================
 633 
 634 static int maskShiftAmount(PhaseGVN *phase, Node *shiftNode, int nBits) {
 635   const Type *t = phase->type(shiftNode->in(2));
 636   if (t == Type::TOP) return 0;       // Right input is dead.
 637   const TypeInt *t2 = t->isa_int();
 638   if (!t2 || !t2->is_con()) return 0; // Right input is a constant.
 639 
 640   int       shift = t2->get_con();
 641   int maskedShift = shift & (nBits - 1);
 642 
 643   if (maskedShift == 0) return 0;     // Let Identity() handle 0 shift count.
 644 
 645   if (shift != maskedShift) {
 646     shiftNode->set_req(2, phase->intcon(maskedShift)); // Replace shift count with masked value.
 647   }
 648 
 649   return maskedShift;
 650 }
 651 
 652 //------------------------------Identity---------------------------------------
 653 Node* LShiftINode::Identity(PhaseGVN* phase) {
 654   const TypeInt *ti = phase->type(in(2))->isa_int();  // shift count is an int
 655   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaInteger - 1)) == 0) ? in(1) : this;
 656 }
 657 
 658 //------------------------------Ideal------------------------------------------
 659 // If the right input is a constant, and the left input is an add of a
 660 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 661 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 662   int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
 663   if (con == 0) {
 664     return NULL;
 665   }



 666 
 667   // Left input is an add of a constant?
 668   Node *add1 = in(1);
 669   int add1_op = add1->Opcode();
 670   if( add1_op == Op_AddI ) {    // Left input is an add?
 671     assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
 672     const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
 673     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 674       // Transform is legal, but check for profit.  Avoid breaking 'i2s'
 675       // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
 676       if( con < 16 ) {
 677         // Compute X << con0
 678         Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
 679         // Compute X<<con0 + (con1<<con0)
 680         return new AddINode( lsh, phase->intcon(t12->get_con() << con));
 681       }
 682     }
 683   }
 684 
 685   // Check for "(x>>c0)<<c0" which just masks off low bits


 743   // If the shift is a constant, shift the bounds of the type,
 744   // unless this could lead to an overflow.
 745   if (!r1->is_con()) {
 746     jint lo = r1->_lo, hi = r1->_hi;
 747     if (((lo << shift) >> shift) == lo &&
 748         ((hi << shift) >> shift) == hi) {
 749       // No overflow.  The range shifts up cleanly.
 750       return TypeInt::make((jint)lo << (jint)shift,
 751                            (jint)hi << (jint)shift,
 752                            MAX2(r1->_widen,r2->_widen));
 753     }
 754     return TypeInt::INT;
 755   }
 756 
 757   return TypeInt::make( (jint)r1->get_con() << (jint)shift );
 758 }
 759 
 760 //=============================================================================
 761 //------------------------------Identity---------------------------------------
 762 Node* LShiftLNode::Identity(PhaseGVN* phase) {
 763   const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
 764   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
 765 }
 766 
 767 //------------------------------Ideal------------------------------------------
 768 // If the right input is a constant, and the left input is an add of a
 769 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
 770 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
 771   int con = maskShiftAmount(phase, this, BitsPerJavaLong);
 772   if (con == 0) {
 773     return NULL;
 774   }



 775 
 776   // Left input is an add of a constant?
 777   Node *add1 = in(1);
 778   int add1_op = add1->Opcode();
 779   if( add1_op == Op_AddL ) {    // Left input is an add?
 780     // Avoid dead data cycles from dead loops
 781     assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
 782     const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
 783     if( t12 && t12->is_con() ){ // Left input is an add of a con?
 784       // Compute X << con0
 785       Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
 786       // Compute X<<con0 + (con1<<con0)
 787       return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
 788     }
 789   }
 790 
 791   // Check for "(x>>c0)<<c0" which just masks off low bits
 792   if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
 793       add1->in(2) == in(2) )
 794     // Convert to "(x & -(1<<c0))"


 849   // If the shift is a constant, shift the bounds of the type,
 850   // unless this could lead to an overflow.
 851   if (!r1->is_con()) {
 852     jlong lo = r1->_lo, hi = r1->_hi;
 853     if (((lo << shift) >> shift) == lo &&
 854         ((hi << shift) >> shift) == hi) {
 855       // No overflow.  The range shifts up cleanly.
 856       return TypeLong::make((jlong)lo << (jint)shift,
 857                             (jlong)hi << (jint)shift,
 858                             MAX2(r1->_widen,r2->_widen));
 859     }
 860     return TypeLong::LONG;
 861   }
 862 
 863   return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
 864 }
 865 
 866 //=============================================================================
 867 //------------------------------Identity---------------------------------------
 868 Node* RShiftINode::Identity(PhaseGVN* phase) {
 869   const TypeInt *t2 = phase->type(in(2))->isa_int(); // Shift count is an int.
 870   if (!t2) return this;
 871   if (t2->is_con() && (t2->get_con() & (BitsPerJavaInteger - 1)) == 0) return in(1);

 872 
 873   // Check for useless sign-masking
 874   if( in(1)->Opcode() == Op_LShiftI &&
 875       in(1)->req() == 3 &&
 876       in(1)->in(2) == in(2) &&
 877       t2->is_con() ) {
 878     uint shift = t2->get_con();
 879     shift &= BitsPerJavaInteger-1; // semantics of Java shifts
 880     // Compute masks for which this shifting doesn't change
 881     int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
 882     int hi = ~lo;               // 00007FFF
 883     const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
 884     if( !t11 ) return this;
 885     // Does actual value fit inside of mask?
 886     if( lo <= t11->_lo && t11->_hi <= hi )
 887       return in(1)->in(1);      // Then shifting is a nop
 888   }
 889 
 890   return this;
 891 }
 892 
 893 //------------------------------Ideal------------------------------------------
 894 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 895   // Inputs may be TOP if they are dead.
 896   const TypeInt *t1 = phase->type(in(1))->isa_int();
 897   if (!t1) return NULL;        // Left input is an integer


 898   const TypeInt *t3;  // type of in(1).in(2)
 899   int shift = maskShiftAmount(phase, this, BitsPerJavaInteger);
 900   if (shift == 0) {
 901     return NULL;
 902   }
 903 
 904   // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
 905   // Such expressions arise normally from shift chains like (byte)(x >> 24).
 906   const Node *mask = in(1);
 907   if( mask->Opcode() == Op_AndI &&
 908       (t3 = phase->type(mask->in(2))->isa_int()) &&
 909       t3->is_con() ) {
 910     Node *x = mask->in(1);
 911     jint maskbits = t3->get_con();
 912     // Convert to "(x >> shift) & (mask >> shift)"
 913     Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
 914     return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
 915   }
 916 
 917   // Check for "(short[i] <<16)>>16" which simply sign-extends
 918   const Node *shl = in(1);
 919   if( shl->Opcode() != Op_LShiftI ) return NULL;
 920 
 921   if( shift == 16 &&
 922       (t3 = phase->type(shl->in(2))->isa_int()) &&


 996 #ifdef ASSERT
 997     // Make sure we get the sign-capture idiom correct.
 998     if (shift == BitsPerJavaInteger-1) {
 999       if (r1->_lo >= 0) assert(ti == TypeInt::ZERO,    ">>31 of + is  0");
1000       if (r1->_hi <  0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1001     }
1002 #endif
1003     return ti;
1004   }
1005 
1006   if( !r1->is_con() || !r2->is_con() )
1007     return TypeInt::INT;
1008 
1009   // Signed shift right
1010   return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1011 }
1012 
1013 //=============================================================================
1014 //------------------------------Identity---------------------------------------
1015 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1016   const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
1017   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1018 }
1019 
1020 //------------------------------Value------------------------------------------
1021 // A RShiftLNode shifts its input2 right by input1 amount.
1022 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1023   const Type *t1 = phase->type( in(1) );
1024   const Type *t2 = phase->type( in(2) );
1025   // Either input is TOP ==> the result is TOP
1026   if( t1 == Type::TOP ) return Type::TOP;
1027   if( t2 == Type::TOP ) return Type::TOP;
1028 
1029   // Left input is ZERO ==> the result is ZERO.
1030   if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1031   // Shift by zero does nothing
1032   if( t2 == TypeInt::ZERO ) return t1;
1033 
1034   // Either input is BOTTOM ==> the result is BOTTOM
1035   if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1036     return TypeLong::LONG;
1037 


1054     jlong lo = (jlong)r1->_lo >> (jlong)shift;
1055     jlong hi = (jlong)r1->_hi >> (jlong)shift;
1056     assert(lo <= hi, "must have valid bounds");
1057     const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1058     #ifdef ASSERT
1059     // Make sure we get the sign-capture idiom correct.
1060     if (shift == (2*BitsPerJavaInteger)-1) {
1061       if (r1->_lo >= 0) assert(tl == TypeLong::ZERO,    ">>63 of + is 0");
1062       if (r1->_hi < 0)  assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1063     }
1064     #endif
1065     return tl;
1066   }
1067 
1068   return TypeLong::LONG;                // Give up
1069 }
1070 
1071 //=============================================================================
1072 //------------------------------Identity---------------------------------------
1073 Node* URShiftINode::Identity(PhaseGVN* phase) {
1074   const TypeInt *ti = phase->type(in(2))->isa_int();
1075   if (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaInteger - 1)) == 0) return in(1);
1076 
1077   // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1078   // Happens during new-array length computation.
1079   // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1080   Node *add = in(1);
1081   if( add->Opcode() == Op_AddI ) {
1082     const TypeInt *t2  = phase->type(add->in(2))->isa_int();
1083     if( t2 && t2->is_con(wordSize - 1) &&
1084         add->in(1)->Opcode() == Op_LShiftI ) {
1085       // Check that shift_counts are LogBytesPerWord
1086       Node          *lshift_count   = add->in(1)->in(2);
1087       const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1088       if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1089           t_lshift_count == phase->type(in(2)) ) {
1090         Node          *x   = add->in(1)->in(1);
1091         const TypeInt *t_x = phase->type(x)->isa_int();
1092         if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1093           return x;
1094         }
1095       }
1096     }
1097   }
1098 
1099   return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1100 }
1101 
1102 //------------------------------Ideal------------------------------------------
1103 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1104   int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
1105   if (con == 0) {
1106     return NULL;
1107   }
1108 
1109   // We'll be wanting the right-shift amount as a mask of that many bits
1110   const int mask = right_n_bits(BitsPerJavaInteger - con);
1111 
1112   int in1_op = in(1)->Opcode();
1113 
1114   // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1115   if( in1_op == Op_URShiftI ) {
1116     const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1117     if( t12 && t12->is_con() ) { // Right input is a constant
1118       assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1119       const int con2 = t12->get_con() & 31; // Shift count is always masked
1120       const int con3 = con+con2;
1121       if( con3 < 32 )           // Only merge shifts if total is < 32
1122         return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1123     }
1124   }
1125 
1126   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1127   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1128   // If Q is "X << z" the rounding is useless.  Look for patterns like
1129   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1130   Node *add = in(1);
1131   const TypeInt *t2 = phase->type(in(2))->isa_int();
1132   if (in1_op == Op_AddI) {
1133     Node *lshl = add->in(1);
1134     if( lshl->Opcode() == Op_LShiftI &&
1135         phase->type(lshl->in(2)) == t2 ) {
1136       Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1137       Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1138       return new AndINode( sum, phase->intcon(mask) );
1139     }
1140   }
1141 
1142   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1143   // This shortens the mask.  Also, if we are extracting a high byte and
1144   // storing it to a buffer, the mask will be removed completely.
1145   Node *andi = in(1);
1146   if( in1_op == Op_AndI ) {
1147     const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1148     if( t3 && t3->is_con() ) { // Right input is a constant
1149       jint mask2 = t3->get_con();
1150       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1151       Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1152       return new AndINode(newshr, phase->intcon(mask2));


1226   // Do not support shifted oops in info for GC
1227   //
1228   // else if( t1->base() == Type::InstPtr ) {
1229   //
1230   //   const TypeInstPtr *o = t1->is_instptr();
1231   //   if( t1->singleton() )
1232   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1233   // }
1234   // else if( t1->base() == Type::KlassPtr ) {
1235   //   const TypeKlassPtr *o = t1->is_klassptr();
1236   //   if( t1->singleton() )
1237   //     return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1238   // }
1239 
1240   return TypeInt::INT;
1241 }
1242 
1243 //=============================================================================
1244 //------------------------------Identity---------------------------------------
1245 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1246   const TypeInt *ti = phase->type(in(2))->isa_int(); // shift count is an int
1247   return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1248 }
1249 
1250 //------------------------------Ideal------------------------------------------
1251 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1252   int con = maskShiftAmount(phase, this, BitsPerJavaLong);
1253   if (con == 0) {
1254     return NULL;
1255   }
1256 
1257   // We'll be wanting the right-shift amount as a mask of that many bits
1258   const jlong mask = jlong(max_julong >> con);
1259 
1260   // Check for ((x << z) + Y) >>> z.  Replace with x + con>>>z
1261   // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1262   // If Q is "X << z" the rounding is useless.  Look for patterns like
1263   // ((X<<Z) + Y) >>> Z  and replace with (X + Y>>>Z) & Z-mask.
1264   Node *add = in(1);
1265   const TypeInt *t2 = phase->type(in(2))->isa_int();
1266   if (add->Opcode() == Op_AddL) {
1267     Node *lshl = add->in(1);
1268     if( lshl->Opcode() == Op_LShiftL &&
1269         phase->type(lshl->in(2)) == t2 ) {
1270       Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1271       Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1272       return new AndLNode( sum, phase->longcon(mask) );
1273     }
1274   }
1275 
1276   // Check for (x & mask) >>> z.  Replace with (x >>> z) & (mask >>> z)
1277   // This shortens the mask.  Also, if we are extracting a high byte and
1278   // storing it to a buffer, the mask will be removed completely.
1279   Node *andi = in(1);
1280   if( andi->Opcode() == Op_AndL ) {
1281     const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1282     if( t3 && t3->is_con() ) { // Right input is a constant
1283       jlong mask2 = t3->get_con();
1284       mask2 >>= con;  // *signed* shift downward (high-order zeroes do not help)
1285       Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1286       return new AndLNode(newshr, phase->longcon(mask2));


< prev index next >