1 /*
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   3  * Copyright (c) 2012, 2017 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
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  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
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  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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  25 
  26 #ifndef CPU_PPC_VM_GLOBALS_PPC_HPP
  27 #define CPU_PPC_VM_GLOBALS_PPC_HPP
  28 
  29 #include "utilities/globalDefinitions.hpp"
  30 #include "utilities/macros.hpp"
  31 
  32 // Sets the default values for platform dependent flags used by the runtime system.
  33 // (see globals.hpp)
  34 
  35 define_pd_global(bool, ShareVtableStubs,      false); // Improves performance markedly for mtrt and compress.
  36 define_pd_global(bool, NeedsDeoptSuspend,     false); // Only register window machines need this.
  37 
  38 
  39 define_pd_global(bool, ImplicitNullChecks,    true);  // Generate code for implicit null checks.
  40 define_pd_global(bool, TrapBasedNullChecks,   true);
  41 define_pd_global(bool, UncommonNullCast,      true);  // Uncommon-trap NULLs passed to check cast.
  42 
  43 #define DEFAULT_STACK_YELLOW_PAGES (2)
  44 #define DEFAULT_STACK_RED_PAGES (1)
  45 // Java_java_net_SocketOutputStream_socketWrite0() uses a 64k buffer on the
  46 // stack if compiled for unix and LP64. To pass stack overflow tests we need
  47 // 20 shadow pages.
  48 #define DEFAULT_STACK_SHADOW_PAGES (20 DEBUG_ONLY(+2))
  49 #define DEFAULT_STACK_RESERVED_PAGES (1)
  50 
  51 #define MIN_STACK_YELLOW_PAGES DEFAULT_STACK_YELLOW_PAGES
  52 #define MIN_STACK_RED_PAGES DEFAULT_STACK_RED_PAGES
  53 #define MIN_STACK_SHADOW_PAGES (3 DEBUG_ONLY(+1))
  54 #define MIN_STACK_RESERVED_PAGES (0)
  55 
  56 define_pd_global(intx, StackYellowPages,      DEFAULT_STACK_YELLOW_PAGES);
  57 define_pd_global(intx, StackRedPages,         DEFAULT_STACK_RED_PAGES);
  58 define_pd_global(intx, StackShadowPages,      DEFAULT_STACK_SHADOW_PAGES);
  59 define_pd_global(intx, StackReservedPages,    DEFAULT_STACK_RESERVED_PAGES);
  60 
  61 // Use large code-entry alignment.
  62 define_pd_global(uintx, CodeCacheSegmentSize,  128);
  63 define_pd_global(intx,  CodeEntryAlignment,    128);
  64 define_pd_global(intx,  OptoLoopAlignment,     16);
  65 define_pd_global(intx,  InlineFrequencyCount,  100);
  66 define_pd_global(intx,  InlineSmallCode,       1500);
  67 
  68 // Flags for template interpreter.
  69 define_pd_global(bool, RewriteBytecodes,      true);
  70 define_pd_global(bool, RewriteFrequentPairs,  true);
  71 
  72 define_pd_global(bool, UseMembar,             false);
  73 
  74 define_pd_global(bool, PreserveFramePointer,  false);
  75 
  76 // GC Ergo Flags
  77 define_pd_global(size_t, CMSYoungGenPerWorker, 16*M);  // Default max size of CMS young gen, per GC worker thread.
  78 
  79 define_pd_global(uintx, TypeProfileLevel, 111);
  80 
  81 define_pd_global(bool, CompactStrings, true);
  82 
  83 // 2x unrolled loop is shorter with more than 9 HeapWords.
  84 define_pd_global(intx, InitArrayShortSize, 9*BytesPerLong);
  85 
  86 // Platform dependent flag handling: flags only defined on this platform.
  87 #define ARCH_FLAGS(develop, \
  88                    product, \
  89                    diagnostic, \
  90                    experimental, \
  91                    notproduct, \
  92                    range, \
  93                    constraint, \
  94                    writeable)  \
  95                                                                             \
  96   /* Load poll address from thread. This is used to implement per-thread */ \
  97   /* safepoints on platforms != IA64. */                                    \
  98   product(bool, LoadPollAddressFromThread, false,                           \
  99           "Load polling page address from thread object (required for "     \
 100           "per-thread safepoints on platforms != IA64)")                    \
 101                                                                             \
 102   product(uintx, PowerArchitecturePPC64, 0,                                 \
 103           "CPU Version: x for PowerX. Currently recognizes Power5 to "      \
 104           "Power8. Default is 0. Newer CPUs will be recognized as Power8.") \
 105                                                                             \
 106   /* Reoptimize code-sequences of calls at runtime, e.g. replace an */      \
 107   /* indirect call by a direct call.                                */      \
 108   product(bool, ReoptimizeCallSequences, true,                              \
 109           "Reoptimize code-sequences of calls at runtime.")                 \
 110                                                                             \
 111   /* Power 8: Configure Data Stream Control Register. */                    \
 112   product(uint64_t,DSCR_PPC64, (uintx)-1,                                   \
 113           "Power8 or later: Specify encoded value for Data Stream Control " \
 114           "Register")                                                       \
 115   product(uint64_t,DSCR_DPFD_PPC64, 8,                                      \
 116           "Power8 or later: DPFD (default prefetch depth) value of the "    \
 117           "Data Stream Control Register."                                   \
 118           " 0: hardware default, 1: none, 2-7: min-max, 8: don't touch")    \
 119   product(uint64_t,DSCR_URG_PPC64, 8,                                       \
 120           "Power8 or later: URG (depth attainment urgency) value of the "   \
 121           "Data Stream Control Register."                                   \
 122           " 0: hardware default, 1: none, 2-7: min-max, 8: don't touch")    \
 123                                                                             \
 124   product(bool, UseLoadInstructionsForStackBangingPPC64, false,             \
 125           "Use load instructions for stack banging.")                       \
 126                                                                             \
 127   /* special instructions */                                                \
 128                                                                             \
 129   product(bool, UseCountLeadingZerosInstructionsPPC64, true,                \
 130           "Use count leading zeros instructions.")                          \
 131                                                                             \
 132   product(bool, UseExtendedLoadAndReserveInstructionsPPC64, false,          \
 133           "Use extended versions of load-and-reserve instructions.")        \
 134                                                                             \
 135   product(bool, UseRotateAndMaskInstructionsPPC64, true,                    \
 136           "Use rotate and mask instructions.")                              \
 137                                                                             \
 138   product(bool, UseStaticBranchPredictionInCompareAndSwapPPC64, true,       \
 139           "Use static branch prediction hints in CAS operations.")          \
 140   product(bool, UseStaticBranchPredictionForUncommonPathsPPC64, false,      \
 141           "Use static branch prediction hints for uncommon paths.")         \
 142                                                                             \
 143   product(bool, UsePower6SchedulerPPC64, false,                             \
 144           "Use Power6 Scheduler.")                                          \
 145                                                                             \
 146   product(bool, InsertEndGroupPPC64, false,                                 \
 147           "Insert EndGroup instructions to optimize for Power6.")           \
 148                                                                             \
 149   /* Trap based checks. */                                                  \
 150   /* Trap based checks use the ppc trap instructions to check certain */    \
 151   /* conditions. This instruction raises a SIGTRAP caught by the      */    \
 152   /* exception handler of the VM.                                     */    \
 153   product(bool, UseSIGTRAP, true,                                           \
 154           "Allow trap instructions that make use of SIGTRAP. Use this to "  \
 155           "switch off all optimizations requiring SIGTRAP.")                \
 156   product(bool, TrapBasedICMissChecks, true,                                \
 157           "Raise and handle SIGTRAP if inline cache miss detected.")        \
 158   product(bool, TrapBasedNotEntrantChecks, true,                            \
 159           "Raise and handle SIGTRAP if calling not entrant or zombie"       \
 160           " method.")                                                       \
 161   product(bool, TraceTraps, false, "Trace all traps the signal handler"     \
 162           "handles.")                                                       \
 163                                                                             \
 164   product(bool, ZapMemory, false, "Write 0x0101... to empty memory."        \
 165           " Use this to ease debugging.")                                   \
 166                                                                             \
 167   /* Use Restricted Transactional Memory for lock elision */                \
 168   product(bool, UseRTMLocking, false,                                       \
 169           "Enable RTM lock eliding for inflated locks in compiled code")    \
 170                                                                             \
 171   experimental(bool, UseRTMForStackLocks, false,                            \
 172           "Enable RTM lock eliding for stack locks in compiled code")       \
 173                                                                             \
 174   product(bool, UseRTMDeopt, false,                                         \
 175           "Perform deopt and recompilation based on RTM abort ratio")       \
 176                                                                             \
 177   product(int, RTMRetryCount, 5,                                            \
 178           "Number of RTM retries on lock abort or busy")                    \
 179           range(0, max_jint)                                                \
 180                                                                             \
 181   experimental(int, RTMSpinLoopCount, 100,                                  \
 182           "Spin count for lock to become free before RTM retry")            \
 183           range(0, 32767) /* immediate operand limit on ppc */              \
 184                                                                             \
 185   experimental(int, RTMAbortThreshold, 1000,                                \
 186           "Calculate abort ratio after this number of aborts")              \
 187           range(0, max_jint)                                                \
 188                                                                             \
 189   experimental(int, RTMLockingThreshold, 10000,                             \
 190           "Lock count at which to do RTM lock eliding without "             \
 191           "abort ratio calculation")                                        \
 192           range(0, max_jint)                                                \
 193                                                                             \
 194   experimental(int, RTMAbortRatio, 50,                                      \
 195           "Lock abort ratio at which to stop use RTM lock eliding")         \
 196           range(0, 100) /* natural range */                                 \
 197                                                                             \
 198   experimental(int, RTMTotalCountIncrRate, 64,                              \
 199           "Increment total RTM attempted lock count once every n times")    \
 200           range(1, 32767) /* immediate operand limit on ppc */              \
 201           constraint(RTMTotalCountIncrRateConstraintFunc,AfterErgo)         \
 202                                                                             \
 203   experimental(intx, RTMLockingCalculationDelay, 0,                         \
 204           "Number of milliseconds to wait before start calculating aborts " \
 205           "for RTM locking")                                                \
 206                                                                             \
 207   experimental(bool, UseRTMXendForLockBusy, true,                           \
 208           "Use RTM Xend instead of Xabort when lock busy")                  \
 209 
 210 #endif // CPU_PPC_VM_GLOBALS_PPC_HPP