1 /* 2 * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef CPU_X86_VM_RELOCINFO_X86_HPP 26 #define CPU_X86_VM_RELOCINFO_X86_HPP 27 28 // machine-dependent parts of class relocInfo 29 private: 30 enum { 31 // Intel instructions are byte-aligned. 32 offset_unit = 1, 33 34 // Encodes Assembler::disp32_operand vs. Assembler::imm32_operand. 35 #ifndef AMD64 36 format_width = 1 37 #else 38 // vs Assembler::narrow_oop_operand. 39 format_width = 2 40 #endif 41 }; 42 43 public: 44 45 // Instruct loadConP of x86_64.ad places oops in code that are not also 46 // listed in the oop section. 47 static bool mustIterateImmediateOopsInCode() { return true; } 48 49 #endif // CPU_X86_VM_RELOCINFO_X86_HPP